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[/] [t400/] [trunk/] [sw/] [verif/] [black_box/] [jsrp/] [test.asm] - Diff between revs 176 and 179

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Rev 176 Rev 179
        ;; *******************************************************************
        ;; *******************************************************************
        ;; $Id: test.asm,v 1.1.1.1 2006-05-06 01:56:45 arniml Exp $
        ;; $Id: test.asm 179 2009-04-01 19:48:38Z arniml $
        ;;
        ;;
        ;; Checks the JSRP instruction.
        ;; Checks the JSRP instruction.
        ;;
        ;;
        ;; the cpu type is defined on asl's command line
        ;; the cpu type is defined on asl's command line
        org     0x00
        org     0x00
        clra
        clra
        ;; preload data memory with jsrp target values
        ;; preload data memory with jsrp target values
        stii    0x0
        stii    0x0
        stii    0x1
        stii    0x1
        stii    0x2
        stii    0x2
        stii    0x3
        stii    0x3
        stii    0x4
        stii    0x4
        stii    0x5
        stii    0x5
        stii    0x6
        stii    0x6
        stii    0x7
        stii    0x7
        cab
        cab
        jsrp    target_0
        jsrp    target_0
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        cab
        cab
        clra
        clra
        jsrp    target_1
        jsrp    target_1
        ;;
        ;;
        aisc    0x2
        aisc    0x2
        cab
        cab
        clra
        clra
        jsrp    target_2
        jsrp    target_2
        ;;
        ;;
        aisc    0x3
        aisc    0x3
        cab
        cab
        clra
        clra
        jsrp    target_3
        jsrp    target_3
        ;;
        ;;
        aisc    0x4
        aisc    0x4
        cab
        cab
        clra
        clra
        jsrp    target_4
        jsrp    target_4
        ;;
        ;;
        aisc    0x5
        aisc    0x5
        cab
        cab
        clra
        clra
        jsrp    target_5
        jsrp    target_5
        ;;
        ;;
        aisc    0x6
        aisc    0x6
        cab
        cab
        clra
        clra
        jsrp    target_6
        jsrp    target_6
        ;;
        ;;
        aisc    0x7
        aisc    0x7
        cab
        cab
        clra
        clra
        jsrp    target_7
        jsrp    target_7
        jmp     pass
        jmp     pass
        ;; subroutine targets in page 2 & 3
        ;; subroutine targets in page 2 & 3
        org     0x080
        org     0x080
target_0:
target_0:
        ske
        ske
        jmp     fail
        jmp     fail
        ret
        ret
        ;;
        ;;
        org     0x088
        org     0x088
target_1:
target_1:
        aisc    0x1
        aisc    0x1
        ske
        ske
        jmp     fail
        jmp     fail
        clra
        clra
        ret
        ret
        ;;
        ;;
        org     0x090
        org     0x090
target_2:
target_2:
        aisc    0x2
        aisc    0x2
        ske
        ske
        jmp     fail
        jmp     fail
        clra
        clra
        ret
        ret
        ;;
        ;;
        org     0x098
        org     0x098
target_3:
target_3:
        aisc    0x3
        aisc    0x3
        ske
        ske
        jmp     fail
        jmp     fail
        clra
        clra
        ret
        ret
        ;;
        ;;
        org     0x0a0
        org     0x0a0
target_4:
target_4:
        aisc    0x4
        aisc    0x4
        ske
        ske
        jmp     fail
        jmp     fail
        clra
        clra
        ret
        ret
        ;;
        ;;
        org     0x0a8
        org     0x0a8
target_5:
target_5:
        aisc    0x5
        aisc    0x5
        ske
        ske
        jmp     fail
        jmp     fail
        clra
        clra
        ret
        ret
        ;;
        ;;
        org     0x0b0
        org     0x0b0
target_6:
target_6:
        aisc    0x6
        aisc    0x6
        ske
        ske
        jmp     fail
        jmp     fail
        clra
        clra
        ret
        ret
        ;;
        ;;
        org     0x0b8
        org     0x0b8
target_7:
target_7:
        aisc    0x7
        aisc    0x7
        ske
        ske
        jmp     fail
        jmp     fail
        clra
        clra
        ret
        ret
        jmp     fail
        jmp     fail
        org     0x100
        org     0x100
        include "pass_fail.asm"
        include "pass_fail.asm"
 
 

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