;; *******************************************************************
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;; *******************************************************************
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;; $Id: test.asm,v 1.1 2006-05-20 17:56:22 arniml Exp $
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;; $Id: test.asm 179 2009-04-01 19:48:38Z arniml $
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;;
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;;
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;; Checks the LDD instruction.
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;; Checks the LDD instruction.
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;;
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;;
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;; the cpu type is defined on asl's command line
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;; the cpu type is defined on asl's command line
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;; macro for checking a digit
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;; macro for checking a digit
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check_d MACRO reg, digit
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check_d MACRO reg, digit
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lbi (reg ! 3), ~digit & 0xf ; select inverse digit
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lbi (reg ! 3), ~digit & 0xf ; select inverse digit
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ldd reg, digit
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ldd reg, digit
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lbi reg, digit
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lbi reg, digit
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ske
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ske
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jmp fail
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jmp fail
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ENDM
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ENDM
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;; macro for checking LDD on a complete register
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;; macro for checking LDD on a complete register
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check_r MACRO reg
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check_r MACRO reg
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check_d reg, 0
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check_d reg, 0
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check_d reg, 1
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check_d reg, 1
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check_d reg, 2
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check_d reg, 2
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check_d reg, 3
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check_d reg, 3
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check_d reg, 4
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check_d reg, 4
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check_d reg, 5
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check_d reg, 5
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check_d reg, 6
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check_d reg, 6
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check_d reg, 7
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check_d reg, 7
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check_d reg, 8
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check_d reg, 8
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check_d reg, 9
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check_d reg, 9
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check_d reg, 10
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check_d reg, 10
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check_d reg, 11
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check_d reg, 11
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check_d reg, 12
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check_d reg, 12
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check_d reg, 13
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check_d reg, 13
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check_d reg, 14
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check_d reg, 14
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check_d reg, 15
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check_d reg, 15
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ENDM
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ENDM
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org 0x00
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org 0x00
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clra
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clra
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;; prepare other registers
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;; prepare other registers
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;; register 1
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;; register 1
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lbi 1, 0
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lbi 1, 0
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jsr clear_reg
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jsr clear_reg
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;; register 2
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;; register 2
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lbi 2, 0
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lbi 2, 0
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jsr clear_reg
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jsr clear_reg
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;; register 3
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;; register 3
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lbi 3, 0
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lbi 3, 0
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jsr clear_reg
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jsr clear_reg
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;; *******************************************************************
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;; *******************************************************************
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;; Test LDD on register 0
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;; Test LDD on register 0
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;;
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;;
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lbi 0, 0
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lbi 0, 0
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jsr init_reg
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jsr init_reg
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;;
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;;
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check_r 0
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check_r 0
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;; *******************************************************************
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;; *******************************************************************
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;; Test LDD on register 1
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;; Test LDD on register 1
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;;
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;;
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lbi 0, 0
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lbi 0, 0
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jsr clear_reg
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jsr clear_reg
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lbi 1, 0
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lbi 1, 0
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jsr init_reg
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jsr init_reg
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;;
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;;
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check_r 1
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check_r 1
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;; *******************************************************************
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;; *******************************************************************
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;; Test LDD on register 2
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;; Test LDD on register 2
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;;
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;;
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lbi 1, 0
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lbi 1, 0
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jsr clear_reg
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jsr clear_reg
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lbi 2, 0
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lbi 2, 0
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jsr init_reg
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jsr init_reg
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;;
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;;
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check_r 2
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check_r 2
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;; *******************************************************************
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;; *******************************************************************
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;; Test LDD on register 3
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;; Test LDD on register 3
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;;
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;;
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lbi 2, 0
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lbi 2, 0
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jsr clear_reg
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jsr clear_reg
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lbi 3, 0
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lbi 3, 0
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jsr init_reg
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jsr init_reg
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;;
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;;
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check_r 3
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check_r 3
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jmp pass
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jmp pass
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;; initialize current register with proper values
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;; initialize current register with proper values
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;;
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;;
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init_reg:
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init_reg:
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clra
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clra
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cab
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cab
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stii 0x0
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stii 0x0
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stii 0x1
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stii 0x1
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stii 0x2
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stii 0x2
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stii 0x3
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stii 0x3
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stii 0x4
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stii 0x4
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stii 0x5
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stii 0x5
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stii 0x6
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stii 0x6
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stii 0x7
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stii 0x7
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stii 0x8
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stii 0x8
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stii 0x9
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stii 0x9
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stii 0xa
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stii 0xa
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stii 0xb
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stii 0xb
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stii 0xc
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stii 0xc
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stii 0xd
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stii 0xd
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stii 0xe
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stii 0xe
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stii 0xf
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stii 0xf
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ret
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ret
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;;
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;;
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;; clear current register
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;; clear current register
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;;
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;;
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clear_reg:
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clear_reg:
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clra
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clra
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cab
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cab
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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stii 0x0
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ret
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ret
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org 0x380
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org 0x380
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include "pass_fail.asm"
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include "pass_fail.asm"
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