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[/] [t400/] [trunk/] [sw/] [verif/] [black_box/] [xad/] [test.asm] - Diff between revs 176 and 179

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Rev 176 Rev 179
        ;; *******************************************************************
        ;; *******************************************************************
        ;; $Id: test.asm,v 1.1 2006-05-19 00:56:03 arniml Exp $
        ;; $Id: test.asm 179 2009-04-01 19:48:38Z arniml $
        ;;
        ;;
        ;; Checks the XAD instruction.
        ;; Checks the XAD instruction.
        ;;
        ;;
        ;; the cpu type is defined on asl's command line
        ;; the cpu type is defined on asl's command line
        org     0x00
        org     0x00
        clra
        clra
        ;; *******************************************************************
        ;; *******************************************************************
        ;; Dedicated test for XAD 3, 15
        ;; Dedicated test for XAD 3, 15
        ;;
        ;;
        lbi     0, 9
        lbi     0, 9
        stii    0x02
        stii    0x02
        stii    0x03
        stii    0x03
        aisc    0x2
        aisc    0x2
        xad     3, 15
        xad     3, 15
        clra
        clra
        aisc    0x3
        aisc    0x3
        xad     3, 15
        xad     3, 15
        ;; expect 0x2
        ;; expect 0x2
        lbi     0, 9
        lbi     0, 9
        ske
        ske
        jmp     fail
        jmp     fail
        xad     3, 15
        xad     3, 15
        ;; expect 0x3
        ;; expect 0x3
        lbi     0, 10
        lbi     0, 10
        ske
        ske
        jmp     fail
        jmp     fail
        IF      MOMCPUNAME = "COP410"
        IF      MOMCPUNAME = "COP410"
        jmp     pass
        jmp     pass
        ELSEIF
        ELSEIF
        ;; macro for checking XAD on a complete register
        ;; macro for checking XAD on a complete register
check   MACRO   register
check   MACRO   register
        lbi     register, 0
        lbi     register, 0
        ld      0
        ld      0
        xad     register, 1
        xad     register, 1
        xad     register, 2
        xad     register, 2
        xad     register, 3
        xad     register, 3
        xad     register, 4
        xad     register, 4
        xad     register, 5
        xad     register, 5
        xad     register, 6
        xad     register, 6
        xad     register, 7
        xad     register, 7
        xad     register, 8
        xad     register, 8
        xad     register, 9
        xad     register, 9
        xad     register, 10
        xad     register, 10
        xad     register, 11
        xad     register, 11
        xad     register, 12
        xad     register, 12
        xad     register, 13
        xad     register, 13
        xad     register, 14
        xad     register, 14
        xad     register, 15
        xad     register, 15
        xad     register, 0
        xad     register, 0
        clra
        clra
        lbi     register, 1
        lbi     register, 1
        ske                     ; expect 0 in digit 1
        ske                     ; expect 0 in digit 1
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 2
        lbi     register, 2
        ske                     ; expect 1 in digit 2
        ske                     ; expect 1 in digit 2
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 3
        lbi     register, 3
        ske                     ; expect 2 in digit 3
        ske                     ; expect 2 in digit 3
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 4
        lbi     register, 4
        ske                     ; expect 3 in digit 4
        ske                     ; expect 3 in digit 4
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 5
        lbi     register, 5
        ske                     ; expect 4 in digit 5
        ske                     ; expect 4 in digit 5
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 6
        lbi     register, 6
        ske                     ; expect 5 in digit 6
        ske                     ; expect 5 in digit 6
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 7
        lbi     register, 7
        ske                     ; expect 6 in digit 7
        ske                     ; expect 6 in digit 7
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 8
        lbi     register, 8
        ske                     ; expect 7 in digit 8
        ske                     ; expect 7 in digit 8
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 9
        lbi     register, 9
        ske                     ; expect 8 in digit 9
        ske                     ; expect 8 in digit 9
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 10
        lbi     register, 10
        ske                     ; expect 9 in digit 10
        ske                     ; expect 9 in digit 10
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 11
        lbi     register, 11
        ske                     ; expect 10 in digit 11
        ske                     ; expect 10 in digit 11
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 12
        lbi     register, 12
        ske                     ; expect 11 in digit 12
        ske                     ; expect 11 in digit 12
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 13
        lbi     register, 13
        ske                     ; expect 12 in digit 13
        ske                     ; expect 12 in digit 13
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 14
        lbi     register, 14
        ske                     ; expect 13 in digit 14
        ske                     ; expect 13 in digit 14
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 15
        lbi     register, 15
        ske                     ; expect 14 in digit 15
        ske                     ; expect 14 in digit 15
        jmp     fail
        jmp     fail
        ;;
        ;;
        aisc    0x1
        aisc    0x1
        lbi     register, 0
        lbi     register, 0
        ske                     ; expect 15 in digit 0
        ske                     ; expect 15 in digit 0
        jmp     fail
        jmp     fail
        ENDM
        ENDM
        ;; prepare other registers
        ;; prepare other registers
        ;; register 1
        ;; register 1
        lbi     1, 0
        lbi     1, 0
        jsr     clear_reg
        jsr     clear_reg
        ;; register 2
        ;; register 2
        lbi     2, 0
        lbi     2, 0
        jsr     clear_reg
        jsr     clear_reg
        ;; register 3
        ;; register 3
        lbi     3, 0
        lbi     3, 0
        jsr     clear_reg
        jsr     clear_reg
        ;; *******************************************************************
        ;; *******************************************************************
        ;; Test XAD on register 0
        ;; Test XAD on register 0
        ;;
        ;;
        lbi     0, 0
        lbi     0, 0
        jsr     init_reg
        jsr     init_reg
        ;;
        ;;
        check   0
        check   0
        ;; *******************************************************************
        ;; *******************************************************************
        ;; Test XAD on register 1
        ;; Test XAD on register 1
        ;;
        ;;
        lbi     0, 0
        lbi     0, 0
        jsr     clear_reg
        jsr     clear_reg
        lbi     1, 0
        lbi     1, 0
        jsr     init_reg
        jsr     init_reg
        ;;
        ;;
        check   1
        check   1
        ;; *******************************************************************
        ;; *******************************************************************
        ;; Test XAD on register 2
        ;; Test XAD on register 2
        ;;
        ;;
        lbi     1, 0
        lbi     1, 0
        jsr     clear_reg
        jsr     clear_reg
        lbi     2, 0
        lbi     2, 0
        jsr     init_reg
        jsr     init_reg
        ;;
        ;;
        check   2
        check   2
        ;; *******************************************************************
        ;; *******************************************************************
        ;; Test XAD on register 3
        ;; Test XAD on register 3
        ;;
        ;;
        lbi     2, 0
        lbi     2, 0
        jsr     clear_reg
        jsr     clear_reg
        lbi     3, 0
        lbi     3, 0
        jsr     init_reg
        jsr     init_reg
        ;;
        ;;
        check   3
        check   3
        jmp     pass
        jmp     pass
        ;;
        ;;
        ;; initialize current register with proper values
        ;; initialize current register with proper values
        ;;
        ;;
init_reg:
init_reg:
        clra
        clra
        cab
        cab
        stii    0x0
        stii    0x0
        stii    0x1
        stii    0x1
        stii    0x2
        stii    0x2
        stii    0x3
        stii    0x3
        stii    0x4
        stii    0x4
        stii    0x5
        stii    0x5
        stii    0x6
        stii    0x6
        stii    0x7
        stii    0x7
        stii    0x8
        stii    0x8
        stii    0x9
        stii    0x9
        stii    0xa
        stii    0xa
        stii    0xb
        stii    0xb
        stii    0xc
        stii    0xc
        stii    0xd
        stii    0xd
        stii    0xe
        stii    0xe
        stii    0xf
        stii    0xf
        ret
        ret
        ;;
        ;;
        ;; clear current register
        ;; clear current register
        ;;
        ;;
clear_reg:
clear_reg:
        clra
        clra
        cab
        cab
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        ret
        ret
        ENDIF
        ENDIF
        include "pass_fail.asm"
        include "pass_fail.asm"
 
 

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