URL
https://opencores.org/ocsvn/t48/t48/trunk
Only display areas with differences |
Details |
Blame |
View Log
Rev 289 |
Rev 292 |
;; *******************************************************************
|
;; *******************************************************************
|
;; $Id: test.asm,v 1.1 2006-07-11 23:13:32 arniml Exp $
|
;; $Id: test.asm,v 1.1 2006-07-11 23:13:32 arniml Exp $
|
;;
|
;;
|
;; Test MOVD.
|
;; Test MOVD.
|
;; *******************************************************************
|
;; *******************************************************************
|
|
|
INCLUDE "cpu.inc"
|
INCLUDE "cpu.inc"
|
INCLUDE "pass_fail.inc"
|
INCLUDE "pass_fail.inc"
|
|
|
ORG 0
|
ORG 0
|
|
|
;; Start of test
|
;; Start of test
|
|
|
;;
|
;;
|
;; read initial values
|
;; read initial values
|
;;
|
;;
|
|
|
;; port 4
|
;; port 4
|
cpl a
|
cpl a
|
movd a, p4
|
movd a, p4
|
xrl a, #00fh
|
xrl a, #00fh
|
jnz fail
|
jnz fail
|
|
|
;; port 5
|
;; port 5
|
cpl a
|
cpl a
|
movd a, p5
|
movd a, p5
|
xrl a, #00fh
|
xrl a, #00fh
|
jnz fail
|
jnz fail
|
|
|
;; port 6
|
;; port 6
|
cpl a
|
cpl a
|
movd a, p6
|
movd a, p6
|
xrl a, #00fh
|
xrl a, #00fh
|
jnz fail
|
jnz fail
|
|
|
;; port 7
|
;; port 7
|
cpl a
|
cpl a
|
movd a, p7
|
movd a, p7
|
xrl a, #00fh
|
xrl a, #00fh
|
jnz fail
|
jnz fail
|
|
|
|
|
;;
|
;;
|
;; test read/write via direct connection
|
;; test read/write via direct connection
|
;;
|
;;
|
|
|
;; port 4 => port 6
|
;; port 4 => port 6
|
mov a, #005h
|
mov a, #005h
|
movd p4, a
|
movd p4, a
|
cpl a
|
cpl a
|
movd a, p6
|
movd a, p6
|
xrl a, #005h
|
xrl a, #005h
|
jnz fail
|
jnz fail
|
|
|
mov a, #00ah
|
mov a, #00ah
|
movd p4, a
|
movd p4, a
|
cpl a
|
cpl a
|
movd a, p6
|
movd a, p6
|
xrl a, #00ah
|
xrl a, #00ah
|
jnz fail
|
jnz fail
|
movd a, p4
|
movd a, p4
|
|
|
;; port 6 => port 4
|
;; port 6 => port 4
|
mov a, #000h
|
mov a, #000h
|
movd p6, a
|
movd p6, a
|
cpl a
|
cpl a
|
movd a, p4
|
movd a, p4
|
xrl a, #000h
|
xrl a, #000h
|
jnz fail
|
jnz fail
|
|
|
mov a, #00fh
|
mov a, #00fh
|
movd p6, a
|
movd p6, a
|
cpl a
|
cpl a
|
movd a, p4
|
movd a, p4
|
xrl a, #00fh
|
xrl a, #00fh
|
jnz fail
|
jnz fail
|
movd p6, a
|
movd p6, a
|
|
|
;; port 5 => port 7
|
;; port 5 => port 7
|
mov a, #005h
|
mov a, #005h
|
movd p5, a
|
movd p5, a
|
cpl a
|
cpl a
|
movd a, p7
|
movd a, p7
|
xrl a, #005h
|
xrl a, #005h
|
jnz fail
|
jnz fail
|
|
|
mov a, #00ah
|
mov a, #00ah
|
movd p5, a
|
movd p5, a
|
cpl a
|
cpl a
|
movd a, p7
|
movd a, p7
|
xrl a, #00ah
|
xrl a, #00ah
|
jnz fail
|
jnz fail
|
movd a, p7
|
movd a, p7
|
|
|
;; port 7 => port 5
|
;; port 7 => port 5
|
mov a, #000h
|
mov a, #000h
|
movd p7, a
|
movd p7, a
|
cpl a
|
cpl a
|
movd a, p5
|
movd a, p5
|
xrl a, #000h
|
xrl a, #000h
|
jnz fail
|
jnz fail
|
|
|
mov a, #00fh
|
mov a, #00fh
|
movd p7, a
|
movd p7, a
|
cpl a
|
cpl a
|
movd a, p5
|
movd a, p5
|
xrl a, #00fh
|
xrl a, #00fh
|
jnz fail
|
jnz fail
|
movd p7, a
|
movd p7, a
|
|
|
|
|
jmp pass
|
jmp pass
|
|
|
jmp fail
|
jmp fail
|
pass: PASS
|
pass: PASS
|
|
|
fail: FAIL
|
fail: FAIL
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.