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[/] [t6507lp/] [trunk/] [fv/] [alu_chk.e] - Diff between revs 133 and 134

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Rev 133 Rev 134
alu_chk.e
alu_chk.e
<'
<'
import alu_components;
import alu_components;
 
 
unit alu_chk_u {
unit alu_chk_u {
        reg_a : byte;
        reg_a : byte;
        reg_x : byte;
        reg_x : byte;
        reg_y : byte;
        reg_y : byte;
        reg_status : byte;
        reg_status : byte;
 
 
        inst : alu_input_s;
        inst : alu_input_s;
        next_inst : alu_input_s;
        next_inst : alu_input_s;
 
 
        count_cycles : int;
        count_cycles : int;
        first_cycle : bool;
        first_cycle : bool;
 
 
        keep first_cycle == TRUE;
        keep first_cycle == TRUE;
        keep count_cycles == 0;
        keep count_cycles == 0;
 
 
        store(input : alu_input_s) is {
        store(input : alu_input_s) is {
                out ("cycle ", count_cycles, ": input stored: ");
                count_cycles = count_cycles + 1;
 
 
 
                out ("CYCLE ", count_cycles, " STORE:");
                print input;
                print input;
 
 
                if (first_cycle) {
                if (first_cycle) {
                        inst = input;
                        inst = input;
                        next_inst = input;
                        next_inst = input;
                }
                }
                else {
                else {
                        inst = next_inst;
                        inst = next_inst;
                        next_inst = input;
                        next_inst = input;
                };
                };
 
 
                count_cycles = count_cycles + 1;
 
 
 
                if (count_cycles == 10000) {
                if (count_cycles == 10000) {
                        dut_error();
                        dut_error();
                }
                }
        };
        };
 
 
        compare(alu_result:byte, alu_status:byte, alu_x:byte, alu_y:byte ) is {
        compare(alu_result:byte, alu_status:byte, alu_x:byte, alu_y:byte ) is {
                if (first_cycle) {
                if (first_cycle) {
                        first_cycle = FALSE;
                        first_cycle = FALSE;
                        reg_x = alu_x;
                        reg_x = alu_x;
                        reg_y = alu_y;
                        reg_y = alu_y;
                        reg_status = alu_status;
                        reg_status = alu_status;
                        reg_a = 0; // TODO: check this
                        reg_a = 0; // TODO: check this
                }
                }
                else {
                else {
 
 
 
                        out ("CYCLE ", count_cycles, " COMPARE:");
 
                        print inst;
 
 
                        case inst.input_kind {
                        case inst.input_kind {
                                ENABLED_VALID: {
                                ENABLED_VALID: {
                                        out("cycle ", count_cycles, ": executing and comparing");
                                        out("CYCLE ", count_cycles, ": executing and comparing");
                                        execute();
                                        execute();
                                };
                                };
                                DISABLED_VALID: {
                                DISABLED_VALID: {
                                        out("cycle ", count_cycles, ": just comparing");
                                        out("CYCLE ", count_cycles, ": just comparing");
                                };
                                };
                                default: {
                                default: {
                                        dut_error("error at e code");
                                        dut_error("error at e code");
                                };
                                };
                        };
                        };
 
 
                        // here i have already calculated. must compare!
                        // here i have already calculated. must compare!
                        if (reg_a != alu_result) {
                        if (reg_a != alu_result) {
 
                                print reg_a;
 
                                print alu_result;
                                dut_error("WRONG!");
                                dut_error("WRONG!");
                        };
                        };
 
 
                        if (reg_x != alu_x) {
                        if (reg_x != alu_x) {
                                dut_error("WRONG!");
                                dut_error("WRONG!");
                        };
                        };
 
 
                        if (reg_y != alu_y) {
                        if (reg_y != alu_y) {
                                dut_error("WRONG!");
                                dut_error("WRONG!");
                        };
                        };
 
 
                        if (reg_status != alu_status) {
                        if (reg_status != alu_status) {
                                dut_error("WRONG!");
                                dut_error("WRONG!");
                        };
                        };
                }
                }
        };
        };
 
 
        execute() is {
        execute() is {
                case inst.alu_opcode {
                case inst.alu_opcode {
                        ADC_IMM: { exec_sum(); }; // A,Z,C,N = A+M+C
                        ADC_IMM: { exec_sum(); }; // A,Z,C,N = A+M+C
                        ADC_ZPG: { exec_sum(); };
                        ADC_ZPG: { exec_sum(); };
                        ADC_ZPX: { exec_sum(); };
                        ADC_ZPX: { exec_sum(); };
                        ADC_ABS: { exec_sum(); };
                        ADC_ABS: { exec_sum(); };
                        ADC_ABX: { exec_sum(); };
                        ADC_ABX: { exec_sum(); };
                        ADC_ABY: { exec_sum(); };
                        ADC_ABY: { exec_sum(); };
                        ADC_IDX: { exec_sum(); };
                        ADC_IDX: { exec_sum(); };
                        ADC_IDY: { exec_sum(); };
                        ADC_IDY: { exec_sum(); };
 
 
                        AND_IMM: { exec_and(); }; // A,Z,N = A&M
                        AND_IMM: { exec_and(); }; // A,Z,N = A&M
                        AND_ZPG: { exec_and(); };
                        AND_ZPG: { exec_and(); };
                        AND_ZPX: { exec_and(); };
                        AND_ZPX: { exec_and(); };
                        AND_ABS: { exec_and(); };
                        AND_ABS: { exec_and(); };
                        AND_ABX: { exec_and(); };
                        AND_ABX: { exec_and(); };
                        AND_ABY: { exec_and(); };
                        AND_ABY: { exec_and(); };
                        AND_IDX: { exec_and(); };
                        AND_IDX: { exec_and(); };
                        AND_IDY: { exec_and(); };
                        AND_IDY: { exec_and(); };
 
 
 
 
                        default: {
                        default: {
                                //dut_error("unknown opcode");
                                //dut_error("unknown opcode");
                        }
                        }
                };
                };
        };
        };
 
 
        exec_and() is {
        exec_and() is {
                reg_a = reg_a & inst.alu_a; // TODO: this is probably wrong
                reg_a = reg_a & inst.alu_a; // TODO: this is probably wrong
                update_z(reg_a);
                update_z(reg_a);
                update_n(reg_a);
                update_n(reg_a);
        };
        };
 
 
        exec_sum() is {
        exec_sum() is {
                update_c(reg_a, inst.alu_a);
                update_c(reg_a, inst.alu_a);
                reg_a = reg_a + inst.alu_a;
                reg_a = reg_a + inst.alu_a;
                update_z(reg_a);
                update_z(reg_a);
                update_n(reg_a);
                update_n(reg_a);
 
 
                print me;
                print me;
 
 
                dut_error();
                //dut_error();
        };
        };
 
 
        update_z(arg : byte) is {
        update_z(arg : byte) is {
                if (arg == 0) {
                if (arg == 0) {
                        reg_status[1:1] = 1;
                        reg_status[1:1] = 1;
                }
                }
                else {
                else {
                        reg_status[1:1] = 0;
                        reg_status[1:1] = 0;
                }
                }
        };
        };
 
 
        update_c(arg1 : byte, arg2 : byte) is {
        update_c(arg1 : byte, arg2 : byte) is {
                if (arg1 + arg2 > 256) {
                if (arg1 + arg2 > 256) {
                        reg_status[0:0] = 1;
                        reg_status[0:0] = 1;
                }
                }
                else {
                else {
                        reg_status[0:0] = 0;
                        reg_status[0:0] = 0;
                }
                }
        };
        };
 
 
        update_n(arg : byte) is {
        update_n(arg : byte) is {
                if (arg[7:7] == 1) {
                if (arg[7:7] == 1) {
                        reg_status[7:7] = 1;
                        reg_status[7:7] = 1;
                }
                }
                else {
                else {
                        reg_status[7:7] = 0;
                        reg_status[7:7] = 0;
                }
                }
        };
        };
};
};
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