alu_chk.e
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alu_chk.e
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<'
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<'
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import alu_components;
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import alu_components;
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unit alu_chk_u {
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unit alu_chk_u {
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reg_a : byte;
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reg_a : byte;
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reg_x : byte;
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reg_x : byte;
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reg_y : byte;
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reg_y : byte;
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reg_status : byte;
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reg_status : byte;
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inst : alu_input_s;
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inst : alu_input_s;
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next_inst : alu_input_s;
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next_inst : alu_input_s;
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count_cycles : int;
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count_cycles : int;
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first_cycle : bool;
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first_cycle : bool;
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keep first_cycle == TRUE;
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keep first_cycle == TRUE;
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keep count_cycles == 0;
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keep count_cycles == 0;
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store(input : alu_input_s) is {
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store(input : alu_input_s) is {
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out ("cycle ", count_cycles, ": input stored: ");
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count_cycles = count_cycles + 1;
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out ("CYCLE ", count_cycles, " STORE:");
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print input;
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print input;
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if (first_cycle) {
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if (first_cycle) {
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inst = input;
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inst = input;
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next_inst = input;
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next_inst = input;
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}
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}
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else {
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else {
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inst = next_inst;
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inst = next_inst;
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next_inst = input;
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next_inst = input;
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};
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};
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count_cycles = count_cycles + 1;
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if (count_cycles == 10000) {
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if (count_cycles == 10000) {
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dut_error();
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dut_error();
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}
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}
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};
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};
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compare(alu_result:byte, alu_status:byte, alu_x:byte, alu_y:byte ) is {
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compare(alu_result:byte, alu_status:byte, alu_x:byte, alu_y:byte ) is {
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if (first_cycle) {
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if (first_cycle) {
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first_cycle = FALSE;
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first_cycle = FALSE;
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reg_x = alu_x;
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reg_x = alu_x;
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reg_y = alu_y;
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reg_y = alu_y;
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reg_status = alu_status;
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reg_status = alu_status;
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reg_a = 0; // TODO: check this
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reg_a = 0; // TODO: check this
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}
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}
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else {
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else {
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out ("CYCLE ", count_cycles, " COMPARE:");
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print inst;
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case inst.input_kind {
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case inst.input_kind {
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ENABLED_VALID: {
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ENABLED_VALID: {
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out("cycle ", count_cycles, ": executing and comparing");
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out("CYCLE ", count_cycles, ": executing and comparing");
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execute();
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execute();
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};
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};
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DISABLED_VALID: {
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DISABLED_VALID: {
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out("cycle ", count_cycles, ": just comparing");
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out("CYCLE ", count_cycles, ": just comparing");
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};
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};
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default: {
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default: {
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dut_error("error at e code");
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dut_error("error at e code");
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};
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};
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};
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};
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// here i have already calculated. must compare!
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// here i have already calculated. must compare!
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if (reg_a != alu_result) {
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if (reg_a != alu_result) {
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print reg_a;
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print alu_result;
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dut_error("WRONG!");
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dut_error("WRONG!");
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};
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};
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if (reg_x != alu_x) {
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if (reg_x != alu_x) {
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dut_error("WRONG!");
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dut_error("WRONG!");
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};
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};
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if (reg_y != alu_y) {
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if (reg_y != alu_y) {
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dut_error("WRONG!");
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dut_error("WRONG!");
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};
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};
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if (reg_status != alu_status) {
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if (reg_status != alu_status) {
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dut_error("WRONG!");
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dut_error("WRONG!");
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};
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};
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}
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}
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};
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};
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execute() is {
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execute() is {
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case inst.alu_opcode {
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case inst.alu_opcode {
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ADC_IMM: { exec_sum(); }; // A,Z,C,N = A+M+C
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ADC_IMM: { exec_sum(); }; // A,Z,C,N = A+M+C
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ADC_ZPG: { exec_sum(); };
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ADC_ZPG: { exec_sum(); };
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ADC_ZPX: { exec_sum(); };
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ADC_ZPX: { exec_sum(); };
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ADC_ABS: { exec_sum(); };
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ADC_ABS: { exec_sum(); };
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ADC_ABX: { exec_sum(); };
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ADC_ABX: { exec_sum(); };
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ADC_ABY: { exec_sum(); };
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ADC_ABY: { exec_sum(); };
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ADC_IDX: { exec_sum(); };
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ADC_IDX: { exec_sum(); };
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ADC_IDY: { exec_sum(); };
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ADC_IDY: { exec_sum(); };
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AND_IMM: { exec_and(); }; // A,Z,N = A&M
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AND_IMM: { exec_and(); }; // A,Z,N = A&M
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AND_ZPG: { exec_and(); };
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AND_ZPG: { exec_and(); };
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AND_ZPX: { exec_and(); };
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AND_ZPX: { exec_and(); };
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AND_ABS: { exec_and(); };
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AND_ABS: { exec_and(); };
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AND_ABX: { exec_and(); };
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AND_ABX: { exec_and(); };
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AND_ABY: { exec_and(); };
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AND_ABY: { exec_and(); };
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AND_IDX: { exec_and(); };
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AND_IDX: { exec_and(); };
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AND_IDY: { exec_and(); };
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AND_IDY: { exec_and(); };
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default: {
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default: {
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//dut_error("unknown opcode");
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//dut_error("unknown opcode");
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}
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}
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};
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};
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};
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};
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exec_and() is {
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exec_and() is {
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reg_a = reg_a & inst.alu_a; // TODO: this is probably wrong
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reg_a = reg_a & inst.alu_a; // TODO: this is probably wrong
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update_z(reg_a);
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update_z(reg_a);
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update_n(reg_a);
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update_n(reg_a);
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};
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};
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exec_sum() is {
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exec_sum() is {
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update_c(reg_a, inst.alu_a);
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update_c(reg_a, inst.alu_a);
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reg_a = reg_a + inst.alu_a;
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reg_a = reg_a + inst.alu_a;
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update_z(reg_a);
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update_z(reg_a);
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update_n(reg_a);
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update_n(reg_a);
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print me;
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print me;
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dut_error();
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//dut_error();
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};
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};
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update_z(arg : byte) is {
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update_z(arg : byte) is {
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if (arg == 0) {
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if (arg == 0) {
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reg_status[1:1] = 1;
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reg_status[1:1] = 1;
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}
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}
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else {
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else {
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reg_status[1:1] = 0;
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reg_status[1:1] = 0;
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}
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}
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};
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};
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update_c(arg1 : byte, arg2 : byte) is {
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update_c(arg1 : byte, arg2 : byte) is {
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if (arg1 + arg2 > 256) {
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if (arg1 + arg2 > 256) {
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reg_status[0:0] = 1;
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reg_status[0:0] = 1;
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}
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}
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else {
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else {
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reg_status[0:0] = 0;
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reg_status[0:0] = 0;
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}
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}
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};
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};
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update_n(arg : byte) is {
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update_n(arg : byte) is {
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if (arg[7:7] == 1) {
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if (arg[7:7] == 1) {
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reg_status[7:7] = 1;
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reg_status[7:7] = 1;
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}
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}
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else {
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else {
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reg_status[7:7] = 0;
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reg_status[7:7] = 0;
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}
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}
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};
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};
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};
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};
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'>
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'>
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