`timescale 1ns / 1ps
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`timescale 1ns / 1ps
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`include "aDefinitions.v"
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`include "aDefinitions.v"
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/**********************************************************************************
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/**********************************************************************************
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Theia, Ray Cast Programable graphic Processing Unit.
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Theia, Ray Cast Programable graphic Processing Unit.
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Copyright (C) 2010 Diego Valverde (diego.valverde.g@gmail.com)
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Copyright (C) 2010 Diego Valverde (diego.valverde.g@gmail.com)
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This program is free software; you can redistribute it and/or
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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***********************************************************************************/
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***********************************************************************************/
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/*
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/*
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This unit is used when the External Address that comes into IO is not a immediate value,
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This unit is used when the External Address that comes into IO is not a immediate value,
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ie. it is a value that we need to read from one of our internal memory locations.
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ie. it is a value that we need to read from one of our internal memory locations.
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Since each internal memory locations contains 3 * 32bits slots, ie X,Y and Z parts of the
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Since each internal memory locations contains 3 * 32bits slots, ie X,Y and Z parts of the
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memory location, then we make three requests for external data, one for every X Y and Z
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memory location, then we make three requests for external data, one for every X Y and Z
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part of our internal registry.So, summarising, each internal memory location, stores 3
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part of our internal registry.So, summarising, each internal memory location, stores 3
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external memory addresses to request to WBM. Once the 3 data has been read from outside world,
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external memory addresses to request to WBM. Once the 3 data has been read from outside world,
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they will get stored back into 3 consecutive inernal memory addreses starting from
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they will get stored back into 3 consecutive inernal memory addreses starting from
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iDataInitialStorageAddress
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iDataInitialStorageAddress
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*/
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*/
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//---------------------------------------------------------------------
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//---------------------------------------------------------------------
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module MEM2WBMUnitB
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module MEM2WBMUnitB
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(
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(
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input wire Clock,
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input wire Clock,
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input wire Reset,
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input wire Reset,
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input wire iEnable,
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input wire iEnable,
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//output reg oSetAddress,
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//output reg oSetAddress,
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input wire[`DATA_ADDRESS_WIDTH-1:0] iMEMDataPointer,
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input wire[`DATA_ADDRESS_WIDTH-1:0] iMEMDataPointer,
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input wire[`DATA_ADDRESS_WIDTH-1:0] iMEMDataPointer2,
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input wire[`DATA_ADDRESS_WIDTH-1:0] iMEMDataPointer2,
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output wire [`WIDTH-1:0] oReadDataElement,
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output wire [`WIDTH-1:0] oReadDataElement,
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output wire [`WIDTH-1:0] oReadDataElement2,
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output wire [`WIDTH-1:0] oReadDataElement2,
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output wire[`DATA_ADDRESS_WIDTH-1:0] oDataReadAddress, //This tells MEM unit from wich address we want to read
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output wire[`DATA_ADDRESS_WIDTH-1:0] oDataReadAddress, //This tells MEM unit from wich address we want to read
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output wire[`DATA_ADDRESS_WIDTH-1:0] oDataReadAddress2, //This tells MEM unit from wich address we want to read
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output wire[`DATA_ADDRESS_WIDTH-1:0] oDataReadAddress2, //This tells MEM unit from wich address we want to read
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input wire [`DATA_ROW_WIDTH-1:0] iReadDataBus, //This comes from the MEM unit
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input wire [`DATA_ROW_WIDTH-1:0] iReadDataBus, //This comes from the MEM unit
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input wire [`DATA_ROW_WIDTH-1:0] iReadDataBus2, //This comes from the MEM unit
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input wire [`DATA_ROW_WIDTH-1:0] iReadDataBus2, //This comes from the MEM unit
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output wire oDataWriteEnable,
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output wire oDataWriteEnable,
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output wire oDataWriteEnable2,
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output wire oDataWriteEnable2,
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output wire oDataAvailable,
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output wire oDataAvailable,
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input wire iRequestNextElement,
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input wire iRequestNextElement,
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input wire[`DATA_ADDRESS_WIDTH-1:0] iDataInitialStorageAddress, //Initial address to store data ////########
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input wire[`DATA_ADDRESS_WIDTH-1:0] iDataInitialStorageAddress, //Initial address to store data ////########
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output wire[`DATA_ADDRESS_WIDTH-1:0] oDataWriteAddress, //Were to store the values comming from WBM ////########
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output wire[`DATA_ADDRESS_WIDTH-1:0] oDataWriteAddress, //Were to store the values comming from WBM ////########
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output wire oDone
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output wire oDone
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);
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);
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assign oDataWriteEnable2 = 0;
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assign oDataWriteEnable2 = 0;
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assign oDataWriteEnable = 0; //We only read.
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assign oDataWriteEnable = 0; //We only read.
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wire [3:0] wXYZSelector;
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wire [3:0] wXYZSelector;
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wire[`WIDTH-1:0] wValueFromBus,wLatchedValue;
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wire[`WIDTH-1:0] wValueFromBus,wLatchedValue;
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assign oDataReadAddress = iMEMDataPointer;
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assign oDataReadAddress = iMEMDataPointer;
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assign oDataReadAddress2 = iMEMDataPointer2;
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assign oDataReadAddress2 = iMEMDataPointer2;
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assign oDone = wXYZSelector[3];
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assign oDone = wXYZSelector[3];
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wire wLacthNow;
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wire wLacthNow;
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wire iRequestNextElement_Delay;
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wire iRequestNextElement_Delay;
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FFD_POSEDGE_SYNCRONOUS_RESET # (1) FFD32_x
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FFD_POSEDGE_SYNCRONOUS_RESET # (1) FFD32_x
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(
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(
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.Clock( Clock ),
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.Clock( Clock ),
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.Reset( Reset ),
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.Reset( Reset ),
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.Enable( 1'b1 ),
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.Enable( 1'b1 ),
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.D( iRequestNextElement ),
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.D( iRequestNextElement ),
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.Q( iRequestNextElement_Delay )
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.Q( iRequestNextElement_Delay )
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);
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);
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assign oDataAvailable = iEnable & ~iRequestNextElement_Delay & wLacthNow;// & ~oDone;
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assign oDataAvailable = iEnable & ~iRequestNextElement_Delay & wLacthNow;// & ~oDone;
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FFD_POSEDGE_SYNCRONOUS_RESET # (1) FFD32_EnableDelay
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FFD_POSEDGE_SYNCRONOUS_RESET # (1) FFD32_EnableDelay
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(
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(
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.Clock( Clock ),
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.Clock( Clock ),
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.Reset( Reset ),
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.Reset( Reset ),
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.Enable( 1'b1 ),
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.Enable( 1'b1 ),
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.D( iEnable ),
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.D( iEnable ),
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.Q( wLacthNow )
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.Q( wLacthNow )
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);
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);
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assign oDataWriteAddress = iDataInitialStorageAddress;
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assign oDataWriteAddress = iDataInitialStorageAddress;
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SHIFTLEFT_POSEDGE #(4) SHL
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SHIFTLEFT_POSEDGE #(4) SHL
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(
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(
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.Clock(iRequestNextElement | ~iEnable),
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.Clock(iRequestNextElement | ~iEnable),
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.Enable(1'b1),
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.Enable(1'b1),
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.Reset(~iEnable | Reset ),
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.Reset(~iEnable | Reset ),
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.Initial(4'b1),
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.Initial(4'b1),
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.O(wXYZSelector)
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.O(wXYZSelector)
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);
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);
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MUXFULLPARALELL_3SEL_WALKINGONE MUXA
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MUXFULLPARALELL_3SEL_WALKINGONE MUXA
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(
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(
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.Sel( wXYZSelector[2:0] ),
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.Sel( wXYZSelector[2:0] ),
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.I2( iReadDataBus[63:32]),
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.I2( iReadDataBus[63:32]),
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.I1( iReadDataBus[95:64]),
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.I1( iReadDataBus[95:64]),
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.I3( iReadDataBus[31:0] ),
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.I3( iReadDataBus[31:0] ),
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.O1( oReadDataElement )
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.O1( oReadDataElement )
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);
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);
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MUXFULLPARALELL_3SEL_WALKINGONE MUXA2
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MUXFULLPARALELL_3SEL_WALKINGONE MUXA2
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(
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(
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.Sel( wXYZSelector[2:0] ),
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.Sel( wXYZSelector[2:0] ),
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.I2( iReadDataBus2[63:32]),
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.I2( iReadDataBus2[63:32]),
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.I1( iReadDataBus2[95:64]),
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.I1( iReadDataBus2[95:64]),
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.I3( iReadDataBus2[31:0] ),
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.I3( iReadDataBus2[31:0] ),
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.O1( oReadDataElement2 )
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.O1( oReadDataElement2 )
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);
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);
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endmodule
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endmodule
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