`timescale 1ns / 1ps
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`timescale 1ns / 1ps
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`include "aDefinitions.v"
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`include "aDefinitions.v"
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//--------------------------------------------------------------------------
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//--------------------------------------------------------------------------
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module Module_TMemInterface
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module Module_TMemInterface
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(
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(
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input wire Clock,
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input wire Clock,
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input wire Reset,
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input wire Reset,
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input wire iEnable,
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input wire iEnable,
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input wire [`DATA_ROW_WIDTH-1:0] iAddress,
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input wire [`DATA_ROW_WIDTH-1:0] iAddress,
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output wire [`DATA_ROW_WIDTH-1:0] oData,
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output wire [`DATA_ROW_WIDTH-1:0] oData,
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output wire oDone,
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output wire oDone,
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input wire ACK_I,
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input wire ACK_I,
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input wire GNT_I,
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input wire GNT_I,
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input wire [`WB_WIDTH-1:0 ] DAT_I,
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input wire [`WB_WIDTH-1:0 ] DAT_I,
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//WB Output Signals
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//WB Output Signals
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output wire [`WB_WIDTH-1:0 ] ADR_O,
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output wire [`WB_WIDTH-1:0 ] ADR_O,
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output wire WE_O,
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output wire WE_O,
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output wire STB_O,
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output wire STB_O,
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output wire CYC_O
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output wire CYC_O
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);
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);
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wire [3:0] wCurrentWord;
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wire [3:0] wCurrentWord;
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wire wDone;
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wire wDone;
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assign oDone = wDone & iEnable;
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assign oDone = wDone & iEnable;
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FFD_POSEDGE_SYNCRONOUS_RESET # ( 1 ) FFD_DONE
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FFD_POSEDGE_SYNCRONOUS_RESET # ( 1 ) FFD_DONE
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(
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(
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.Clock(Clock),
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.Clock(Clock),
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.Reset(Reset),
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.Reset(Reset),
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.Enable( 1'b1 ),
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.Enable( 1'b1 ),
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.D(wCurrentWord[3]),
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.D(wCurrentWord[3]),
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.Q(wDone)
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.Q(wDone)
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);
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);
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//wire wShiftNow;
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//wire wShiftNow;
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assign WE_O = 1'b0; //we only read
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assign WE_O = 1'b0; //we only read
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assign CYC_O = iEnable;
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assign CYC_O = iEnable;
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wire[2:0] wLatchNow;
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wire[2:0] wLatchNow;
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FFD_POSEDGE_SYNCRONOUS_RESET # ( 3 ) FFD_LATHCNOW
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FFD_POSEDGE_SYNCRONOUS_RESET # ( 3 ) FFD_LATHCNOW
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(
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(
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.Clock(Clock),
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.Clock(Clock),
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.Reset(Reset),
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.Reset(Reset),
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.Enable( 1'b1 ),
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.Enable( 1'b1 ),
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.D(wCurrentWord[2:0]),
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.D(wCurrentWord[2:0]),
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.Q(wLatchNow)
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.Q(wLatchNow)
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);
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);
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SHIFTLEFT_POSEDGE #(4) SHL
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SHIFTLEFT_POSEDGE #(4) SHL
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(
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(
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.Clock(Clock),
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.Clock(Clock),
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.Enable(iEnable & GNT_I),//wShiftNow),
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.Enable(iEnable & GNT_I),//wShiftNow),
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.Reset(Reset | ~iEnable ),
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.Reset(Reset | ~iEnable ),
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.Initial(4'b1),
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.Initial(4'b1),
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.O(wCurrentWord)
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.O(wCurrentWord)
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);
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);
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MUXFULLPARALELL_3SEL_WALKINGONE # ( `WB_WIDTH ) MUX1
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MUXFULLPARALELL_3SEL_WALKINGONE # ( `WB_WIDTH ) MUX1
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(
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(
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.Sel( wCurrentWord[2:0] ),
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.Sel( wCurrentWord[2:0] ),
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.I3(iAddress[31:0]),
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.I3(iAddress[31:0]),
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.I2(iAddress[63:32]),
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.I2(iAddress[63:32]),
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.I1(iAddress[95:64]),
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.I1(iAddress[95:64]),
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.O1( ADR_O )
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.O1( ADR_O )
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);
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);
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FFD_POSEDGE_SYNCRONOUS_RESET # ( `WIDTH ) FFDX
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FFD_POSEDGE_SYNCRONOUS_RESET # ( `WIDTH ) FFDX
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(
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(
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.Clock(Clock),
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.Clock(Clock),
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.Reset(Reset),
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.Reset(Reset),
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.Enable( wLatchNow[0] & GNT_I),
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.Enable( wLatchNow[0] & GNT_I),
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.D(DAT_I),
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.D(DAT_I),
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.Q(oData[95:64])
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.Q(oData[95:64])
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);
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);
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FFD_POSEDGE_SYNCRONOUS_RESET # ( `WIDTH ) FFDY
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FFD_POSEDGE_SYNCRONOUS_RESET # ( `WIDTH ) FFDY
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(
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(
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.Clock(Clock),
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.Clock(Clock),
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.Reset(Reset),
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.Reset(Reset),
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.Enable( wLatchNow[1] & GNT_I),
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.Enable( wLatchNow[1] & GNT_I),
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.D(DAT_I),
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.D(DAT_I),
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.Q(oData[63:32])
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.Q(oData[63:32])
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);
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);
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FFD_POSEDGE_SYNCRONOUS_RESET # ( `WIDTH ) FFDZ
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FFD_POSEDGE_SYNCRONOUS_RESET # ( `WIDTH ) FFDZ
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(
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(
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.Clock(Clock),
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.Clock(Clock),
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.Reset( Reset ),
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.Reset( Reset ),
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.Enable( wLatchNow[2] & GNT_I),
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.Enable( wLatchNow[2] & GNT_I),
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.D(DAT_I),
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.D(DAT_I),
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.Q(oData[31:0])
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.Q(oData[31:0])
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);
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);
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endmodule
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endmodule
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