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/* Copyright 2005-2006, Technologic Systems
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* All Rights Reserved.
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*
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* Author(s): Jesse Off <joff@embeddedARM.com>
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*/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License v2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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module wb32_bridge(
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wb_clk_i,
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wb_rst_i,
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wb16_adr_i,
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wb16_dat_i,
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wb16_dat_o,
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wb16_cyc_i,
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wb16_stb_i,
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wb16_we_i,
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wb16_ack_o,
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wbm_adr_o,
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wbm_dat_o,
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wbm_dat_i,
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wbm_cyc_o,
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wbm_stb_o,
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wbm_we_o,
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wbm_ack_i,
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wbm_sel_o
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);
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input wb_clk_i, wb_rst_i;
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input [22:0] wb16_adr_i;
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input [15:0] wb16_dat_i;
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output [15:0] wb16_dat_o;
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input wb16_cyc_i, wb16_stb_i, wb16_we_i;
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output wb16_ack_o;
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output [21:0] wbm_adr_o;
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output [3:0] wbm_sel_o;
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input [31:0] wbm_dat_i;
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output [31:0] wbm_dat_o;
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output wbm_cyc_o, wbm_stb_o, wbm_we_o;
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input wbm_ack_i;
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reg [15:0] datlatch;
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reg wb16_ack_o, wbm_cyc_o, wbm_stb_o;
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assign wb16_dat_o = wb16_adr_i[0] ? datlatch : wbm_dat_i[15:0];
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always @(wb16_adr_i or wb16_we_i or wb16_cyc_i or wb16_stb_i or wbm_ack_i) begin
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wb16_ack_o = 1'b0;
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wbm_cyc_o = 1'b0;
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wbm_stb_o = 1'b0;
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if (wb16_cyc_i && wb16_stb_i) begin
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if (!wb16_we_i && wb16_adr_i[0]) begin
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wb16_ack_o = 1'b1;
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end else if (wb16_we_i && !wb16_adr_i[0]) begin
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wb16_ack_o = 1'b1;
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end else begin
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wbm_cyc_o = 1'b1;
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wbm_stb_o = 1'b1;
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wb16_ack_o = wbm_ack_i;
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end
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end
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end
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assign wbm_dat_o = {wb16_dat_i, datlatch};
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assign wbm_we_o = wb16_we_i;
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assign wbm_adr_o = wb16_adr_i[22:1];
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assign wbm_sel_o = 4'b1111;
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always @(posedge wb_clk_i) begin
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if (wbm_ack_i && wbm_stb_o && wbm_cyc_o && !wbm_we_o)
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datlatch <= wbm_dat_i[31:16];
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if (wb16_cyc_i && wb16_stb_i && wb16_we_i && !wb16_adr_i[0])
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datlatch <= wb16_dat_i;
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end
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endmodule
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