#include "tv_responder.h"
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#include "tv_responder.h"
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uint64_t get_time_stamp () {
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sc_time t;
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t = sc_time_stamp();
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return t.value();
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}
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void tv_responder::event ()
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void tv_responder::event ()
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{
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{
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// init
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// init
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//reset_n = 0;
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//reset_n = 0;
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/*
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/*
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wait_n = 1;
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wait_n = 1;
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int_n = 1;
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int_n = 1;
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nmi_n = 1;
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nmi_n = 1;
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busrq_n = 1;
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busrq_n = 1;
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di_resp = 0;
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di_resp = 0;
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*/
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*/
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uint8_t oldval;
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if (reset_time > 0) {
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if (reset_time > 0) {
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reset_n = 0;
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reset_n = 0;
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wait_n = 1;
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wait_n = 1;
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int_n = 1;
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int_n = 1;
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nmi_n = 1;
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nmi_n = 1;
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busrq_n = 1;
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busrq_n = 1;
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di_resp = 0;
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di_resp = 0;
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reset_time--;
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reset_time--;
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if (reset_time == 0)
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if (reset_time == 0)
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printf ("Initialization complete.\n");
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printf ("Initialization complete.\n");
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return;
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return;
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} else {
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} else {
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if (reset_time == 0) {
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if (reset_time == 0) {
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reset_n = 1;
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reset_n = 1;
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reset_time--;
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reset_time--;
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}
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}
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}
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}
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if (!iorq_n & !rd_n)
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if (!iorq_n & !rd_n)
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{
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{
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switch (addr) {
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switch (addr) {
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case (0x82) : di_resp = timeout_ctl; break;
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case (0x82) : di_resp = timeout_ctl; break;
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case(0x83) : di_resp = max_timeout & 0xff; break;
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case(0x83) : di_resp = max_timeout & 0xff; break;
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case(0x84) : di_resp = max_timeout >> 8; break;
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case(0x84) : di_resp = max_timeout >> 8; break;
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case(0x90) : di_resp = int_countdown; break;
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case(0x90) : di_resp = int_countdown; break;
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case(0x91) : di_resp = checksum; break;
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case(CKSUM_VALUE) :
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di_resp = checksum;
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//printf ("%2.6f: Read checksum value of %02x\n", sc_time_stamp().to_seconds(), checksum);
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break;
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case(0x93) : di_resp = ior_value; break;
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case(0x93) : di_resp = ior_value; break;
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case(0x94) : di_resp = rand(); break;
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case(0x94) : di_resp = rand(); break;
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case(0x95) : di_resp = nmi_countdown; break;
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case(0x95) : di_resp = nmi_countdown; break;
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case(0xA0) : di_resp = nmi_trigger; break;
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case(0xA0) : di_resp = nmi_trigger; break;
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default : di_resp = 0;
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default : di_resp = 0;
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}
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}
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} // if (!iorq_n & !rd_n)
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} // if (!iorq_n & !rd_n)
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// wire wr_stb;
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// wire wr_stb;
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// reg last_iowrite;
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// reg last_iowrite;
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// assign wr_stb = (!iorq_n & !wr_n);
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// assign wr_stb = (!iorq_n & !wr_n);
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// always @(posedge clk)
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// always @(posedge clk)
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// begin
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// begin
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//last_iowrite <= #1 wr_stb;
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//last_iowrite <= #1 wr_stb;
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//if (!iorq_n && !wr_n)
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//if (!iorq_n && !wr_n)
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// printf ("DEBUG: I/O Write detected addr=%02x\n", 0xff & (int) addr.read());
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// printf ("DEBUG: I/O Write detected addr=%02x\n", 0xff & (int) addr.read());
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if (!iorq_n && !wr_n && !last_iowrite) {
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if (!iorq_n && !wr_n && !last_iowrite) {
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int l_dout, l_addr;
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int l_dout, l_addr;
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l_addr = addr.read();
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l_addr = addr.read();
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l_dout = dout.read();
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l_dout = dout.read();
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last_iowrite = true;
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last_iowrite = true;
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switch ( l_addr & 0xff) {
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switch ( l_addr & 0xff) {
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case(0x80) :
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case(SIM_CTL_PORT) :
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// dump control deprecated
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// dump control deprecated
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if (l_dout == 1) {
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if (l_dout == 1) {
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printf ("%8d: --- TEST PASSED ---\n", 0);
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printf ("%2.6f: --- TEST PASSED ---\n", sc_time_stamp().to_seconds());
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sc_stop();
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sc_stop();
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} else if (l_dout == 2) {
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} else if (l_dout == 2) {
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printf ("%8d: !!! TEST FAILED !!!\n", 0);
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printf ("%2.6f: !!! TEST FAILED !!!\n", sc_time_stamp().to_seconds());
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sc_stop();
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sc_stop();
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}
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}
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break;
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break;
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case(0x81) :
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case(MSG_PORT) :
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//printf ("%s: DEBUG : Detected write of character %x\n", sc_time_stamp().to_string(), l_dout);
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//cout << sc_time_stamp().to_string() << "DEBUG : Detected write of character " << l_dout << endl;
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if (l_dout == 0x0A) {
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if (l_dout == 0x0A) {
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//printf ("%8d: PROGRAM : ", sc_simulation_time());
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printf ("%2.6f: PROGRAM : ", sc_time_stamp().to_seconds());
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cout << sc_time_stamp() << ": PROGRAM : ";
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for (int i=0; i<buf_ptr; i=i+1)
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for (int i=0; i<buf_ptr; i=i+1)
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//printf ("%s", str_buf[i]);
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printf ("%c", str_buf[i]);
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cout << str_buf[i];
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//printf ("\n");
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printf ("\n");
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cout << endl;
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buf_ptr = 0;
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buf_ptr = 0;
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} else {
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} else {
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str_buf[buf_ptr] = (char) (l_dout & 0xff);
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str_buf[buf_ptr] = (char) (l_dout & 0xff);
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buf_ptr = buf_ptr + 1;
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buf_ptr = buf_ptr + 1;
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}
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}
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break;
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break;
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case(0x82) :
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case(TIMEOUT_PORT) :
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timeout_ctl = l_dout;
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timeout_ctl = l_dout;
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break;
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break;
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case(0x83) :
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case(MAX_TIMEOUT_LOW) :
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max_timeout = l_dout | (max_timeout & 0xFF00);
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max_timeout = l_dout | (max_timeout & 0xFF00);
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break;
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break;
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case(0x84) :
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case(MAX_TIMEOUT_HIGH) :
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max_timeout = l_dout << 8 | (max_timeout & 0x00FF);
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max_timeout = (l_dout << 8) | (max_timeout & 0x00FF);
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printf ("%2.6f: ENVIRON : Timeout reset to %d (dout=%d)\n", sc_time_stamp().to_seconds(), max_timeout, l_dout);
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break;
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break;
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case(0x90) : int_countdown = dout; break;
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case(0x90) : int_countdown = dout; break;
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case(0x91) : checksum = dout; break;
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case(CKSUM_VALUE) : checksum = dout; break;
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case(0x92) : checksum = checksum + dout; break;
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case(CKSUM_ACCUM) :
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oldval = checksum;
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checksum = checksum + dout;
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//printf ("%2.6f: ENVIRON : cksum %02x=%02x + %02x\n", sc_time_stamp().to_seconds(), checksum, oldval, l_dout);
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break;
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case(0x93) : ior_value = dout; break;
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case(0x93) : ior_value = dout; break;
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case(0x95) : nmi_countdown = dout; break;
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case(0x95) : nmi_countdown = dout; break;
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case(0xA0) : nmi_trigger = dout; break;
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case(0xA0) : nmi_trigger = dout; break;
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}
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}
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} else if (iorq_n)
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} else if (iorq_n)
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last_iowrite = false;
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last_iowrite = false;
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if (timeout_ctl & 0x2)
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if (timeout_ctl & 0x2) {
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cur_timeout = 0;
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cur_timeout = 0;
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else if (timeout_ctl & 0x1)
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timeout_ctl = timeout_ctl & 1;
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} else if (timeout_ctl & 0x1)
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cur_timeout = cur_timeout + 1;
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cur_timeout = cur_timeout + 1;
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if (cur_timeout >= max_timeout) {
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if (cur_timeout >= max_timeout) {
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printf ("%8d: ERROR : Reached timeout %d cycles\n", 0, max_timeout);
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printf ("%2.6f: ERROR : Reached timeout %d cycles\n", sc_time_stamp().to_seconds(), max_timeout);
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//tb_top.test_fail;
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//tb_top.test_fail;
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sc_stop();
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sc_stop();
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}
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}
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if (int_countdown == 0) {
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if (int_countdown == 0) {
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int_n = 1;
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int_n = 1;
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} else if (int_countdown == 1)
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} else if (int_countdown == 1)
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int_n = 0;
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int_n = 0;
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else if (int_countdown > 1) {
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else if (int_countdown > 1) {
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int_countdown = int_countdown - 1;
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int_countdown = int_countdown - 1;
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int_n = 1;
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int_n = 1;
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}
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}
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// when nmi countdown reaches 1, an NMI will be issued.
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// when nmi countdown reaches 1, an NMI will be issued.
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// to clear the interrupt, write nmi_countdown to 0.
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// to clear the interrupt, write nmi_countdown to 0.
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if ((nmi_countdown == 0) && (nmi_trigger == 0))
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if ((nmi_countdown == 0) && (nmi_trigger == 0))
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nmi_n = 1;
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nmi_n = 1;
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else if (nmi_countdown == 1)
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else if (nmi_countdown == 1)
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nmi_n = 0;
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nmi_n = 0;
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else if (nmi_countdown > 1) {
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else if (nmi_countdown > 1) {
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nmi_countdown = nmi_countdown - 1;
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nmi_countdown = nmi_countdown - 1;
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nmi_n = 1;
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nmi_n = 1;
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}
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}
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// when IR equals the target instruction, an NMI will be
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// when IR equals the target instruction, an NMI will be
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// issued. To clear the interrupt, write nmi_trigger to
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// issued. To clear the interrupt, write nmi_trigger to
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// zero.
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// zero.
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/* can't do this in systemc
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/* can't do this in systemc
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if (nmi_trigger != 0) {
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if (nmi_trigger != 0) {
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if (nmi_trigger === tb_top.tv80s_inst.i_tv80_core.IR[7:0])
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if (nmi_trigger === tb_top.tv80s_inst.i_tv80_core.IR[7:0])
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begin
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begin
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tb_top.nmi_n <= #80 0;
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tb_top.nmi_n <= #80 0;
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tb_top.nmi_n <= #160 1;
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tb_top.nmi_n <= #160 1;
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end
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end
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} else if (nmi_countdown == 0)
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} else if (nmi_countdown == 0)
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nmi_n = 1;
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nmi_n = 1;
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*/
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*/
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}
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}
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