#!/usr/bin/python
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#!/usr/bin/python
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# Copyright (c) 2004 Guy Hutchison (ghutchis@opencores.org)
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# Copyright (c) 2004 Guy Hutchison (ghutchis@opencores.org)
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#
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# to deal in the Software without restriction, including without limitation
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# and/or sell copies of the Software, and to permit persons to whom the
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# and/or sell copies of the Software, and to permit persons to whom the
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# Software is furnished to do so, subject to the following conditions:
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# Software is furnished to do so, subject to the following conditions:
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#
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#
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# The above copyright notice and this permission notice shall be included
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# The above copyright notice and this permission notice shall be included
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# in all copies or substantial portions of the Software.
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# in all copies or substantial portions of the Software.
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#
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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# This script generates I/O mapped control and status registers based
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# This script generates I/O mapped control and status registers based
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# on an XML configuration file.
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# on an XML configuration file.
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import reglib
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import reglib
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import xml.dom.minidom
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import xml.dom.minidom
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import sys, os, re
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import sys, os, re
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def node_info (node):
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def node_info (node):
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print "Methods:",dir(node)
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print "Methods:",dir(node)
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print "Child Nodes:",node.childNodes
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print "Child Nodes:",node.childNodes
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def create_reg_group (node):
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def create_reg_group (node):
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rg = reglib.register_group()
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rg = reglib.register_group()
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rg.name = node.getAttribute ("name")
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rg.name = node.getAttribute ("name")
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rg.addr_size = reglib.number(node.getAttribute ("addr_sz"))
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rg.addr_size = reglib.number(node.getAttribute ("addr_sz"))
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rg.base_addr = reglib.number(node.getAttribute ("base_addr"))
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rg.base_addr = reglib.number(node.getAttribute ("base_addr"))
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return rg
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return rg
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def create_register (rg, node):
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def create_register (rg, node):
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params = {}
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params = {}
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params['name'] = node.getAttribute ("name")
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params['name'] = node.getAttribute ("name")
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type = node.getAttribute ("type")
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type = node.getAttribute ("type")
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params['width'] = int(node.getAttribute ("width"))
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params['width'] = int(node.getAttribute ("width"))
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params['default'] = node.getAttribute ("default")
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params['default'] = node.getAttribute ("default")
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params['int_value'] = node.getAttribute ("int_value")
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params['int_value'] = node.getAttribute ("int_value")
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# May switch to this code later for a more general implementation
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# May switch to this code later for a more general implementation
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#for anode in node.childNodes:
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#for anode in node.childNodes:
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# if anode.nodeType = anode.ATTRIBUTE_NODE:
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# if anode.nodeType = anode.ATTRIBUTE_NODE:
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# params[anode.nodeName] = anode.nodeValue
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# params[anode.nodeName] = anode.nodeValue
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if type == '': type = 'config'
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if type == '': type = 'config'
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if params['default'] == '': params['default'] = 0
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if params['default'] == '': params['default'] = 0
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else: params['default'] = reglib.number (params['default'])
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else: params['default'] = reglib.number (params['default'])
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rg.add_register (type, params)
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rg.add_register (type, params)
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def create_verilog (top_node):
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def create_verilog (top_node):
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rg = create_reg_group (top_node)
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rg = create_reg_group (top_node)
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# get list of register nodes
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# get list of register nodes
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reg_nodes = top_node.getElementsByTagName ("register")
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reg_nodes = top_node.getElementsByTagName ("register")
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for r in reg_nodes:
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for r in reg_nodes:
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create_register (rg, r)
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create_register (rg, r)
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fname = rg.name + ".v"
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fname = rg.name + ".v"
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fh = open (fname, 'w')
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fh = open (fname, 'w')
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fh.write (rg.verilog())
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fh.write (rg.verilog())
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fh.close()
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fh.close()
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def parse_file (filename):
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def parse_file (filename):
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rdoc = xml.dom.minidom.parse (filename)
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rdoc = xml.dom.minidom.parse (filename)
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blk_list = rdoc.getElementsByTagName ("tv_registers")
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blk_list = rdoc.getElementsByTagName ("tv_registers")
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for blk in blk_list:
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for blk in blk_list:
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create_verilog (blk)
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create_verilog (blk)
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rdoc.unlink()
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rdoc.unlink()
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if (len (sys.argv) > 1):
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if (len (sys.argv) > 1):
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parse_file (sys.argv[1])
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parse_file (sys.argv[1])
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else:
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else:
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print "Usage: %s <filename>" % os.path.basename (sys.argv[0])
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print "Usage: %s <filename>" % os.path.basename (sys.argv[0])
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