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[/] [tv80/] [trunk/] [tests/] [basic_int.asm] - Diff between revs 2 and 84
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| Rev 2 |
Rev 84 |
.module basic_int
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.module basic_int
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test_ctl_port = 0x80
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test_ctl_port = 0x80
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print_port = 0x81
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print_port = 0x81
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int_timeout_port = 0x90
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int_timeout_port = 0x90
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.area BOOT_VEC
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.area BOOT_VEC
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jp main
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jp main
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.area INT_VEC
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.area INT_VEC
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int_entry:
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int_entry:
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exx
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exx
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ld b, a
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ld b, a
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ld hl, #int_seen_str
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ld hl, #int_seen_str
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print_str:
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print_str:
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ld a, (hl)
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ld a, (hl)
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cp #0
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cp #0
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jp z, print_str_exit
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jp z, print_str_exit
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out (print_port), a
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out (print_port), a
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inc hl
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inc hl
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jp print_str
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jp print_str
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print_str_exit:
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print_str_exit:
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ld a, b
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ld a, b
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exx
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exx
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ld h, #1
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ld h, #1
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reti
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reti
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.area _CODE
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.area _CODE
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main:
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main:
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ld h, #0
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ld h, #0
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ld bc, #100
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ld bc, #100
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ld a, #50
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ld a, #50
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out (int_timeout_port), a
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out (int_timeout_port), a
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test_timeout_loop:
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test_timeout_loop:
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ld a, #1
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ld a, #1
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cp h
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cp h
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jp z, test_pass
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jp z, test_pass
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dec bc
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dec bc
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jp nz, test_timeout_loop
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jp nz, test_timeout_loop
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test_fail:
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test_fail:
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ld a, #2
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ld a, #2
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out (test_ctl_port), a
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out (test_ctl_port), a
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.db 0x76 ; hlt
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.db 0x76 ; hlt
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test_pass:
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test_pass:
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ld a, #1
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ld a, #1
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out (test_ctl_port), a
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out (test_ctl_port), a
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.db 0x76 ; hlt
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.db 0x76 ; hlt
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.area _DATA
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.area _DATA
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int_seen_str:
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int_seen_str:
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.ascii "Interrupt asserted"
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.ascii "Interrupt asserted"
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.db 0x0a
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.db 0x0a
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.db 0x00
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.db 0x00
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