//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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//
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//
|
// UART2BUS VERIFICATION
|
// UART2BUS VERIFICATION
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//
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//
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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// CREATOR : HANY SALAH
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// CREATOR : HANY SALAH
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// PROJECT : UART2BUS UVM TEST BENCH
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// PROJECT : UART2BUS UVM TEST BENCH
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// UNIT : TEST
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// UNIT : TEST
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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// TITLE : UART TEST
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// TITLE : UART TEST
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// DESCRIPTION: THIS COMPONENT INCLUDES THE MAIN TESTS THAT WILL BE FORCED TO THE DUT. IT INCLUDES
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// DESCRIPTION: THIS COMPONENT INCLUDES THE MAIN TESTS THAT WILL BE FORCED TO THE DUT. IT INCLUDES
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// VIRTUAL BASE TEST FUNCTION THAT SHARES THE MOST COMMON ATTRIBUTES OF ALL TESTS.
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// VIRTUAL BASE TEST FUNCTION THAT SHARES THE MOST COMMON ATTRIBUTES OF ALL TESTS.
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// THE TESTS IMPLEMENTED THROUGH BELOW ARE RELATED TO THE TESTBENCH SPECIFICATIONS
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// THE TESTS IMPLEMENTED THROUGH BELOW ARE RELATED TO THE TESTBENCH SPECIFICATIONS
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// DOCUMENT. YOU CAN DOWNLOAD IT DIRECTLY THROUGH OPENCORES.COM OR FIND IT IN THE DOC
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// DOCUMENT. YOU CAN DOWNLOAD IT DIRECTLY THROUGH OPENCORES.COM OR FIND IT IN THE DOC
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// DIRECTORY.
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// DIRECTORY.
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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// LOG DETAILS
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// LOG DETAILS
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//-------------
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//-------------
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// VERSION NAME DATE DESCRIPTION
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// VERSION NAME DATE DESCRIPTION
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// 1 HANY SALAH 10012016 FILE CREATION
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// 1 HANY SALAH 10012016 FILE CREATION
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// 2 HANY SALAH 20012016 ADD BINARY MODE TESTS AND INVALID TESTS
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// 2 HANY SALAH 20012016 ADD BINARY MODE TESTS AND INVALID TESTS
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// 3 HANY SALAH 12022016 IMPROVE BLOCK DESCRIPTION & ADD COMMENTS
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// 3 HANY SALAH 12022016 IMPROVE BLOCK DESCRIPTION & ADD COMMENTS
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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// ALL COPYRIGHTS ARE RESERVED FOR THE PRODUCER ONLY .THIS FILE IS PRODUCED FOR OPENCORES MEMBERS
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// ALL COPYRIGHTS ARE RESERVED FOR THE PRODUCER ONLY .THIS FILE IS PRODUCED FOR OPENCORES MEMBERS
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// ONLY AND IT IS PROHIBTED TO USE THIS MATERIAL WITHOUT THE CREATOR'S PERMISSION
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// ONLY AND IT IS PROHIBTED TO USE THIS MATERIAL WITHOUT THE CREATOR'S PERMISSION
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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// The base test class that includes the uvm printer and establish the whole environment.
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// The base test class that includes the uvm printer and establish the whole environment.
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// It also responsible for setting the environment configurations described in details through the
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// It also responsible for setting the environment configurations described in details through the
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// testbench specifications document.
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// testbench specifications document.
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// The environment configurations are set during the end of elaboration phase. It includes:
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// The environment configurations are set during the end of elaboration phase. It includes:
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// ----------------------------------------------------------------------------------------
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// ----------------------------------------------------------------------------------------
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// - The active edge : The active clock edge at which, the data is changed on the UART buses.
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// - The active edge : The active clock edge at which, the data is changed on the UART buses.
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// It could be positive edge or negative edge.
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// It could be positive edge or negative edge.
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// ----------------------------------------------------------------------------------------
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// ----------------------------------------------------------------------------------------
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// - The start bit : Represent the sequence through which the byte is serialized; either to
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// - The start bit : Represent the sequence through which the byte is serialized; either to
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// start with the most significant bit or the least significant bit.
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// start with the most significant bit or the least significant bit.
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// ----------------------------------------------------------------------------------------
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// ----------------------------------------------------------------------------------------
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// - The data format : The data representation through the text commands either to be ASCII
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// - The data format : The data representation through the text commands either to be ASCII
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// format or ordinary binary format.
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// format or ordinary binary format.
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// ----------------------------------------------------------------------------------------
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// ----------------------------------------------------------------------------------------
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// - The number of stop: The number of stop bits sent after the latest bit of each byte. It
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// - The number of stop: The number of stop bits sent after the latest bit of each byte. It
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// bit(s) would be either one or two bits
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// bit(s) would be either one or two bits
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// ----------------------------------------------------------------------------------------
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// ----------------------------------------------------------------------------------------
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// - The number of bits: The number of bits within each transferred field. It would be either
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// - The number of bits: The number of bits within each transferred field. It would be either
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// in the field 7 or 8 bits per field.
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// in the field 7 or 8 bits per field.
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// ----------------------------------------------------------------------------------------
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// ----------------------------------------------------------------------------------------
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// - The parity mode : The used parity type of each field. It would be either no parity bit,
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// - The parity mode : The used parity type of each field. It would be either no parity bit,
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// odd parity or even parity.
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// odd parity or even parity.
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// ----------------------------------------------------------------------------------------
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// ----------------------------------------------------------------------------------------
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// - The response time : Represent the maximum allowable time within which DUT should respond
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// - The response time : Represent the maximum allowable time within which DUT should respond
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// to the driven request.
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// to the driven request.
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// ----------------------------------------------------------------------------------------
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// ----------------------------------------------------------------------------------------
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// - The false data : Enable force false data on the output port within the read command
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// - The false data : Enable force false data on the output port within the read command
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// enable through the both modes; text or binary.
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// enable through the both modes; text or binary.
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// ----------------------------------------------------------------------------------------
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// ----------------------------------------------------------------------------------------
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virtual class uart_base_test extends uvm_test;
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virtual class uart_base_test extends uvm_test;
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uart_env env;
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uart_env env;
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uvm_table_printer printer;
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uvm_table_printer printer;
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uart_config _config;
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uart_config _config;
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int matched ;
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int matched ;
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uvm_report_server report_server;
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uvm_report_server report_server;
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`uvm_component_utils_begin(uart_base_test)
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`uvm_component_utils_begin(uart_base_test)
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`uvm_field_int(matched,UVM_ALL_ON)
|
`uvm_field_int(matched,UVM_ALL_ON)
|
`uvm_component_utils_end
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`uvm_component_utils_end
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|
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function new (string name,uvm_component parent);
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function new (string name,uvm_component parent);
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super.new(name,parent);
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super.new(name,parent);
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endfunction:new
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endfunction:new
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|
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function void build_phase (uvm_phase phase);
|
function void build_phase (uvm_phase phase);
|
super.build_phase(phase);
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super.build_phase(phase);
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|
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env = uart_env::type_id::create("env",this);
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env = uart_env::type_id::create("env",this);
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|
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_config = uart_config::type_id::create("_config",this);
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_config = uart_config::type_id::create("_config",this);
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|
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printer = new();
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printer = new();
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report_server = new();
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report_server = new();
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env_configuration();
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env_configuration();
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TE_configuration();
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TE_configuration();
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uvm_config_db#(uart_config)::set(this,"*","UART_CONFIGURATION",_config);
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uvm_config_db#(uart_config)::set(this,"*","UART_CONFIGURATION",_config);
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uvm_resource_db #(int)::set("coverage_cloud","text_coverage",0,null);
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endfunction:build_phase
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endfunction:build_phase
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|
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function void connect_phase (uvm_phase phase);
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function void connect_phase (uvm_phase phase);
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super.connect_phase(phase);
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super.connect_phase(phase);
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endfunction:connect_phase
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endfunction:connect_phase
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|
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function void env_configuration ();
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function void env_configuration ();
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_config._edge = pos_edge;
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_config._edge = pos_edge;
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_config._start = lsb;
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_config._start = lsb;
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_config._datamode = ascii;
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_config._datamode = ascii;
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_config.num_stop_bits = 1;
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_config.num_stop_bits = 1;
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_config.num_of_bits = 8;
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_config.num_of_bits = 8;
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_config._paritymode = parity_off;
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_config._paritymode = parity_off;
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_config.response_time = 8680;
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_config.response_time = 8680;
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_config.use_false_data= no;
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_config.use_false_data= no;
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endfunction:env_configuration
|
endfunction:env_configuration
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|
|
function void TE_configuration();
|
function void TE_configuration();
|
report_server.set_server(report_server);
|
report_server.set_server(report_server);
|
printer.knobs.depth = 3;
|
printer.knobs.depth = 3;
|
uvm_resource_db#(int)::set("Reporting","matched_packets",0,null);
|
uvm_resource_db#(int)::set("Reporting","matched_packets",0,null);
|
uvm_root::get().set_timeout(10s);
|
uvm_root::get().set_timeout(10s);
|
uvm_root::get().finish_on_completion=1'b0;
|
//uvm_root::get().finish_on_completion=1'b0;
|
endfunction // TE_configuration
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endfunction // TE_configuration
|
|
|
task run_phase (uvm_phase phase);
|
task run_phase (uvm_phase phase);
|
phase.phase_done.set_drain_time(this,5000);
|
phase.phase_done.set_drain_time(this,5000);
|
endtask:run_phase
|
endtask:run_phase
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|
|
function void report_phase (uvm_phase phase);
|
function void report_phase (uvm_phase phase);
|
int num_errors;
|
int num_errors;
|
string status;
|
string status;
|
num_errors = report_server.get_severity_count(UVM_ERROR);
|
num_errors = report_server.get_severity_count(UVM_ERROR);
|
uvm_resource_db#(int)::read_by_name("Reporting","matched_packets",matched);
|
uvm_resource_db#(int)::read_by_name("Reporting","matched_packets",matched);
|
if(num_errors == 0) status = "PASSED";
|
if(num_errors == 0) status = "PASSED";
|
else status = "FAILED";
|
else status = "FAILED";
|
$display("--------------------------------------------------\n");
|
$display("--------------------------------------------------\n");
|
$display("\t\t SIMULATION %s \n",status);
|
$display("\t\t SIMULATION %s \n",status);
|
$display("--------------------------------------------------");
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$display("--------------------------------------------------");
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`uvm_info("FINAL STATUS",$sformatf("The number of matched packets are %0d",matched),UVM_NONE);
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`uvm_info("FINAL STATUS",$sformatf("The number of matched packets are %0d",matched),UVM_NONE);
|
endfunction // report_phase
|
endfunction // report_phase
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|
|
function void final_phase (uvm_phase phase);
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|
$stop;
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|
endfunction // final_phase
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|
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endclass:uart_base_test
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endclass:uart_base_test
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|
|
//-------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
//
|
//
|
// PURE TEXT MODE TESTS
|
// PURE TEXT MODE TESTS
|
//
|
//
|
//-------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
|
|
// This test apply thirteen successive tests of UART write request using text communication mode.
|
// This test apply thirteen successive tests of UART write request using text communication mode.
|
// Refer to test plan section in the testbench specifications document for more details.
|
// Refer to test plan section in the testbench specifications document for more details.
|
class write_text_mode extends uart_base_test;
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class write_text_mode extends uart_base_test;
|
|
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seq_1p1 seq1;
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seq_1p1 seq1;
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seq_1p2 seq2;
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seq_1p2 seq2;
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seq_1p3 seq3;
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seq_1p3 seq3;
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seq_1p4 seq4;
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seq_1p4 seq4;
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seq_1p5 seq5;
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seq_1p5 seq5;
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seq_1p6 seq6;
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seq_1p6 seq6;
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seq_1p7 seq7;
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seq_1p7 seq7;
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seq_1p8 seq8;
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seq_1p8 seq8;
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seq_1p9 seq9;
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seq_1p9 seq9;
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seq_1p10 seq10;
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seq_1p10 seq10;
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seq_1p11 seq11;
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seq_1p11 seq11;
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seq_1p12 seq12;
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seq_1p12 seq12;
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seq_1p13 seq13;
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seq_1p13 seq13;
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|
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`uvm_component_utils(write_text_mode)
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`uvm_component_utils(write_text_mode)
|
|
|
function new (string name,uvm_component parent);
|
function new (string name,uvm_component parent);
|
super.new(name,parent);
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super.new(name,parent);
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endfunction:new
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endfunction:new
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|
|
function void build_phase (uvm_phase phase);
|
function void build_phase (uvm_phase phase);
|
super.build_phase (phase);
|
super.build_phase (phase);
|
seq1 = seq_1p1::type_id::create("seq1");
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seq1 = seq_1p1::type_id::create("seq1");
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seq2 = seq_1p2::type_id::create("seq2");
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seq2 = seq_1p2::type_id::create("seq2");
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seq3 = seq_1p3::type_id::create("seq3");
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seq3 = seq_1p3::type_id::create("seq3");
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seq4 = seq_1p4::type_id::create("seq4");
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seq4 = seq_1p4::type_id::create("seq4");
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seq5 = seq_1p5::type_id::create("seq5");
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seq5 = seq_1p5::type_id::create("seq5");
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seq6 = seq_1p6::type_id::create("seq6");
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seq6 = seq_1p6::type_id::create("seq6");
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seq7 = seq_1p7::type_id::create("seq7");
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seq7 = seq_1p7::type_id::create("seq7");
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seq8 = seq_1p8::type_id::create("seq8");
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seq8 = seq_1p8::type_id::create("seq8");
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seq9 = seq_1p9::type_id::create("seq9");
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seq9 = seq_1p9::type_id::create("seq9");
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seq10 = seq_1p10::type_id::create("seq10");
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seq10 = seq_1p10::type_id::create("seq10");
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seq11 = seq_1p11::type_id::create("seq11");
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seq11 = seq_1p11::type_id::create("seq11");
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seq12 = seq_1p12::type_id::create("seq12");
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seq12 = seq_1p12::type_id::create("seq12");
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seq13 = seq_1p13::type_id::create("seq13");
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seq13 = seq_1p13::type_id::create("seq13");
|
endfunction:build_phase
|
endfunction:build_phase
|
|
|
|
|
task run_phase (uvm_phase phase);
|
task run_phase (uvm_phase phase);
|
super.run_phase(phase);
|
super.run_phase(phase);
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phase.raise_objection(this);
|
phase.raise_objection(this);
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seq1.start(env.agent._seq,null);
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seq1.start(env.agent._seq,null);
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seq2.start(env.agent._seq,null);
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seq2.start(env.agent._seq,null);
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seq3.start(env.agent._seq,null);
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seq3.start(env.agent._seq,null);
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seq4.start(env.agent._seq,null);
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seq4.start(env.agent._seq,null);
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seq5.start(env.agent._seq,null);
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seq5.start(env.agent._seq,null);
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seq6.start(env.agent._seq,null);
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seq6.start(env.agent._seq,null);
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seq7.start(env.agent._seq,null);
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seq7.start(env.agent._seq,null);
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seq8.start(env.agent._seq,null);
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seq8.start(env.agent._seq,null);
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seq9.start(env.agent._seq,null);
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seq9.start(env.agent._seq,null);
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seq10.start(env.agent._seq,null);
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seq10.start(env.agent._seq,null);
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seq11.start(env.agent._seq,null);
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seq11.start(env.agent._seq,null);
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seq12.start(env.agent._seq,null);
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seq12.start(env.agent._seq,null);
|
seq13.start(env.agent._seq,null);
|
seq13.start(env.agent._seq,null);
|
phase.drop_objection(this);
|
phase.drop_objection(this);
|
endtask:run_phase
|
endtask:run_phase
|
endclass:write_text_mode
|
endclass:write_text_mode
|
|
|
// This test apply thirteen successive tests of UART read request using text communication mode.
|
// This test apply thirteen successive tests of UART read request using text communication mode.
|
// Refer to test plan section in the testbench specifications document for more details.
|
// Refer to test plan section in the testbench specifications document for more details.
|
class read_text_mode extends uart_base_test;
|
class read_text_mode extends uart_base_test;
|
|
|
seq_2p1 seq1;
|
seq_2p1 seq1;
|
seq_2p2 seq2;
|
seq_2p2 seq2;
|
seq_2p3 seq3;
|
seq_2p3 seq3;
|
seq_2p4 seq4;
|
seq_2p4 seq4;
|
seq_2p5 seq5;
|
seq_2p5 seq5;
|
seq_2p6 seq6;
|
seq_2p6 seq6;
|
seq_2p7 seq7;
|
seq_2p7 seq7;
|
seq_2p8 seq8;
|
seq_2p8 seq8;
|
seq_2p9 seq9;
|
seq_2p9 seq9;
|
seq_2p10 seq10;
|
seq_2p10 seq10;
|
seq_2p11 seq11;
|
seq_2p11 seq11;
|
seq_2p12 seq12;
|
seq_2p12 seq12;
|
seq_2p13 seq13;
|
seq_2p13 seq13;
|
|
|
|
|
`uvm_component_utils(read_text_mode)
|
`uvm_component_utils(read_text_mode)
|
|
|
function new (string name,uvm_component parent);
|
function new (string name,uvm_component parent);
|
super.new(name,parent);
|
super.new(name,parent);
|
endfunction:new
|
endfunction:new
|
|
|
function void build_phase (uvm_phase phase);
|
function void build_phase (uvm_phase phase);
|
super.build_phase(phase);
|
super.build_phase(phase);
|
seq1 = seq_2p1::type_id::create("seq1");
|
seq1 = seq_2p1::type_id::create("seq1");
|
seq2 = seq_2p2::type_id::create("seq2");
|
seq2 = seq_2p2::type_id::create("seq2");
|
seq3 = seq_2p3::type_id::create("seq3");
|
seq3 = seq_2p3::type_id::create("seq3");
|
seq4 = seq_2p4::type_id::create("seq4");
|
seq4 = seq_2p4::type_id::create("seq4");
|
seq5 = seq_2p5::type_id::create("seq5");
|
seq5 = seq_2p5::type_id::create("seq5");
|
seq6 = seq_2p6::type_id::create("seq6");
|
seq6 = seq_2p6::type_id::create("seq6");
|
seq7 = seq_2p7::type_id::create("seq7");
|
seq7 = seq_2p7::type_id::create("seq7");
|
seq8 = seq_2p8::type_id::create("seq8");
|
seq8 = seq_2p8::type_id::create("seq8");
|
seq9 = seq_2p9::type_id::create("seq9");
|
seq9 = seq_2p9::type_id::create("seq9");
|
seq10 = seq_2p10::type_id::create("seq10");
|
seq10 = seq_2p10::type_id::create("seq10");
|
seq11 = seq_2p11::type_id::create("seq11");
|
seq11 = seq_2p11::type_id::create("seq11");
|
seq12 = seq_2p12::type_id::create("seq12");
|
seq12 = seq_2p12::type_id::create("seq12");
|
seq13 = seq_2p13::type_id::create("seq13");
|
seq13 = seq_2p13::type_id::create("seq13");
|
endfunction:build_phase
|
endfunction:build_phase
|
|
|
task run_phase (uvm_phase phase);
|
task run_phase (uvm_phase phase);
|
super.run_phase(phase);
|
super.run_phase(phase);
|
phase.raise_objection(this);
|
phase.raise_objection(this);
|
seq1.start(env.agent._seq,null);
|
seq1.start(env.agent._seq,null);
|
seq2.start(env.agent._seq,null);
|
seq2.start(env.agent._seq,null);
|
seq3.start(env.agent._seq,null);
|
seq3.start(env.agent._seq,null);
|
seq4.start(env.agent._seq,null);
|
seq4.start(env.agent._seq,null);
|
seq5.start(env.agent._seq,null);
|
seq5.start(env.agent._seq,null);
|
seq6.start(env.agent._seq,null);
|
seq6.start(env.agent._seq,null);
|
seq7.start(env.agent._seq,null);
|
seq7.start(env.agent._seq,null);
|
seq8.start(env.agent._seq,null);
|
seq8.start(env.agent._seq,null);
|
seq9.start(env.agent._seq,null);
|
seq9.start(env.agent._seq,null);
|
seq10.start(env.agent._seq,null);
|
seq10.start(env.agent._seq,null);
|
seq11.start(env.agent._seq,null);
|
seq11.start(env.agent._seq,null);
|
seq12.start(env.agent._seq,null);
|
seq12.start(env.agent._seq,null);
|
seq13.start(env.agent._seq,null);
|
seq13.start(env.agent._seq,null);
|
phase.drop_objection(this);
|
phase.drop_objection(this);
|
endtask:run_phase
|
endtask:run_phase
|
endclass:read_text_mode
|
endclass:read_text_mode
|
|
|
//-------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
//
|
//
|
// PURE BINARY MODE TESTS
|
// PURE BINARY MODE TESTS
|
//
|
//
|
//-------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
|
|
// This test apply six successive tests of UART nop request using binary communication mode.
|
// This test apply six successive tests of UART nop request using binary communication mode.
|
// Refer to test plan section in the testbench specifications document for more details.
|
// Refer to test plan section in the testbench specifications document for more details.
|
class nop_command_mode extends uart_base_test;
|
class nop_command_mode extends uart_base_test;
|
|
|
seq_3p1 seq1;
|
seq_3p1 seq1;
|
seq_3p2 seq2;
|
seq_3p2 seq2;
|
seq_3p3 seq3;
|
seq_3p3 seq3;
|
seq_4p1 seq4;
|
seq_4p1 seq4;
|
seq_4p2 seq5;
|
seq_4p2 seq5;
|
seq_4p3 seq6;
|
seq_4p3 seq6;
|
|
|
`uvm_component_utils(nop_command_mode)
|
`uvm_component_utils(nop_command_mode)
|
|
|
function new (string name,uvm_component parent);
|
function new (string name,uvm_component parent);
|
super.new(name,parent);
|
super.new(name,parent);
|
endfunction:new
|
endfunction:new
|
|
|
function void build_phase (uvm_phase phase);
|
function void build_phase (uvm_phase phase);
|
super.build_phase(phase);
|
super.build_phase(phase);
|
seq1 = seq_3p1::type_id::create("seq1");
|
seq1 = seq_3p1::type_id::create("seq1");
|
seq2 = seq_3p2::type_id::create("seq2");
|
seq2 = seq_3p2::type_id::create("seq2");
|
seq3 = seq_3p3::type_id::create("seq3");
|
seq3 = seq_3p3::type_id::create("seq3");
|
seq4 = seq_4p1::type_id::create("seq4");
|
seq4 = seq_4p1::type_id::create("seq4");
|
seq5 = seq_4p2::type_id::create("seq5");
|
seq5 = seq_4p2::type_id::create("seq5");
|
seq6 = seq_4p3::type_id::create("seq6");
|
seq6 = seq_4p3::type_id::create("seq6");
|
endfunction:build_phase
|
endfunction:build_phase
|
|
|
task run_phase(uvm_phase phase);
|
task run_phase(uvm_phase phase);
|
super.run_phase(phase);
|
super.run_phase(phase);
|
phase.raise_objection(this);
|
phase.raise_objection(this);
|
seq1.start(env.agent._seq,null);
|
seq1.start(env.agent._seq,null);
|
seq2.start(env.agent._seq,null);
|
seq2.start(env.agent._seq,null);
|
seq3.start(env.agent._seq,null);
|
seq3.start(env.agent._seq,null);
|
seq4.start(env.agent._seq,null);
|
seq4.start(env.agent._seq,null);
|
seq5.start(env.agent._seq,null);
|
seq5.start(env.agent._seq,null);
|
seq6.start(env.agent._seq,null);
|
seq6.start(env.agent._seq,null);
|
phase.drop_objection(this);
|
phase.drop_objection(this);
|
endtask:run_phase
|
endtask:run_phase
|
endclass:nop_command_mode
|
endclass:nop_command_mode
|
|
|
|
|
// This test apply ten successive tests of UART write request using binary communication mode.
|
// This test apply ten successive tests of UART write request using binary communication mode.
|
// Refer to test plan section in the testbench specifications document for more details.
|
// Refer to test plan section in the testbench specifications document for more details.
|
class write_command_mode extends uart_base_test;
|
class write_command_mode extends uart_base_test;
|
|
|
seq_5p1 seq1;
|
seq_5p1 seq1;
|
seq_5p2 seq2;
|
seq_5p2 seq2;
|
seq_5p3 seq3;
|
seq_5p3 seq3;
|
seq_5p4 seq4;
|
seq_5p4 seq4;
|
seq_5p5 seq5;
|
seq_5p5 seq5;
|
seq_5p6 seq6;
|
seq_5p6 seq6;
|
seq_5p7 seq7;
|
seq_5p7 seq7;
|
seq_5p8 seq8;
|
seq_5p8 seq8;
|
seq_5p9 seq9;
|
seq_5p9 seq9;
|
seq_5p10 seq10;
|
seq_5p10 seq10;
|
|
|
`uvm_component_utils(write_command_mode)
|
`uvm_component_utils(write_command_mode)
|
|
|
function new (string name,uvm_component parent);
|
function new (string name,uvm_component parent);
|
super.new(name,parent);
|
super.new(name,parent);
|
endfunction:new
|
endfunction:new
|
|
|
function void build_phase (uvm_phase phase);
|
function void build_phase (uvm_phase phase);
|
super.build_phase(phase);
|
super.build_phase(phase);
|
seq1 = seq_5p1::type_id::create("seq1");
|
seq1 = seq_5p1::type_id::create("seq1");
|
seq2 = seq_5p2::type_id::create("seq2");
|
seq2 = seq_5p2::type_id::create("seq2");
|
seq3 = seq_5p3::type_id::create("seq3");
|
seq3 = seq_5p3::type_id::create("seq3");
|
seq4 = seq_5p4::type_id::create("seq4");
|
seq4 = seq_5p4::type_id::create("seq4");
|
seq5 = seq_5p5::type_id::create("seq5");
|
seq5 = seq_5p5::type_id::create("seq5");
|
seq6 = seq_5p6::type_id::create("seq6");
|
seq6 = seq_5p6::type_id::create("seq6");
|
seq7 = seq_5p7::type_id::create("seq7");
|
seq7 = seq_5p7::type_id::create("seq7");
|
seq8 = seq_5p8::type_id::create("seq8");
|
seq8 = seq_5p8::type_id::create("seq8");
|
seq9 = seq_5p9::type_id::create("seq9");
|
seq9 = seq_5p9::type_id::create("seq9");
|
seq10 = seq_5p10::type_id::create("seq10");
|
seq10 = seq_5p10::type_id::create("seq10");
|
endfunction:build_phase
|
endfunction:build_phase
|
|
|
task run_phase (uvm_phase phase);
|
task run_phase (uvm_phase phase);
|
super.run_phase(phase);
|
super.run_phase(phase);
|
phase.raise_objection(this);
|
phase.raise_objection(this);
|
uvm_test_done.set_drain_time(this,5000);
|
uvm_test_done.set_drain_time(this,5000);
|
//seq1.start(env.agent._seq,null);
|
//seq1.start(env.agent._seq,null);
|
seq2.start(env.agent._seq,null);
|
seq2.start(env.agent._seq,null);
|
seq3.start(env.agent._seq,null);
|
seq3.start(env.agent._seq,null);
|
seq4.start(env.agent._seq,null);
|
seq4.start(env.agent._seq,null);
|
seq5.start(env.agent._seq,null);
|
seq5.start(env.agent._seq,null);
|
seq6.start(env.agent._seq,null);
|
seq6.start(env.agent._seq,null);
|
seq7.start(env.agent._seq,null);
|
seq7.start(env.agent._seq,null);
|
seq8.start(env.agent._seq,null);
|
seq8.start(env.agent._seq,null);
|
seq9.start(env.agent._seq,null);
|
seq9.start(env.agent._seq,null);
|
seq10.start(env.agent._seq,null);
|
seq10.start(env.agent._seq,null);
|
phase.drop_objection(this);
|
phase.drop_objection(this);
|
endtask:run_phase
|
endtask:run_phase
|
endclass: write_command_mode
|
endclass: write_command_mode
|
|
|
|
|
// This test apply ten successive tests of UART read request using binary communication mode.
|
// This test apply ten successive tests of UART read request using binary communication mode.
|
// Refer to test plan section in the testbench specifications document for more details.
|
// Refer to test plan section in the testbench specifications document for more details.
|
class read_command_mode extends uart_base_test;
|
class read_command_mode extends uart_base_test;
|
|
|
seq_6p1 seq1;
|
seq_6p1 seq1;
|
seq_6p2 seq2;
|
seq_6p2 seq2;
|
seq_6p3 seq3;
|
seq_6p3 seq3;
|
seq_6p4 seq4;
|
seq_6p4 seq4;
|
seq_6p5 seq5;
|
seq_6p5 seq5;
|
seq_6p6 seq6;
|
seq_6p6 seq6;
|
seq_6p7 seq7;
|
seq_6p7 seq7;
|
seq_6p8 seq8;
|
seq_6p8 seq8;
|
seq_6p9 seq9;
|
seq_6p9 seq9;
|
seq_6p10 seq10;
|
seq_6p10 seq10;
|
|
|
`uvm_component_utils(read_command_mode)
|
`uvm_component_utils(read_command_mode)
|
|
|
function new (string name,uvm_component parent);
|
function new (string name,uvm_component parent);
|
super.new(name,parent);
|
super.new(name,parent);
|
seq1 = seq_6p1::type_id::create("seq1");
|
seq1 = seq_6p1::type_id::create("seq1");
|
seq2 = seq_6p2::type_id::create("seq2");
|
seq2 = seq_6p2::type_id::create("seq2");
|
seq3 = seq_6p3::type_id::create("seq3");
|
seq3 = seq_6p3::type_id::create("seq3");
|
seq4 = seq_6p4::type_id::create("seq4");
|
seq4 = seq_6p4::type_id::create("seq4");
|
seq5 = seq_6p5::type_id::create("seq5");
|
seq5 = seq_6p5::type_id::create("seq5");
|
seq6 = seq_6p6::type_id::create("seq6");
|
seq6 = seq_6p6::type_id::create("seq6");
|
seq7 = seq_6p7::type_id::create("seq7");
|
seq7 = seq_6p7::type_id::create("seq7");
|
seq8 = seq_6p8::type_id::create("seq8");
|
seq8 = seq_6p8::type_id::create("seq8");
|
seq9 = seq_6p9::type_id::create("seq9");
|
seq9 = seq_6p9::type_id::create("seq9");
|
seq10 = seq_6p10::type_id::create("seq10");
|
seq10 = seq_6p10::type_id::create("seq10");
|
endfunction:new
|
endfunction:new
|
|
|
function void build_phase (uvm_phase phase);
|
function void build_phase (uvm_phase phase);
|
super.build_phase(phase);
|
super.build_phase(phase);
|
|
|
endfunction:build_phase
|
endfunction:build_phase
|
|
|
task run_phase (uvm_phase phase);
|
task run_phase (uvm_phase phase);
|
super.run_phase(phase);
|
super.run_phase(phase);
|
phase.raise_objection(this);
|
phase.raise_objection(this);
|
//seq1.start(env.agent._seq,null);
|
//seq1.start(env.agent._seq,null);
|
seq2.start(env.agent._seq,null);
|
seq2.start(env.agent._seq,null);
|
seq3.start(env.agent._seq,null);
|
seq3.start(env.agent._seq,null);
|
seq4.start(env.agent._seq,null);
|
seq4.start(env.agent._seq,null);
|
seq5.start(env.agent._seq,null);
|
seq5.start(env.agent._seq,null);
|
seq6.start(env.agent._seq,null);
|
seq6.start(env.agent._seq,null);
|
seq7.start(env.agent._seq,null);
|
seq7.start(env.agent._seq,null);
|
seq8.start(env.agent._seq,null);
|
seq8.start(env.agent._seq,null);
|
seq9.start(env.agent._seq,null);
|
seq9.start(env.agent._seq,null);
|
seq10.start(env.agent._seq,null);
|
seq10.start(env.agent._seq,null);
|
phase.drop_objection(this);
|
phase.drop_objection(this);
|
endtask:run_phase
|
endtask:run_phase
|
endclass:read_command_mode
|
endclass:read_command_mode
|
|
|
//-------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
//
|
//
|
// COMBINED COMMAND TESTS
|
// COMBINED COMMAND TESTS
|
//
|
//
|
//-------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
|
|
// this test randomly apply series of 100 text mode commands. They would be either read or write
|
// this test randomly apply series of 100 text mode commands. They would be either read or write
|
// sequences described in text mode tests in the testbench specifications document.
|
// sequences described in text mode tests in the testbench specifications document.
|
class text_mode_test extends uart_base_test;
|
class text_mode_test extends uart_base_test;
|
|
|
rand int unsigned command_number;
|
rand int unsigned command_number;
|
|
|
bit coverage_hit = 1'b0;
|
bit coverage_hit = 1'b0;
|
|
|
seq_1p1 seq1;
|
seq_1p1 seq1;
|
seq_1p2 seq2;
|
seq_1p2 seq2;
|
seq_1p3 seq3;
|
seq_1p3 seq3;
|
seq_1p4 seq4;
|
seq_1p4 seq4;
|
seq_1p5 seq5;
|
seq_1p5 seq5;
|
seq_1p6 seq6;
|
seq_1p6 seq6;
|
seq_1p7 seq7;
|
seq_1p7 seq7;
|
seq_1p8 seq8;
|
seq_1p8 seq8;
|
seq_1p9 seq9;
|
seq_1p9 seq9;
|
seq_1p10 seq10;
|
seq_1p10 seq10;
|
seq_1p11 seq11;
|
seq_1p11 seq11;
|
seq_1p12 seq12;
|
seq_1p12 seq12;
|
seq_1p13 seq13;
|
seq_1p13 seq13;
|
|
|
|
|
seq_2p1 seq14;
|
seq_2p1 seq14;
|
seq_2p2 seq15;
|
seq_2p2 seq15;
|
seq_2p3 seq16;
|
seq_2p3 seq16;
|
seq_2p4 seq17;
|
seq_2p4 seq17;
|
seq_2p5 seq18;
|
seq_2p5 seq18;
|
seq_2p6 seq19;
|
seq_2p6 seq19;
|
seq_2p7 seq20;
|
seq_2p7 seq20;
|
seq_2p8 seq21;
|
seq_2p8 seq21;
|
seq_2p9 seq22;
|
seq_2p9 seq22;
|
seq_2p10 seq23;
|
seq_2p10 seq23;
|
seq_2p11 seq24;
|
seq_2p11 seq24;
|
seq_2p12 seq25;
|
seq_2p12 seq25;
|
seq_2p13 seq26;
|
seq_2p13 seq26;
|
|
|
`uvm_component_utils(text_mode_test)
|
`uvm_component_utils(text_mode_test)
|
|
|
constraint limit {
|
constraint limit {
|
command_number inside {[1:26]};
|
command_number inside {[1:26]};
|
}
|
}
|
|
|
function new (string name , uvm_component parent);
|
function new (string name , uvm_component parent);
|
super.new(name,parent);
|
super.new(name,parent);
|
endfunction:new
|
endfunction:new
|
|
|
function void build_phase (uvm_phase phase);
|
function void build_phase (uvm_phase phase);
|
super.build_phase(phase);
|
super.build_phase(phase);
|
seq1 = seq_1p1::type_id::create("seq1");
|
seq1 = seq_1p1::type_id::create("seq1");
|
seq2 = seq_1p2::type_id::create("seq2");
|
seq2 = seq_1p2::type_id::create("seq2");
|
seq3 = seq_1p3::type_id::create("seq3");
|
seq3 = seq_1p3::type_id::create("seq3");
|
seq4 = seq_1p4::type_id::create("seq4");
|
seq4 = seq_1p4::type_id::create("seq4");
|
seq5 = seq_1p5::type_id::create("seq5");
|
seq5 = seq_1p5::type_id::create("seq5");
|
seq6 = seq_1p6::type_id::create("seq6");
|
seq6 = seq_1p6::type_id::create("seq6");
|
seq7 = seq_1p7::type_id::create("seq7");
|
seq7 = seq_1p7::type_id::create("seq7");
|
seq8 = seq_1p8::type_id::create("seq8");
|
seq8 = seq_1p8::type_id::create("seq8");
|
seq9 = seq_1p9::type_id::create("seq9");
|
seq9 = seq_1p9::type_id::create("seq9");
|
seq10 = seq_1p10::type_id::create("seq10");
|
seq10 = seq_1p10::type_id::create("seq10");
|
seq11 = seq_1p11::type_id::create("seq11");
|
seq11 = seq_1p11::type_id::create("seq11");
|
seq12 = seq_1p12::type_id::create("seq12");
|
seq12 = seq_1p12::type_id::create("seq12");
|
seq13 = seq_1p13::type_id::create("seq13");
|
seq13 = seq_1p13::type_id::create("seq13");
|
seq14 = seq_2p1::type_id::create("seq14");
|
seq14 = seq_2p1::type_id::create("seq14");
|
seq15 = seq_2p2::type_id::create("seq15");
|
seq15 = seq_2p2::type_id::create("seq15");
|
seq16 = seq_2p3::type_id::create("seq16");
|
seq16 = seq_2p3::type_id::create("seq16");
|
seq17 = seq_2p4::type_id::create("seq17");
|
seq17 = seq_2p4::type_id::create("seq17");
|
seq18 = seq_2p5::type_id::create("seq18");
|
seq18 = seq_2p5::type_id::create("seq18");
|
seq19 = seq_2p6::type_id::create("seq19");
|
seq19 = seq_2p6::type_id::create("seq19");
|
seq20 = seq_2p7::type_id::create("seq20");
|
seq20 = seq_2p7::type_id::create("seq20");
|
seq21 = seq_2p8::type_id::create("seq21");
|
seq21 = seq_2p8::type_id::create("seq21");
|
seq22 = seq_2p9::type_id::create("seq22");
|
seq22 = seq_2p9::type_id::create("seq22");
|
seq23 = seq_2p10::type_id::create("seq23");
|
seq23 = seq_2p10::type_id::create("seq23");
|
seq24 = seq_2p11::type_id::create("seq24");
|
seq24 = seq_2p11::type_id::create("seq24");
|
seq25 = seq_2p12::type_id::create("seq25");
|
seq25 = seq_2p12::type_id::create("seq25");
|
seq26 = seq_2p13::type_id::create("seq26");
|
seq26 = seq_2p13::type_id::create("seq26");
|
uvm_resource_db #(int)::set("coverage_cloud","text_coverage",0,null);
|
uvm_resource_db #(int)::set("coverage_cloud","text_coverage",0,null);
|
//uvm_resource_db #(int)::set("coverage_cloud","text_coverage",0,null);
|
//uvm_resource_db #(int)::set("coverage_cloud","text_coverage",0,null);
|
endfunction:build_phase
|
endfunction:build_phase
|
|
|
task run_phase (uvm_phase phase);
|
task run_phase (uvm_phase phase);
|
super.run_phase(phase);
|
super.run_phase(phase);
|
phase.raise_objection(this);
|
phase.raise_objection(this);
|
while (coverage_hit==1'b0)
|
while (coverage_hit==1'b0)
|
begin
|
begin
|
randomize();
|
randomize();
|
case (command_number)
|
case (command_number)
|
1:
|
1:
|
begin
|
begin
|
seq1.start(env.agent._seq,null);
|
seq1.start(env.agent._seq,null);
|
end
|
end
|
2:
|
2:
|
begin
|
begin
|
seq2.start(env.agent._seq,null);
|
seq2.start(env.agent._seq,null);
|
end
|
end
|
3:
|
3:
|
begin
|
begin
|
seq3.start(env.agent._seq,null);
|
seq3.start(env.agent._seq,null);
|
end
|
end
|
4:
|
4:
|
begin
|
begin
|
seq4.start(env.agent._seq,null);
|
seq4.start(env.agent._seq,null);
|
end
|
end
|
5:
|
5:
|
begin
|
begin
|
seq5.start(env.agent._seq,null);
|
seq5.start(env.agent._seq,null);
|
end
|
end
|
6:
|
6:
|
begin
|
begin
|
seq6.start(env.agent._seq,null);
|
seq6.start(env.agent._seq,null);
|
end
|
end
|
7:
|
7:
|
begin
|
begin
|
seq7.start(env.agent._seq,null);
|
seq7.start(env.agent._seq,null);
|
end
|
end
|
8:
|
8:
|
begin
|
begin
|
seq8.start(env.agent._seq,null);
|
seq8.start(env.agent._seq,null);
|
end
|
end
|
9:
|
9:
|
begin
|
begin
|
seq9.start(env.agent._seq,null);
|
seq9.start(env.agent._seq,null);
|
end
|
end
|
10:
|
10:
|
begin
|
begin
|
seq10.start(env.agent._seq,null);
|
seq10.start(env.agent._seq,null);
|
end
|
end
|
11:
|
11:
|
begin
|
begin
|
seq11.start(env.agent._seq,null);
|
seq11.start(env.agent._seq,null);
|
end
|
end
|
12:
|
12:
|
begin
|
begin
|
seq12.start(env.agent._seq,null);
|
seq12.start(env.agent._seq,null);
|
end
|
end
|
13:
|
13:
|
begin
|
begin
|
seq13.start(env.agent._seq,null);
|
seq13.start(env.agent._seq,null);
|
end
|
end
|
14:
|
14:
|
begin
|
begin
|
seq14.start(env.agent._seq,null);
|
seq14.start(env.agent._seq,null);
|
end
|
end
|
15:
|
15:
|
begin
|
begin
|
seq15.start(env.agent._seq,null);
|
seq15.start(env.agent._seq,null);
|
end
|
end
|
16:
|
16:
|
begin
|
begin
|
seq16.start(env.agent._seq,null);
|
seq16.start(env.agent._seq,null);
|
end
|
end
|
17:
|
17:
|
begin
|
begin
|
seq17.start(env.agent._seq,null);
|
seq17.start(env.agent._seq,null);
|
end
|
end
|
18:
|
18:
|
begin
|
begin
|
seq18.start(env.agent._seq,null);
|
seq18.start(env.agent._seq,null);
|
end
|
end
|
19:
|
19:
|
begin
|
begin
|
seq19.start(env.agent._seq,null);
|
seq19.start(env.agent._seq,null);
|
end
|
end
|
20:
|
20:
|
begin
|
begin
|
seq20.start(env.agent._seq,null);
|
seq20.start(env.agent._seq,null);
|
end
|
end
|
21:
|
21:
|
begin
|
begin
|
seq21.start(env.agent._seq,null);
|
seq21.start(env.agent._seq,null);
|
end
|
end
|
22:
|
22:
|
begin
|
begin
|
seq22.start(env.agent._seq,null);
|
seq22.start(env.agent._seq,null);
|
end
|
end
|
23:
|
23:
|
begin
|
begin
|
seq23.start(env.agent._seq,null);
|
seq23.start(env.agent._seq,null);
|
end
|
end
|
24:
|
24:
|
begin
|
begin
|
seq24.start(env.agent._seq,null);
|
seq24.start(env.agent._seq,null);
|
end
|
end
|
25:
|
25:
|
begin
|
begin
|
seq25.start(env.agent._seq,null);
|
seq25.start(env.agent._seq,null);
|
end
|
end
|
26:
|
26:
|
begin
|
begin
|
seq26.start(env.agent._seq,null);
|
seq26.start(env.agent._seq,null);
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
`uvm_fatal("OUT OF RANGE","Command Number is Out of Range")
|
`uvm_fatal("OUT OF RANGE","Command Number is Out of Range")
|
end
|
end
|
endcase // case (command_number)
|
endcase // case (command_number)
|
evaluate_coverage();
|
evaluate_coverage();
|
end
|
end
|
phase.drop_objection(this);
|
phase.drop_objection(this);
|
endtask:run_phase
|
endtask:run_phase
|
|
|
function void evaluate_coverage();
|
function void evaluate_coverage();
|
int text_coverage;
|
int text_coverage;
|
uvm_resource_db#(int)::read_by_name("coverage_cloud","text_coverage",text_coverage);
|
uvm_resource_db#(int)::read_by_name("coverage_cloud","text_coverage",text_coverage);
|
if(text_coverage >= 95) coverage_hit=1'b1;
|
if(text_coverage >= 95) coverage_hit=1'b1;
|
endfunction // evaluate_coverage
|
endfunction // evaluate_coverage
|
|
|
endclass:text_mode_test
|
endclass:text_mode_test
|
|
|
|
//-------------------------------------------------------------------------------------------------
|
|
//
|
|
// Coverage Driven Test
|
|
//
|
|
//-------------------------------------------------------------------------------------------------
|
|
|
|
class all_tests extends uart_base_test;
|
|
|
|
rand int unsigned testnumber;
|
|
|
|
bit coverage_hit=1'b0;
|
|
|
|
int iteration=0;
|
|
|
|
parameter MAX_ITER=10000;
|
|
|
|
// Text write tests
|
|
seq_1p1 seq1;
|
|
seq_1p2 seq2;
|
|
seq_1p3 seq3;
|
|
seq_1p4 seq4;
|
|
seq_1p5 seq5;
|
|
seq_1p8 seq6;
|
|
seq_1p9 seq7;
|
|
seq_1p10 seq8;
|
|
seq_1p11 seq9;
|
|
seq_1p12 seq10;
|
|
|
|
// Text read tests
|
|
seq_2p1 seq11;
|
|
seq_2p2 seq12;
|
|
seq_2p3 seq13;
|
|
// seq_2p4 seq17;
|
|
seq_2p5 seq14;
|
|
seq_2p8 seq15;
|
|
seq_2p9 seq16;
|
|
seq_2p10 seq17;
|
|
seq_2p11 seq18;
|
|
seq_2p12 seq19;
|
|
|
|
// NOP
|
|
seq_3p1 seq20;
|
|
seq_3p2 seq21;
|
|
seq_3p3 seq22;
|
|
seq_4p1 seq23;
|
|
seq_4p2 seq24;
|
|
seq_4p3 seq25;
|
|
|
|
// Write Command Mode
|
|
seq_5p2 seq26;
|
|
seq_5p3 seq27;
|
|
seq_5p4 seq28;
|
|
seq_5p5 seq29;
|
|
seq_5p6 seq30;
|
|
seq_5p7 seq31;
|
|
seq_5p8 seq32;
|
|
seq_5p9 seq33;
|
|
seq_5p10 seq34;
|
|
|
|
// Read Command Mode
|
|
seq_6p2 seq35;
|
|
seq_6p3 seq36;
|
|
seq_6p4 seq37;
|
|
seq_6p5 seq38;
|
|
seq_6p6 seq39;
|
|
seq_6p7 seq40;
|
|
seq_6p8 seq41;
|
|
seq_6p9 seq42;
|
|
seq_6p10 seq43;
|
|
|
|
// GRANT test
|
|
seq_7p1 seq44;
|
|
seq_7p2 seq45;
|
|
|
|
|
|
`uvm_component_utils(all_tests)
|
|
|
|
constraint validtest{testnumber inside{[0:45]};
|
|
testnumber != 13;}
|
|
|
|
function new (string name,uvm_component parent);
|
|
super.new(name,parent);
|
|
endfunction // new
|
|
|
|
function void build_phase (uvm_phase phase);
|
|
super.build_phase(phase);
|
|
seq1 = seq_1p1::type_id::create("seq1");
|
|
seq2 = seq_1p2::type_id::create("seq2");
|
|
seq3 = seq_1p3::type_id::create("seq3");
|
|
seq4 = seq_1p4::type_id::create("seq4");
|
|
seq5 = seq_1p5::type_id::create("seq5");
|
|
seq6 = seq_1p8::type_id::create("seq6");
|
|
seq7 = seq_1p9::type_id::create("seq7");
|
|
seq8 = seq_1p10::type_id::create("seq8");
|
|
seq9 = seq_1p11::type_id::create("seq9");
|
|
seq10 = seq_1p12::type_id::create("seq10");
|
|
seq11 = seq_2p1::type_id::create("seq11");
|
|
seq12 = seq_2p2::type_id::create("seq12");
|
|
seq13 = seq_2p3::type_id::create("seq13");
|
|
//seq17 = seq_2p4::type_id::create("seq17");
|
|
seq14 = seq_2p5::type_id::create("seq14");
|
|
seq15 = seq_2p8::type_id::create("seq15");
|
|
seq16 = seq_2p9::type_id::create("seq16");
|
|
seq17 = seq_2p10::type_id::create("seq17");
|
|
seq18 = seq_2p11::type_id::create("seq18");
|
|
seq19 = seq_2p12::type_id::create("seq19");
|
|
seq20 = seq_3p1::type_id::create("seq20");
|
|
seq21 = seq_3p2::type_id::create("seq21");
|
|
seq22 = seq_3p3::type_id::create("seq22");
|
|
seq23 = seq_4p1::type_id::create("seq23");
|
|
seq24 = seq_4p2::type_id::create("seq24");
|
|
seq25 = seq_4p3::type_id::create("seq25");
|
|
seq26 = seq_5p2::type_id::create("seq26");
|
|
seq27 = seq_5p3::type_id::create("seq27");
|
|
seq28 = seq_5p4::type_id::create("seq28");
|
|
seq29 = seq_5p5::type_id::create("seq29");
|
|
seq30 = seq_5p6::type_id::create("seq30");
|
|
seq31 = seq_5p7::type_id::create("seq31");
|
|
seq32 = seq_5p8::type_id::create("seq32");
|
|
seq33 = seq_5p9::type_id::create("seq33");
|
|
seq34 = seq_5p10::type_id::create("seq34");
|
|
seq35 = seq_6p2::type_id::create("seq35");
|
|
seq36 = seq_6p3::type_id::create("seq36");
|
|
seq37 = seq_6p4::type_id::create("seq37");
|
|
seq38 = seq_6p5::type_id::create("seq38");
|
|
seq39 = seq_6p6::type_id::create("seq39");
|
|
seq40 = seq_6p7::type_id::create("seq40");
|
|
seq41 = seq_6p8::type_id::create("seq41");
|
|
seq42 = seq_6p9::type_id::create("seq42");
|
|
seq43 = seq_6p10::type_id::create("seq43");
|
|
seq44 = seq_7p1::type_id::create("seq44");
|
|
seq45 = seq_7p2::type_id::create("seq45");
|
|
endfunction // build_phase
|
|
|
|
task run_phase (uvm_phase phase);
|
|
super.run_phase(phase);
|
|
phase.raise_objection(this);
|
|
while(coverage_hit==1'b0 && (iteration < MAX_ITER) ) begin
|
|
iteration++;
|
|
randomize();
|
|
case(testnumber)
|
|
0:
|
|
begin
|
|
seq1.start(env.agent._seq,null);
|
|
end
|
|
1:
|
|
begin
|
|
seq2.start(env.agent._seq,null);
|
|
end
|
|
2:
|
|
begin
|
|
seq3.start(env.agent._seq,null);
|
|
end
|
|
3:
|
|
begin
|
|
seq4.start(env.agent._seq,null);
|
|
end
|
|
4:
|
|
begin
|
|
seq5.start(env.agent._seq,null);
|
|
end
|
|
5:
|
|
begin
|
|
seq6.start(env.agent._seq,null);
|
|
end
|
|
6:
|
|
begin
|
|
seq7.start(env.agent._seq,null);
|
|
end
|
|
7:
|
|
begin
|
|
seq8.start(env.agent._seq,null);
|
|
end
|
|
8:
|
|
begin
|
|
seq9.start(env.agent._seq,null);
|
|
end
|
|
9:
|
|
begin
|
|
seq10.start(env.agent._seq,null);
|
|
end
|
|
10:
|
|
begin
|
|
seq11.start(env.agent._seq,null);
|
|
end
|
|
11:
|
|
begin
|
|
seq12.start(env.agent._seq,null);
|
|
end
|
|
12:
|
|
begin
|
|
seq13.start(env.agent._seq,null);
|
|
end
|
|
/* 13:
|
|
begin
|
|
seq17.start(env.agent._seq,null);
|
|
end*/
|
|
14:
|
|
begin
|
|
seq14.start(env.agent._seq,null);
|
|
end
|
|
15:
|
|
begin
|
|
seq15.start(env.agent._seq,null);
|
|
end
|
|
16:
|
|
begin
|
|
seq16.start(env.agent._seq,null);
|
|
end
|
|
17:
|
|
begin
|
|
seq17.start(env.agent._seq,null);
|
|
end
|
|
18:
|
|
begin
|
|
seq18.start(env.agent._seq,null);
|
|
end
|
|
19:
|
|
begin
|
|
seq19.start(env.agent._seq,null);
|
|
end
|
|
20:
|
|
begin
|
|
seq20.start(env.agent._seq,null);
|
|
end
|
|
21:
|
|
begin
|
|
seq21.start(env.agent._seq,null);
|
|
end
|
|
22:
|
|
begin
|
|
seq22.start(env.agent._seq,null);
|
|
end
|
|
23:
|
|
begin
|
|
seq23.start(env.agent._seq,null);
|
|
end
|
|
24:
|
|
begin
|
|
seq24.start(env.agent._seq,null);
|
|
end
|
|
25:
|
|
begin
|
|
seq25.start(env.agent._seq,null);
|
|
end
|
|
26:
|
|
begin
|
|
seq26.start(env.agent._seq,null);
|
|
end
|
|
27:
|
|
begin
|
|
seq27.start(env.agent._seq,null);
|
|
end
|
|
28:
|
|
begin
|
|
seq28.start(env.agent._seq,null);
|
|
end
|
|
29:
|
|
begin
|
|
seq29.start(env.agent._seq,null);
|
|
end
|
|
30:
|
|
begin
|
|
seq30.start(env.agent._seq,null);
|
|
end
|
|
31:
|
|
begin
|
|
seq31.start(env.agent._seq,null);
|
|
end
|
|
32:
|
|
begin
|
|
seq32.start(env.agent._seq,null);
|
|
end
|
|
33:
|
|
begin
|
|
seq33.start(env.agent._seq,null);
|
|
end
|
|
34:
|
|
begin
|
|
seq34.start(env.agent._seq,null);
|
|
end
|
|
35:
|
|
begin
|
|
seq35.start(env.agent._seq,null);
|
|
end
|
|
36:
|
|
begin
|
|
seq36.start(env.agent._seq,null);
|
|
end
|
|
37:
|
|
begin
|
|
seq37.start(env.agent._seq,null);
|
|
end
|
|
38:
|
|
begin
|
|
seq38.start(env.agent._seq,null);
|
|
end
|
|
39:
|
|
begin
|
|
seq39.start(env.agent._seq,null);
|
|
end
|
|
40:
|
|
begin
|
|
seq40.start(env.agent._seq,null);
|
|
end
|
|
41:
|
|
begin
|
|
seq41.start(env.agent._seq,null);
|
|
end
|
|
42:
|
|
begin
|
|
seq42.start(env.agent._seq,null);
|
|
end
|
|
43:
|
|
begin
|
|
seq43.start(env.agent._seq,null);
|
|
end
|
|
44:
|
|
begin
|
|
seq44.start(env.agent._seq,null);
|
|
end
|
|
45:
|
|
begin
|
|
seq45.start(env.agent._seq,null);
|
|
end
|
|
default:
|
|
begin
|
|
`uvm_error("TE","Invalid_test")
|
|
end
|
|
endcase // case (testnumber)
|
|
evaluate_coverage();
|
|
end // while (coverage_hit==1'b0)
|
|
phase.drop_objection(this);
|
|
endtask // run_phase
|
|
|
|
function void evaluate_coverage();
|
|
int text_coverage;
|
|
uvm_resource_db#(int)::read_by_name("coverage_cloud","text_coverage",text_coverage);
|
|
if(text_coverage >= 80) coverage_hit=1'b1;
|
|
endfunction // evaluate_coverage
|
|
|
|
function void report_phase(uvm_phase phase);
|
|
int coverage;
|
|
super.report_phase(phase);
|
|
if(!(iteration
|
|
begin
|
|
uvm_resource_db#(int)::read_by_name("coverage_cloud","text_coverage",coverage);
|
|
`uvm_warning("SIM",$sformatf("coverage not hit and reached %0d",coverage));
|
|
end
|
|
endfunction // report_phase
|
|
|
|
endclass // all_tests
|
|
|
