------------------------------------------------------------------
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------------------------------------------------------------------
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-- Universal dongle board source code
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-- Universal dongle board source code
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--
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--
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-- Copyright (C) 2006 Artec Design <jyrit@artecdesign.ee>
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-- Copyright (C) 2006 Artec Design <jyrit@artecdesign.ee>
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--
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--
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-- This source code is free hardware; you can redistribute it and/or
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-- This source code is free hardware; you can redistribute it and/or
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-- modify it under the terms of the GNU Lesser General Public
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-- modify it under the terms of the GNU Lesser General Public
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-- License as published by the Free Software Foundation; either
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-- License as published by the Free Software Foundation; either
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-- version 2.1 of the License, or (at your option) any later version.
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-- version 2.1 of the License, or (at your option) any later version.
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--
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--
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-- This source code is distributed in the hope that it will be useful,
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-- This source code is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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-- Lesser General Public License for more details.
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-- Lesser General Public License for more details.
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--
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--
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-- You should have received a copy of the GNU Lesser General Public
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-- You should have received a copy of the GNU Lesser General Public
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-- License along with this library; if not, write to the Free Software
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-- License along with this library; if not, write to the Free Software
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-- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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-- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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--
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--
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--
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--
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-- The complete text of the GNU Lesser General Public License can be found in
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-- The complete text of the GNU Lesser General Public License can be found in
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-- the file 'lesser.txt'.
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-- the file 'lesser.txt'.
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--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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-- Company:
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-- Company:
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-- Engineer:
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-- Engineer:
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--
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--
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-- Create Date: 10:19:29 09/28/2006
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-- Create Date: 10:19:29 09/28/2006
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-- Design Name: usb2mem
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-- Design Name: usb2mem
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-- Module Name: C:/projects/USB_dongle/beh/usb_mem_test.vhd
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-- Module Name: C:/projects/USB_dongle/beh/usb_mem_test.vhd
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-- Project Name: simulation
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-- Project Name: simulation
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-- Target Device:
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-- Target Device:
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-- Tool versions:
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-- Tool versions:
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-- Description:
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-- Description:
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--
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--
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-- VHDL Test Bench Created by ISE for module: usb2mem
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-- VHDL Test Bench Created by ISE for module: usb2mem
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--
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--
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-- Dependencies:
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-- Dependencies:
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--
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--
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-- Revision:
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-- Revision:
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-- Revision 0.01 - File Created
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-- Revision 0.01 - File Created
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-- Additional Comments:
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-- Additional Comments:
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--
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--
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-- Notes:
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-- Notes:
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-- This testbench has been automatically generated using types std_logic and
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-- This testbench has been automatically generated using types std_logic and
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-- std_logic_vector for the ports of the unit under test. Xilinx recommends
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-- std_logic_vector for the ports of the unit under test. Xilinx recommends
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-- that these types always be used for the top-level I/O of a design in order
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-- that these types always be used for the top-level I/O of a design in order
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-- to guarantee that the testbench will bind correctly to the post-implementation
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-- to guarantee that the testbench will bind correctly to the post-implementation
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-- simulation model.
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-- simulation model.
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--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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LIBRARY ieee;
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.std_logic_1164.ALL;
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USE ieee.std_logic_unsigned.all;
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USE ieee.std_logic_unsigned.all;
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USE ieee.numeric_std.ALL;
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USE ieee.numeric_std.ALL;
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ENTITY usb_mem_test_vhd IS
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ENTITY usb_mem_test_vhd IS
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END usb_mem_test_vhd;
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END usb_mem_test_vhd;
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ARCHITECTURE behavior OF usb_mem_test_vhd IS
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ARCHITECTURE behavior OF usb_mem_test_vhd IS
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-- Component Declaration for the Unit Under Test (UUT)
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-- Component Declaration for the Unit Under Test (UUT)
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COMPONENT usb2mem
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COMPONENT usb2mem
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PORT(
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PORT(
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clk25 : IN std_logic;
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clk25 : IN std_logic;
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reset_n : IN std_logic;
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reset_n : IN std_logic;
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mem_di : IN std_logic_vector(15 downto 0);
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mem_di : IN std_logic_vector(15 downto 0);
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mem_ack : IN std_logic;
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mem_ack : IN std_logic;
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usb_txe_n : IN std_logic;
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usb_txe_n : IN std_logic;
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usb_rxf_n : IN std_logic;
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usb_rxf_n : IN std_logic;
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usb_bd : INOUT std_logic_vector(7 downto 0);
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usb_bd : INOUT std_logic_vector(7 downto 0);
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mem_addr : OUT std_logic_vector(23 downto 0);
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mem_addr : OUT std_logic_vector(23 downto 0);
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mem_do : OUT std_logic_vector(15 downto 0);
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mem_do : OUT std_logic_vector(15 downto 0);
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mem_wr : OUT std_logic;
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mem_wr : OUT std_logic;
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mem_val : OUT std_logic;
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mem_val : OUT std_logic;
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mem_cmd : OUT std_logic;
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mem_cmd : OUT std_logic;
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usb_rd_n : OUT std_logic;
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usb_rd_n : OUT std_logic;
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usb_wr : OUT std_logic
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usb_wr : OUT std_logic
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);
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);
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END COMPONENT;
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END COMPONENT;
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--Inputs
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--Inputs
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SIGNAL clk25 : std_logic := '0';
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SIGNAL clk25 : std_logic := '0';
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SIGNAL reset_n : std_logic := '0';
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SIGNAL reset_n : std_logic := '0';
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SIGNAL mem_ack : std_logic := '0';
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SIGNAL mem_ack : std_logic := '0';
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SIGNAL usb_txe_n : std_logic := '0';
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SIGNAL usb_txe_n : std_logic := '0';
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SIGNAL usb_rxf_n : std_logic := '1';
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SIGNAL usb_rxf_n : std_logic := '1';
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SIGNAL mem_di : std_logic_vector(15 downto 0) := x"3210";
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SIGNAL mem_di : std_logic_vector(15 downto 0) := x"3210";
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--BiDirs
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--BiDirs
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SIGNAL usb_bd : std_logic_vector(7 downto 0);
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SIGNAL usb_bd : std_logic_vector(7 downto 0);
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--Outputs
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--Outputs
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SIGNAL mem_addr : std_logic_vector(23 downto 0);
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SIGNAL mem_addr : std_logic_vector(23 downto 0);
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SIGNAL mem_do : std_logic_vector(15 downto 0);
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SIGNAL mem_do : std_logic_vector(15 downto 0);
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SIGNAL mem_wr : std_logic;
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SIGNAL mem_wr : std_logic;
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SIGNAL mem_val : std_logic;
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SIGNAL mem_val : std_logic;
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SIGNAL mem_cmd : std_logic;
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SIGNAL mem_cmd : std_logic;
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SIGNAL usb_rd_n : std_logic;
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SIGNAL usb_rd_n : std_logic;
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SIGNAL usb_wr : std_logic;
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SIGNAL usb_wr : std_logic;
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BEGIN
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BEGIN
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-- Instantiate the Unit Under Test (UUT)
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-- Instantiate the Unit Under Test (UUT)
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uut: usb2mem PORT MAP(
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uut: usb2mem PORT MAP(
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clk25 => clk25,
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clk25 => clk25,
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reset_n => reset_n,
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reset_n => reset_n,
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mem_addr => mem_addr,
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mem_addr => mem_addr,
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mem_do => mem_do,
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mem_do => mem_do,
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mem_di => mem_di,
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mem_di => mem_di,
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mem_wr => mem_wr,
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mem_wr => mem_wr,
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mem_val => mem_val,
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mem_val => mem_val,
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mem_ack => mem_ack,
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mem_ack => mem_ack,
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mem_cmd => mem_cmd,
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mem_cmd => mem_cmd,
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usb_rd_n => usb_rd_n,
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usb_rd_n => usb_rd_n,
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usb_wr => usb_wr,
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usb_wr => usb_wr,
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usb_txe_n => usb_txe_n,
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usb_txe_n => usb_txe_n,
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usb_rxf_n => usb_rxf_n,
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usb_rxf_n => usb_rxf_n,
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usb_bd => usb_bd
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usb_bd => usb_bd
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);
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);
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clocker : process is
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clocker : process is
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begin
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begin
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wait for 20 ns;
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wait for 20 ns;
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clk25 <=not (clk25);
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clk25 <=not (clk25);
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end process clocker;
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end process clocker;
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VCI_ACK : process is
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VCI_ACK : process is
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begin
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begin
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wait until mem_val='1';
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wait until mem_val='1';
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wait for 100 ns;
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wait for 100 ns;
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mem_ack <='1';
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mem_ack <='1';
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wait until mem_val='0';
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wait until mem_val='0';
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mem_ack <='0';
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mem_ack <='0';
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end process VCI_ACK;
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end process VCI_ACK;
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tb : PROCESS
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tb : PROCESS
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BEGIN
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BEGIN
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-- Wait 100 ns for global reset to finish
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-- Wait 100 ns for global reset to finish
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wait for 100 ns;
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wait for 100 ns;
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reset_n <='1';
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reset_n <='1';
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-- STATUS CHECK COMMAND
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-- STATUS CHECK COMMAND
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usb_rxf_n <='0';
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usb_rxf_n <='0';
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usb_bd <=x"C5";
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usb_bd <=x"C5";
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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usb_bd <=(others=>'Z');
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usb_bd <=(others=>'Z');
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usb_rxf_n <='1';
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usb_rxf_n <='1';
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-- END STATUS CHECK COMMAND
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-- END STATUS CHECK COMMAND
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wait for 800 ns;
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wait for 800 ns;
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-- A0 COMMAND
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-- A0 COMMAND
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usb_rxf_n <='0';
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usb_rxf_n <='0';
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usb_bd <=x"02";
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usb_bd <=x"02";
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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wait for 20 ns;
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wait for 20 ns;
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usb_bd <=x"A0";
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usb_bd <=x"A0";
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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usb_bd <=(others=>'Z');
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usb_bd <=(others=>'Z');
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usb_rxf_n <='1';
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usb_rxf_n <='1';
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-- END A0 COMMAND
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-- END A0 COMMAND
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wait for 800 ns;
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wait for 800 ns;
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-- A1 COMMAND
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-- A1 COMMAND
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usb_rxf_n <='0';
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usb_rxf_n <='0';
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usb_bd <=x"00";
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usb_bd <=x"00";
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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wait for 20 ns;
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wait for 20 ns;
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usb_bd <=x"A1";
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usb_bd <=x"A1";
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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usb_bd <=(others=>'Z');
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usb_bd <=(others=>'Z');
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usb_rxf_n <='1';
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usb_rxf_n <='1';
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-- END A1 COMMAND
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-- END A1 COMMAND
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wait for 800 ns;
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wait for 800 ns;
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-- A2 COMMAND
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-- A2 COMMAND
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usb_rxf_n <='0';
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usb_rxf_n <='0';
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usb_bd <=x"00";
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usb_bd <=x"00";
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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wait for 20 ns;
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wait for 20 ns;
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usb_bd <=x"A2";
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usb_bd <=x"A2";
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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usb_bd <=(others=>'Z');
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usb_bd <=(others=>'Z');
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usb_rxf_n <='1';
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usb_rxf_n <='1';
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-- END A2 COMMAND
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-- END A2 COMMAND
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wait for 800 ns;
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wait for 800 ns;
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-- CD COMMAND
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-- CD COMMAND
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usb_rxf_n <='0';
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usb_rxf_n <='0';
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usb_bd <=x"01";
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usb_bd <=x"01";
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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wait for 20 ns;
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wait for 20 ns;
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usb_bd <=x"CD";
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usb_bd <=x"CD";
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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usb_bd <=(others=>'Z');
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usb_bd <=(others=>'Z');
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usb_rxf_n <='1';
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usb_rxf_n <='1';
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-- END CD COMMAND
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-- END CD COMMAND
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wait for 800 ns;
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wait for 800 ns;
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-- E8 COMMAND
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-- E8 COMMAND
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usb_rxf_n <='0';
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usb_rxf_n <='0';
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usb_bd <=x"01"; --this should mean 2 word to write
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usb_bd <=x"01"; --this should mean 2 word to write
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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wait for 20 ns;
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wait for 20 ns;
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usb_bd <=x"E8";
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usb_bd <=x"E8";
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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usb_bd <=(others=>'Z');
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usb_bd <=(others=>'Z');
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usb_rxf_n <='1';
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usb_rxf_n <='1';
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-- END E8 COMMAND
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-- END E8 COMMAND
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wait for 2000 ns;
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wait for 2000 ns;
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-- SEND Data count to flash COMMAND
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-- SEND Data count to flash COMMAND
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usb_rxf_n <='0';
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usb_rxf_n <='0';
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usb_bd <=x"01"; --this should mean 2 word to write
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usb_bd <=x"01"; --this should mean 2 word to write
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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wait for 20 ns;
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wait for 20 ns;
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usb_bd <=x"00"; --count 00 means 1 word
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usb_bd <=x"00"; --count 00 means 1 word
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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usb_bd <=(others=>'Z');
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usb_bd <=(others=>'Z');
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usb_rxf_n <='1';
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usb_rxf_n <='1';
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-- END COMMAND
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-- END COMMAND
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wait for 800 ns;
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wait for 800 ns;
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-- SEND raw Data
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-- SEND raw Data
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usb_rxf_n <='0';
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usb_rxf_n <='0';
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usb_bd <=x"CA"; --this should mean 1 word to write
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usb_bd <=x"CA"; --this should mean 1 word to write
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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wait for 20 ns;
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wait for 20 ns;
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usb_bd <=x"FE"; --count 00 means 1 word
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usb_bd <=x"FE"; --count 00 means 1 word
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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usb_bd <=(others=>'Z');
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usb_bd <=(others=>'Z');
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usb_rxf_n <='1';
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usb_rxf_n <='1';
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-- END send data
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-- END send data
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wait for 800 ns;
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wait for 800 ns;
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-- SEND raw Data
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-- SEND raw Data
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usb_rxf_n <='0';
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usb_rxf_n <='0';
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usb_bd <=x"BE"; --this should mean 1 word to write
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usb_bd <=x"BE"; --this should mean 1 word to write
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='0'; --wait to go low --first read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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wait for 20 ns;
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wait for 20 ns;
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usb_bd <=x"CD"; --count 00 means 1 word
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usb_bd <=x"CD"; --count 00 means 1 word
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='0'; --wait to go low --second read
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wait until usb_rd_n='1'; --wait to go low
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wait until usb_rd_n='1'; --wait to go low
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usb_bd <=(others=>'Z');
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usb_bd <=(others=>'Z');
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usb_rxf_n <='1';
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usb_rxf_n <='1';
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-- END send data
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-- END send data
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wait for 800 ns;
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wait for 800 ns;
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wait; -- will wait forever
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wait; -- will wait forever
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END PROCESS;
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END PROCESS;
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END;
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END;
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