-- megafunction wizard: %LPM_FIFO+%
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-- megafunction wizard: %LPM_FIFO+%
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-- GENERATION: STANDARD
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-- GENERATION: STANDARD
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-- VERSION: WM1.0
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-- VERSION: WM1.0
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-- MODULE: scfifo
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-- MODULE: scfifo
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-- ============================================================
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-- ============================================================
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-- File Name: fifo.vhd
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-- File Name: fifo.vhd
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-- Megafunction Name(s):
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-- Megafunction Name(s):
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-- scfifo
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-- scfifo
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-- ============================================================
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-- ============================================================
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-- ************************************************************
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-- ************************************************************
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-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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--
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--
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-- 6.0 Build 202 06/20/2006 SP 1 SJ Web Edition
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-- 6.0 Build 202 06/20/2006 SP 1 SJ Web Edition
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-- ************************************************************
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-- ************************************************************
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--Copyright (C) 1991-2006 Altera Corporation
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--Copyright (C) 1991-2006 Altera Corporation
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--Your use of Altera Corporation's design tools, logic functions
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--Your use of Altera Corporation's design tools, logic functions
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--and other software and tools, and its AMPP partner logic
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--and other software and tools, and its AMPP partner logic
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--functions, and any output files any of the foregoing
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--functions, and any output files any of the foregoing
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--(including device programming or simulation files), and any
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--(including device programming or simulation files), and any
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--associated documentation or information are expressly subject
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--associated documentation or information are expressly subject
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--to the terms and conditions of the Altera Program License
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--to the terms and conditions of the Altera Program License
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--Subscription Agreement, Altera MegaCore Function License
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--Subscription Agreement, Altera MegaCore Function License
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--Agreement, or other applicable license agreement, including,
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--Agreement, or other applicable license agreement, including,
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--without limitation, that your use is for the sole purpose of
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--without limitation, that your use is for the sole purpose of
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--programming logic devices manufactured by Altera and sold by
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--programming logic devices manufactured by Altera and sold by
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--Altera or its authorized distributors. Please refer to the
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--Altera or its authorized distributors. Please refer to the
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--applicable agreement for further details.
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--applicable agreement for further details.
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LIBRARY ieee;
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LIBRARY ieee;
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USE ieee.std_logic_1164.all;
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USE ieee.std_logic_1164.all;
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LIBRARY altera_mf;
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LIBRARY altera_mf;
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USE altera_mf.all;
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USE altera_mf.all;
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ENTITY fifo IS
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ENTITY fifo IS
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PORT
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PORT
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(
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(
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aclr : IN STD_LOGIC ;
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aclr : IN STD_LOGIC ;
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clock : IN STD_LOGIC ;
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clock : IN STD_LOGIC ;
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data : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
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data : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
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rdreq : IN STD_LOGIC ;
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rdreq : IN STD_LOGIC ;
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wrreq : IN STD_LOGIC ;
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wrreq : IN STD_LOGIC ;
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almost_full : OUT STD_LOGIC ;
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almost_full : OUT STD_LOGIC ;
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empty : OUT STD_LOGIC ;
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empty : OUT STD_LOGIC ;
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full : OUT STD_LOGIC ;
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full : OUT STD_LOGIC ;
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q : OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
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q : OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
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usedw : OUT STD_LOGIC_VECTOR (12 DOWNTO 0)
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usedw : OUT STD_LOGIC_VECTOR (12 DOWNTO 0)
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);
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);
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END fifo;
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END fifo;
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ARCHITECTURE SYN OF fifo IS
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ARCHITECTURE SYN OF fifo IS
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SIGNAL sub_wire0 : STD_LOGIC ;
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SIGNAL sub_wire0 : STD_LOGIC ;
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SIGNAL sub_wire1 : STD_LOGIC_VECTOR (12 DOWNTO 0);
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SIGNAL sub_wire1 : STD_LOGIC_VECTOR (12 DOWNTO 0);
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SIGNAL sub_wire2 : STD_LOGIC ;
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SIGNAL sub_wire2 : STD_LOGIC ;
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SIGNAL sub_wire3 : STD_LOGIC_VECTOR (7 DOWNTO 0);
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SIGNAL sub_wire3 : STD_LOGIC_VECTOR (7 DOWNTO 0);
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SIGNAL sub_wire4 : STD_LOGIC ;
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SIGNAL sub_wire4 : STD_LOGIC ;
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COMPONENT scfifo
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COMPONENT scfifo
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GENERIC (
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GENERIC (
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add_ram_output_register : STRING;
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add_ram_output_register : STRING;
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almost_full_value : NATURAL;
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almost_full_value : NATURAL;
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intended_device_family : STRING;
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intended_device_family : STRING;
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lpm_numwords : NATURAL;
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lpm_numwords : NATURAL;
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lpm_showahead : STRING;
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lpm_showahead : STRING;
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lpm_type : STRING;
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lpm_type : STRING;
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lpm_width : NATURAL;
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lpm_width : NATURAL;
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lpm_widthu : NATURAL;
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lpm_widthu : NATURAL;
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overflow_checking : STRING;
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overflow_checking : STRING;
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underflow_checking : STRING;
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underflow_checking : STRING;
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use_eab : STRING
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use_eab : STRING
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);
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);
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PORT (
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PORT (
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almost_full : OUT STD_LOGIC ;
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almost_full : OUT STD_LOGIC ;
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usedw : OUT STD_LOGIC_VECTOR (12 DOWNTO 0);
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usedw : OUT STD_LOGIC_VECTOR (12 DOWNTO 0);
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rdreq : IN STD_LOGIC ;
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rdreq : IN STD_LOGIC ;
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empty : OUT STD_LOGIC ;
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empty : OUT STD_LOGIC ;
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aclr : IN STD_LOGIC ;
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aclr : IN STD_LOGIC ;
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clock : IN STD_LOGIC ;
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clock : IN STD_LOGIC ;
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q : OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
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q : OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
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wrreq : IN STD_LOGIC ;
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wrreq : IN STD_LOGIC ;
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data : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
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data : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
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full : OUT STD_LOGIC
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full : OUT STD_LOGIC
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);
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);
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END COMPONENT;
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END COMPONENT;
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BEGIN
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BEGIN
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almost_full <= sub_wire0;
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almost_full <= sub_wire0;
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usedw <= sub_wire1(12 DOWNTO 0);
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usedw <= sub_wire1(12 DOWNTO 0);
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empty <= sub_wire2;
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empty <= sub_wire2;
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q <= sub_wire3(7 DOWNTO 0);
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q <= sub_wire3(7 DOWNTO 0);
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full <= sub_wire4;
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full <= sub_wire4;
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scfifo_component : scfifo
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scfifo_component : scfifo
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GENERIC MAP (
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GENERIC MAP (
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add_ram_output_register => "ON",
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add_ram_output_register => "ON",
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almost_full_value => 8000,
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almost_full_value => 8000,
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intended_device_family => "Cyclone",
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intended_device_family => "Cyclone",
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lpm_numwords => 8192,
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lpm_numwords => 8192,
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lpm_showahead => "OFF",
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lpm_showahead => "OFF",
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lpm_type => "scfifo",
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lpm_type => "scfifo",
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lpm_width => 8,
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lpm_width => 8,
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lpm_widthu => 13,
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lpm_widthu => 13,
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overflow_checking => "ON",
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overflow_checking => "ON",
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underflow_checking => "ON",
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underflow_checking => "ON",
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use_eab => "ON"
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use_eab => "ON"
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)
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)
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PORT MAP (
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PORT MAP (
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rdreq => rdreq,
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rdreq => rdreq,
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aclr => aclr,
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aclr => aclr,
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clock => clock,
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clock => clock,
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wrreq => wrreq,
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wrreq => wrreq,
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data => data,
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data => data,
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almost_full => sub_wire0,
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almost_full => sub_wire0,
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usedw => sub_wire1,
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usedw => sub_wire1,
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empty => sub_wire2,
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empty => sub_wire2,
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q => sub_wire3,
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q => sub_wire3,
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full => sub_wire4
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full => sub_wire4
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);
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);
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END SYN;
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END SYN;
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-- ============================================================
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-- ============================================================
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-- CNX file retrieval info
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-- CNX file retrieval info
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-- ============================================================
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-- ============================================================
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-- Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0"
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-- Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0"
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-- Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1"
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-- Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1"
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-- Retrieval info: PRIVATE: AlmostFull NUMERIC "1"
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-- Retrieval info: PRIVATE: AlmostFull NUMERIC "1"
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-- Retrieval info: PRIVATE: AlmostFullThr NUMERIC "8000"
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-- Retrieval info: PRIVATE: AlmostFullThr NUMERIC "8000"
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-- Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"
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-- Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"
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-- Retrieval info: PRIVATE: Clock NUMERIC "0"
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-- Retrieval info: PRIVATE: Clock NUMERIC "0"
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-- Retrieval info: PRIVATE: Depth NUMERIC "8192"
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-- Retrieval info: PRIVATE: Depth NUMERIC "8192"
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-- Retrieval info: PRIVATE: Empty NUMERIC "1"
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-- Retrieval info: PRIVATE: Empty NUMERIC "1"
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-- Retrieval info: PRIVATE: Full NUMERIC "1"
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-- Retrieval info: PRIVATE: Full NUMERIC "1"
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-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone"
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-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone"
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-- Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0"
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-- Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0"
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-- Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1"
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-- Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1"
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-- Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0"
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-- Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0"
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-- Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0"
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-- Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0"
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-- Retrieval info: PRIVATE: Optimize NUMERIC "1"
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-- Retrieval info: PRIVATE: Optimize NUMERIC "1"
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-- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
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-- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
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-- Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0"
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-- Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0"
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-- Retrieval info: PRIVATE: UsedW NUMERIC "1"
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-- Retrieval info: PRIVATE: UsedW NUMERIC "1"
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-- Retrieval info: PRIVATE: Width NUMERIC "8"
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-- Retrieval info: PRIVATE: Width NUMERIC "8"
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-- Retrieval info: PRIVATE: dc_aclr NUMERIC "1"
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-- Retrieval info: PRIVATE: dc_aclr NUMERIC "1"
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-- Retrieval info: PRIVATE: rsEmpty NUMERIC "1"
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-- Retrieval info: PRIVATE: rsEmpty NUMERIC "1"
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-- Retrieval info: PRIVATE: rsFull NUMERIC "1"
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-- Retrieval info: PRIVATE: rsFull NUMERIC "1"
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-- Retrieval info: PRIVATE: rsUsedW NUMERIC "0"
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-- Retrieval info: PRIVATE: rsUsedW NUMERIC "0"
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-- Retrieval info: PRIVATE: sc_aclr NUMERIC "1"
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-- Retrieval info: PRIVATE: sc_aclr NUMERIC "1"
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-- Retrieval info: PRIVATE: sc_sclr NUMERIC "0"
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-- Retrieval info: PRIVATE: sc_sclr NUMERIC "0"
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-- Retrieval info: PRIVATE: wsEmpty NUMERIC "0"
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-- Retrieval info: PRIVATE: wsEmpty NUMERIC "0"
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-- Retrieval info: PRIVATE: wsFull NUMERIC "1"
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-- Retrieval info: PRIVATE: wsFull NUMERIC "1"
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-- Retrieval info: PRIVATE: wsUsedW NUMERIC "1"
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-- Retrieval info: PRIVATE: wsUsedW NUMERIC "1"
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-- Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "ON"
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-- Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "ON"
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-- Retrieval info: CONSTANT: ALMOST_FULL_VALUE NUMERIC "8000"
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-- Retrieval info: CONSTANT: ALMOST_FULL_VALUE NUMERIC "8000"
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-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"
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-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"
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-- Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "8192"
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-- Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "8192"
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-- Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF"
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-- Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF"
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-- Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo"
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-- Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo"
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-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "8"
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-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "8"
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-- Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "13"
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-- Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "13"
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-- Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"
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-- Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"
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-- Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"
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-- Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"
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-- Retrieval info: CONSTANT: USE_EAB STRING "ON"
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-- Retrieval info: CONSTANT: USE_EAB STRING "ON"
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-- Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT NODEFVAL aclr
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-- Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT NODEFVAL aclr
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-- Retrieval info: USED_PORT: almost_full 0 0 0 0 OUTPUT NODEFVAL almost_full
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-- Retrieval info: USED_PORT: almost_full 0 0 0 0 OUTPUT NODEFVAL almost_full
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-- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock
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-- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock
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-- Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL data[7..0]
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-- Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL data[7..0]
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-- Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL empty
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-- Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL empty
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-- Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL full
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-- Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL full
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-- Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL q[7..0]
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-- Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL q[7..0]
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-- Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq
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-- Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq
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-- Retrieval info: USED_PORT: usedw 0 0 13 0 OUTPUT NODEFVAL usedw[12..0]
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-- Retrieval info: USED_PORT: usedw 0 0 13 0 OUTPUT NODEFVAL usedw[12..0]
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-- Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq
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-- Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq
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-- Retrieval info: CONNECT: @data 0 0 8 0 data 0 0 8 0
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-- Retrieval info: CONNECT: @data 0 0 8 0 data 0 0 8 0
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-- Retrieval info: CONNECT: q 0 0 8 0 @q 0 0 8 0
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-- Retrieval info: CONNECT: q 0 0 8 0 @q 0 0 8 0
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-- Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0
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-- Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0
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-- Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0
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-- Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0
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-- Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0
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-- Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0
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-- Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0
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-- Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0
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-- Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0
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-- Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0
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-- Retrieval info: CONNECT: usedw 0 0 13 0 @usedw 0 0 13 0
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-- Retrieval info: CONNECT: usedw 0 0 13 0 @usedw 0 0 13 0
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-- Retrieval info: CONNECT: almost_full 0 0 0 0 @almost_full 0 0 0 0
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-- Retrieval info: CONNECT: almost_full 0 0 0 0 @almost_full 0 0 0 0
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-- Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0
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-- Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0
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-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
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-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo.vhd TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo.vhd TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo.inc FALSE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo.inc FALSE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo.cmp TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo.cmp TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo.bsf TRUE FALSE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo.bsf TRUE FALSE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo_inst.vhd TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo_inst.vhd TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo_waveforms.html TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo_waveforms.html TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo_wave*.jpg FALSE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL fifo_wave*.jpg FALSE
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