/*!
|
/*!
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ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
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ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
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Copyright (C) 2009-2011 ZTEX GmbH.
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Copyright (C) 2009-2011 ZTEX GmbH.
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http://www.ztex.de
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http://www.ztex.de
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|
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License version 3 as
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it under the terms of the GNU General Public License version 3 as
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published by the Free Software Foundation.
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published by the Free Software Foundation.
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|
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This program is distributed in the hope that it will be useful, but
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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General Public License for more details.
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|
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, see http://www.gnu.org/licenses/.
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along with this program; if not, see http://www.gnu.org/licenses/.
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!*/
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!*/
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/*
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/*
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Puts everything together.
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Puts everything together.
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*/
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*/
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#ifndef[ZTEX_H]
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#ifndef[ZTEX_H]
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#define[ZTEX_H]
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#define[ZTEX_H]
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|
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#define[INIT_CMDS;][]
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#define[INIT_CMDS;][]
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#ifneq[PRODUCT_IS][UFM-1_15]
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#define[UFM_1_15X_DETECTION_ENABLED][0]
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#endif
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#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
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__xdata BYTE is_ufm_1_15x;
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#endif
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/* *********************************************************************
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/* *********************************************************************
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***** include the basic functions ***********************************
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***** include the basic functions ***********************************
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********************************************************************* */
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********************************************************************* */
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#include[ztex-utils.h]
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#include[ztex-utils.h]
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|
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/* *********************************************************************
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/* *********************************************************************
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***** EEPROM support and some I2C helper functions ******************
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***** EEPROM support and some I2C helper functions ******************
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********************************************************************* */
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********************************************************************* */
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#ifneq[EEPROM_DISABLED][1]
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#ifneq[EEPROM_DISABLED][1]
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|
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#ifneq[EEPROM_MAC_DISABLED][1]
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#ifneq[EEPROM_MAC_DISABLED][1]
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#ifeq[PRODUCT_IS][UFM-1_15]
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#ifeq[PRODUCT_IS][UFM-1_15]
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#define[MAC_EEPROM_ENABLED]
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#define[MAC_EEPROM_ENABLED]
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#endif // PRODUCT_IS=UFM-1_15
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#endif // PRODUCT_IS=UFM-1_15
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#ifeq[PRODUCT_IS][UFM-1_15Y]
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#define[MAC_EEPROM_ENABLED]
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#endif // PRODUCT_IS=UFM-1_15Y
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#endif // EEPROM_MAC_DISABLED
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#endif // EEPROM_MAC_DISABLED
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#include[ztex-eeprom.h]
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#include[ztex-eeprom.h]
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#endif // EEPROM_DISABLED
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#endif // EEPROM_DISABLED
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/* *********************************************************************
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/* *********************************************************************
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***** Flash memory support ******************************************
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***** Flash memory support ******************************************
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********************************************************************* */
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********************************************************************* */
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#ifeq[FLASH_ENABLED][1]
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#ifeq[FLASH_ENABLED][1]
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|
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#ifeq[PRODUCT_IS][UFM-1_1]
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#ifeq[PRODUCT_IS][UFM-1_1]
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#define[MMC_PORT][E]
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#define[MMC_PORT][E]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
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#define[MMC_BIT_CLK][5]
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#include[ztex-flash1.h]
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#include[ztex-flash1.h]
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#elifeq[PRODUCT_IS][UFM-1_2]
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#elifeq[PRODUCT_IS][UFM-1_2]
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#define[MMC_PORT][E]
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#define[MMC_PORT][E]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
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#define[MMC_BIT_CLK][5]
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#include[ztex-flash1.h]
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#include[ztex-flash1.h]
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#elifeq[PRODUCT_IS][UM-1_0]
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#elifeq[PRODUCT_IS][UM-1_0]
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#define[MMC_PORT][C]
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#define[MMC_PORT][C]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
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#define[MMC_BIT_CLK][5]
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#include[ztex-flash1.h]
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#include[ztex-flash1.h]
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#elifeq[PRODUCT_IS][UM-1_0]
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#elifeq[PRODUCT_IS][UM-1_0]
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#define[MMC_PORT][C]
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#define[MMC_PORT][C]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
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#define[MMC_BIT_CLK][5]
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#include[ztex-flash1.h]
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#include[ztex-flash1.h]
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#elifeq[PRODUCT_IS][UFM-1_10]
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#elifeq[PRODUCT_IS][UFM-1_10]
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#define[MMC_PORT][A]
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#define[MMC_PORT][A]
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#define[MMC__PORT_DO][D]
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#define[MMC__PORT_DO][D]
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#define[MMC_BIT_DO][0]
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#define[MMC_BIT_DO][0]
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#define[MMC_BIT_CS][5]
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#define[MMC_BIT_CS][5]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_CLK][7]
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#define[MMC_BIT_CLK][7]
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#include[ztex-flash1.h]
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#include[ztex-flash1.h]
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#elifeq[PRODUCT_IS][UFM-1_11]
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#elifeq[PRODUCT_IS][UFM-1_11]
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#define[MMC_PORT][C]
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#define[MMC_PORT][C]
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#define[MMC__PORT_DO][D]
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#define[MMC__PORT_DO][D]
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#define[MMC_BIT_DO][0]
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#define[MMC_BIT_DO][0]
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#define[MMC_BIT_CS][5]
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#define[MMC_BIT_CS][5]
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#define[MMC_BIT_DI][7]
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#define[MMC_BIT_DI][7]
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#define[MMC_BIT_CLK][6]
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#define[MMC_BIT_CLK][6]
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#include[ztex-flash1.h]
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#include[ztex-flash1.h]
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|
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#elifeq[PRODUCT_IS][UFM-1_15]
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#elifeq[PRODUCT_IS][UFM-1_15]
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#define[MMC_PORT][C]
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#define[MMC_PORT][C]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CS][5]
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#define[MMC_BIT_CS][5]
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#define[MMC_BIT_DI][7]
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#define[MMC_BIT_DI][7]
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#define[MMC_BIT_CLK][6]
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#define[MMC_BIT_CLK][6]
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#include[ztex-flash1.h]
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#include[ztex-flash1.h]
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|
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#elifeq[PRODUCT_IS][UXM-1_0]
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#elifeq[PRODUCT_IS][UXM-1_0]
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#define[MMC_PORT][C]
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#define[MMC_PORT][C]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
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#define[MMC_BIT_CLK][5]
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#include[ztex-flash1.h]
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#include[ztex-flash1.h]
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|
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#else
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#else
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#warning[Flash memory access is not supported by this product]
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#warning[Flash memory access is not supported by this product]
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#define[FLASH_ENABLED][0]
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#define[FLASH_ENABLED][0]
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#endif
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#endif
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#endif
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#endif
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/* *********************************************************************
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/* *********************************************************************
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***** FPGA configuration support ************************************
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***** FPGA configuration support ************************************
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********************************************************************* */
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********************************************************************* */
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#ifeq[PRODUCT_IS][UFM-1_0]
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#ifeq[PRODUCT_IS][UFM-1_0]
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#include[ztex-fpga1.h]
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#include[ztex-fpga1.h]
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#elifeq[PRODUCT_IS][UFM-1_1]
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#elifeq[PRODUCT_IS][UFM-1_1]
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#include[ztex-fpga1.h]
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#include[ztex-fpga1.h]
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#elifeq[PRODUCT_IS][UFM-1_2]
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#elifeq[PRODUCT_IS][UFM-1_2]
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#include[ztex-fpga1.h]
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#include[ztex-fpga1.h]
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#elifeq[PRODUCT_IS][UFM-1_10]
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#elifeq[PRODUCT_IS][UFM-1_10]
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#include[ztex-fpga2.h]
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#include[ztex-fpga2.h]
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#elifeq[PRODUCT_IS][UFM-1_11]
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#elifeq[PRODUCT_IS][UFM-1_11]
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#include[ztex-fpga3.h]
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#include[ztex-fpga3.h]
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#elifeq[PRODUCT_IS][UFM-1_15]
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#elifeq[PRODUCT_IS][UFM-1_15]
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#include[ztex-fpga4.h]
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#include[ztex-fpga4.h]
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#elifeq[PRODUCT_IS][UFM-1_15Y]
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#include[ztex-fpga5.h]
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#endif
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#endif
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/* *********************************************************************
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/* *********************************************************************
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***** DEBUG helper functions ****************************************
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***** DEBUG helper functions ****************************************
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********************************************************************* */
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********************************************************************* */
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#ifeq[DEBUG_ENABLED][1]
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#ifeq[DEBUG_ENABLED][1]
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#include[ztex-debug.h]
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#include[ztex-debug.h]
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#endif
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#endif
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/* *********************************************************************
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/* *********************************************************************
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***** XMEGA support *************************************************
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***** XMEGA support *************************************************
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********************************************************************* */
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********************************************************************* */
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#ifneq[XMEGA_DISABLED][1]
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#ifneq[XMEGA_DISABLED][1]
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#ifeq[PRODUCT_IS][UXM-1_0]
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#ifeq[PRODUCT_IS][UXM-1_0]
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#define[PDI_PORT][A]
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#define[PDI_PORT][A]
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#define[PDI_BIT_CLK][0]
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#define[PDI_BIT_CLK][0]
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#define[PDI_BIT_DATA][1]
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#define[PDI_BIT_DATA][1]
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#include[ztex-xmega.h]
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#include[ztex-xmega.h]
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#endif
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#endif
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#ifeq[EXP_1_10_ENABLED][1]
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#ifeq[EXP_1_10_ENABLED][1]
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#ifneq[PRODUCT_IS][UFM-1_0]
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#ifneq[PRODUCT_IS][UFM-1_0]
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#elifneq[PRODUCT_IS][UFM-1_1]
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#elifneq[PRODUCT_IS][UFM-1_1]
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#elifneq[PRODUCT_IS][UFM-1_2]
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#elifneq[PRODUCT_IS][UFM-1_2]
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#elifneq[PRODUCT_IS][UFM-1_10]
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#elifneq[PRODUCT_IS][UFM-1_10]
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#elifneq[PRODUCT_IS][UFM-1_11]
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#elifneq[PRODUCT_IS][UFM-1_11]
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#elifneq[PRODUCT_IS][UFM-1_15]
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#elifneq[PRODUCT_IS][UFM-1_15]
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#warning[ZTEX Experimental Board 1.10 is not supported by this product.]
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#warning[ZTEX Experimental Board 1.10 is not supported by this product.]
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#endif
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#endif
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#define[PDI_PORT][E]
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#define[PDI_PORT][E]
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#define[PDI_BIT_CLK][5]
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#define[PDI_BIT_CLK][5]
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#define[PDI_BIT_DATA][4]
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#define[PDI_BIT_DATA][4]
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#include[ztex-xmega.h]
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#include[ztex-xmega.h]
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#endif
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#endif
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#endif
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#endif
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/* *********************************************************************
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/* *********************************************************************
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***** define the descriptors and the interrupt routines *************
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***** define the descriptors and the interrupt routines *************
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********************************************************************* */
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********************************************************************* */
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#include[ztex-descriptors.h]
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#include[ztex-descriptors.h]
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#include[ztex-isr.h]
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#include[ztex-isr.h]
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#ifdef[@CAPABILITY_MAC_EEPROM;]
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#ifdef[@CAPABILITY_MAC_EEPROM;]
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/* *********************************************************************
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/* *********************************************************************
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***** mac_eeprom_init ***********************************************
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***** mac_eeprom_init ***********************************************
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********************************************************************* */
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********************************************************************* */
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void mac_eeprom_init ( ) {
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void mac_eeprom_init ( ) {
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BYTE b,c,d;
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BYTE b,c,d;
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xdata BYTE buf[5];
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__xdata BYTE buf[5];
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__code char hexdigits[] = "0123456789ABCDEF";
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__code char hexdigits[] = "0123456789ABCDEF";
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|
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for (b=0; b<10; b++) { // abort if SN != "0000000000"
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for (b=0; b<10; b++) { // abort if SN != "0000000000"
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if ( SN_STRING[b] != '0' )
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if ( SN_STRING[b] != 48 )
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return;
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return;
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}
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}
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mac_eeprom_read ( buf, 0xfb, 5 ); // read the last 5 MAC digits
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mac_eeprom_read ( buf, 0xfb, 5 ); // read the last 5 MAC digits
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c=0;
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c=0;
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for (b=0; b<5; b++) { // convert to MAC to SN string
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for (b=0; b<5; b++) { // convert to MAC to SN string
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d = buf[b];
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d = buf[b];
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SN_STRING[c] = hexdigits[d>>4];
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SN_STRING[c] = hexdigits[d>>4];
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c++;
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c++;
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SN_STRING[c] = hexdigits[d & 15];
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SN_STRING[c] = hexdigits[d & 15];
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c++;
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c++;
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}
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}
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}
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}
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#endif
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#endif
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|
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|
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/* *********************************************************************
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/* *********************************************************************
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***** init_USB ******************************************************
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***** init_USB ******************************************************
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********************************************************************* */
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********************************************************************* */
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#define[EPXCFG(][);][ EP$0CFG =
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#define[EPXCFG(][);][ EP$0CFG =
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#ifeq[EP$0_DIR][IN]
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#ifeq[EP$0_DIR][IN]
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bmBIT7 | bmBIT6
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bmBIT7 | bmBIT6
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#elifeq[EP$0_DIR][OUT]
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#elifeq[EP$0_DIR][OUT]
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bmBIT7
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bmBIT7
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#else
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#else
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0
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0
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#endif
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#endif
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#ifeq[EP$0_TYPE][BULK]
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#ifeq[EP$0_TYPE][BULK]
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| bmBIT5
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| bmBIT5
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#elifeq[EP$0_TYPE][ISO]
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#elifeq[EP$0_TYPE][ISO]
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| bmBIT4
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| bmBIT4
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#elifeq[EP$0_TYPE][INT]
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#elifeq[EP$0_TYPE][INT]
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| bmBIT5 | bmBIT4
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| bmBIT5 | bmBIT4
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#endif
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#endif
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#ifeq[EP$0_SIZE][1024]
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#ifeq[EP$0_SIZE][1024]
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| bmBIT3
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| bmBIT3
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#endif
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#endif
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#ifeq[EP$0_BUFFERS][2]
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#ifeq[EP$0_BUFFERS][2]
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| bmBIT1
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| bmBIT1
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#elifeq[EP$0_BUFFERS][3]
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#elifeq[EP$0_BUFFERS][3]
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| bmBIT1 | bmBIT0
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| bmBIT1 | bmBIT0
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#endif
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#endif
|
;
|
;
|
SYNCDELAY;
|
SYNCDELAY;
|
]
|
]
|
|
|
#define[EP1XCFG(][);][#ifeq[EP$0_TYPE][BULK]
|
#define[EP1XCFG(][);][#ifeq[EP$0_TYPE][BULK]
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EP$0CFG = bmBIT7 | bmBIT5;
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EP$0CFG = bmBIT7 | bmBIT5;
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#elifeq[EP$0_TYPE][ISO]
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#elifeq[EP$0_TYPE][ISO]
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EP$0CFG = bmBIT7 | bmBIT4;
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EP$0CFG = bmBIT7 | bmBIT4;
|
#elifeq[EP$0_TYPE][INT]
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#elifeq[EP$0_TYPE][INT]
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EP$0CFG = bmBIT7 | bmBIT5 | bmBIT4;
|
EP$0CFG = bmBIT7 | bmBIT5 | bmBIT4;
|
#else
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#else
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EP$0CFG = 0;
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EP$0CFG = 0;
|
#endif
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#endif
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SYNCDELAY;
|
SYNCDELAY;
|
]
|
]
|
|
|
|
|
void init_USB ()
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void init_USB ()
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{
|
{
|
USBCS |= 0x08;
|
USBCS |= bmBIT3;
|
|
|
CPUCS = bmBIT4 | bmBIT1;
|
CPUCS = bmBIT4 | bmBIT1;
|
wait(2);
|
wait(2);
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CKCON &= ~7;
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CKCON &= ~7;
|
|
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#ifeq[PRODUCT_IS][UFM-1_0]
|
#ifeq[PRODUCT_IS][UFM-1_0]
|
IOA1 = 1;
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IOA1 = 1;
|
OEA |= bmBIT1;
|
OEA |= bmBIT1;
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#elifeq[PRODUCT_IS][UFM-1_1]
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#elifeq[PRODUCT_IS][UFM-1_1]
|
IOA1 = 1;
|
IOA1 = 1;
|
OEA |= bmBIT1;
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OEA |= bmBIT1;
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#elifeq[PRODUCT_IS][UFM-1_2]
|
#elifeq[PRODUCT_IS][UFM-1_2]
|
IOA1 = 1;
|
IOA1 = 1;
|
OEA |= bmBIT1;
|
OEA |= bmBIT1;
|
#elifeq[PRODUCT_IS][UFM-1_10]
|
#elifeq[PRODUCT_IS][UFM-1_10]
|
IOA1 = 1;
|
IOA1 = 1;
|
OEA |= bmBIT1;
|
OEA |= bmBIT1;
|
#elifeq[PRODUCT_IS][UFM-1_11]
|
#elifeq[PRODUCT_IS][UFM-1_11]
|
IOA1 = 1;
|
IOA1 = 1;
|
OEA |= bmBIT1;
|
OEA |= bmBIT1;
|
#elifeq[PRODUCT_IS][UFM-1_15]
|
#elifeq[PRODUCT_IS][UFM-1_15]
|
IOA1 = 1;
|
IOA1 = 1;
|
OEA |= bmBIT1;
|
OEA |= bmBIT1;
|
|
#elifeq[PRODUCT_IS][UFM-1_15Y]
|
|
init_fpga();
|
#endif
|
#endif
|
|
|
INIT_CMDS;
|
INIT_CMDS;
|
|
|
EA = 0;
|
EA = 0;
|
EUSB = 0;
|
EUSB = 0;
|
|
|
ENABLE_AVUSB;
|
ENABLE_AVUSB;
|
|
|
INIT_INTERRUPT_VECTOR(INTVEC_SUDAV, SUDAV_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_SUDAV, SUDAV_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_SOF, SOF_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_SOF, SOF_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_SUTOK, SUTOK_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_SUTOK, SUTOK_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_SUSPEND, SUSP_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_SUSPEND, SUSP_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_USBRESET, URES_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_USBRESET, URES_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_HISPEED, HSGRANT_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_HISPEED, HSGRANT_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP0ACK, EP0ACK_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP0ACK, EP0ACK_ISR);
|
|
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INIT_INTERRUPT_VECTOR(INTVEC_EP0IN, EP0IN_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP0IN, EP0IN_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP0OUT, EP0OUT_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP0OUT, EP0OUT_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP1IN, EP1IN_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP1IN, EP1IN_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP1OUT, EP1OUT_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP1OUT, EP1OUT_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP2, EP2_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP2, EP2_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP4, EP4_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP4, EP4_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP6, EP6_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP6, EP6_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP8, EP8_ISR);
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INIT_INTERRUPT_VECTOR(INTVEC_EP8, EP8_ISR);
|
|
|
EXIF &= ~bmBIT4;
|
EXIF &= ~bmBIT4;
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USBIRQ = 0x7f;
|
USBIRQ = 0x7f;
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USBIE |= 0x7f;
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USBIE |= 0x7f;
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EPIRQ = 0xff;
|
EPIRQ = 0xff;
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EPIE = 0xff;
|
EPIE = 0xff;
|
|
|
EUSB = 1;
|
EUSB = 1;
|
EA = 1;
|
EA = 1;
|
|
|
EP1XCFG(1IN);
|
EP1XCFG(1IN);
|
EP1XCFG(1OUT);
|
EP1XCFG(1OUT);
|
EPXCFG(2);
|
EPXCFG(2);
|
EPXCFG(4);
|
EPXCFG(4);
|
EPXCFG(6);
|
EPXCFG(6);
|
EPXCFG(8);
|
EPXCFG(8);
|
|
|
|
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
|
|
OEA &= ~bmBIT3;
|
|
if ( IOA3 ) {
|
|
is_ufm_1_15x = 0;
|
|
} else {
|
|
is_ufm_1_15x = 1;
|
|
// INTERFACE_CAPABILITIES[0] &= ~32;
|
|
}
|
|
#endif
|
|
|
#ifeq[FLASH_ENABLED][1]
|
#ifeq[FLASH_ENABLED][1]
|
flash_init();
|
flash_init();
|
#endif
|
#endif
|
#ifeq[FLASH_BITSTREAM_ENABLED][1]
|
#ifeq[FLASH_BITSTREAM_ENABLED][1]
|
fpga_configure_from_flash_init();
|
fpga_configure_from_flash_init();
|
#endif
|
#endif
|
#ifeq[DEBUG_ENABLED][1]
|
#ifeq[DEBUG_ENABLED][1]
|
debug_init();
|
debug_init();
|
#endif
|
#endif
|
#ifeq[XMEGA_ENABLED][1]
|
#ifeq[XMEGA_ENABLED][1]
|
xmega_init();
|
xmega_init();
|
#endif
|
#endif
|
#ifdef[@CAPABILITY_MAC_EEPROM;]
|
#ifdef[@CAPABILITY_MAC_EEPROM;]
|
mac_eeprom_init();
|
mac_eeprom_init();
|
#endif
|
#endif
|
|
|
|
|
USBCS |= bmBIT7 | bmBIT1;
|
USBCS |= bmBIT7 | bmBIT1;
|
wait(10);
|
wait(10);
|
// wait(250);
|
// wait(250);
|
USBCS &= ~0x08;
|
USBCS &= ~bmBIT3;
|
}
|
}
|
|
|
|
|
#endif /* ZTEX_H */
|
#endif /* ZTEX_H */
|
|
|