//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//// ////
|
//// ////
|
//// speedCtrlMux.v ////
|
//// speedCtrlMux.v ////
|
//// ////
|
//// ////
|
//// This file is part of the usbhostslave opencores effort.
|
//// This file is part of the usbhostslave opencores effort.
|
//// <http://www.opencores.org/cores//> ////
|
//// <http://www.opencores.org/cores//> ////
|
//// ////
|
//// ////
|
//// Module Description: ////
|
//// Module Description: ////
|
////
|
////
|
//// ////
|
//// ////
|
//// To Do: ////
|
//// To Do: ////
|
////
|
////
|
//// ////
|
//// ////
|
//// Author(s): ////
|
//// Author(s): ////
|
//// - Steve Fielding, sfielding@base2designs.com ////
|
//// - Steve Fielding, sfielding@base2designs.com ////
|
//// ////
|
//// ////
|
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//// ////
|
//// ////
|
//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////
|
//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////
|
//// ////
|
//// ////
|
//// This source file may be used and distributed without ////
|
//// This source file may be used and distributed without ////
|
//// restriction provided that this copyright statement is not ////
|
//// restriction provided that this copyright statement is not ////
|
//// removed from the file and that any derivative work contains ////
|
//// removed from the file and that any derivative work contains ////
|
//// the original copyright notice and the associated disclaimer. ////
|
//// the original copyright notice and the associated disclaimer. ////
|
//// ////
|
//// ////
|
//// This source file is free software; you can redistribute it ////
|
//// This source file is free software; you can redistribute it ////
|
//// and/or modify it under the terms of the GNU Lesser General ////
|
//// and/or modify it under the terms of the GNU Lesser General ////
|
//// Public License as published by the Free Software Foundation; ////
|
//// Public License as published by the Free Software Foundation; ////
|
//// either version 2.1 of the License, or (at your option) any ////
|
//// either version 2.1 of the License, or (at your option) any ////
|
//// later version. ////
|
//// later version. ////
|
//// ////
|
//// ////
|
//// This source is distributed in the hope that it will be ////
|
//// This source is distributed in the hope that it will be ////
|
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
|
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
|
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
|
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
|
//// PURPOSE. See the GNU Lesser General Public License for more ////
|
//// PURPOSE. See the GNU Lesser General Public License for more ////
|
//// details. ////
|
//// details. ////
|
//// ////
|
//// ////
|
//// You should have received a copy of the GNU Lesser General ////
|
//// You should have received a copy of the GNU Lesser General ////
|
//// Public License along with this source; if not, download it ////
|
//// Public License along with this source; if not, download it ////
|
//// from <http://www.opencores.org/lgpl.shtml> ////
|
//// from <http://www.opencores.org/lgpl.shtml> ////
|
//// ////
|
//// ////
|
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//
|
//
|
`timescale 1ns / 1ps
|
`timescale 1ns / 1ps
|
|
|
module speedCtrlMux (directCtrlRate, directCtrlPol, sendPacketRate, sendPacketPol, sendPacketSel, fullSpeedRate, fullSpeedPol);
|
module speedCtrlMux (directCtrlRate, directCtrlPol, sendPacketRate, sendPacketPol, sendPacketSel, fullSpeedRate, fullSpeedPol);
|
input directCtrlRate;
|
input directCtrlRate;
|
input directCtrlPol;
|
input directCtrlPol;
|
input sendPacketRate;
|
input sendPacketRate;
|
input sendPacketPol;
|
input sendPacketPol;
|
input sendPacketSel;
|
input sendPacketSel;
|
output fullSpeedRate;
|
output fullSpeedRate;
|
output fullSpeedPol;
|
output fullSpeedPol;
|
|
|
wire directCtrlRate;
|
wire directCtrlRate;
|
wire directCtrlPol;
|
wire directCtrlPol;
|
wire sendPacketRate;
|
wire sendPacketRate;
|
wire sendPacketPol;
|
wire sendPacketPol;
|
wire sendPacketSel;
|
wire sendPacketSel;
|
reg fullSpeedRate;
|
reg fullSpeedRate;
|
reg fullSpeedPol;
|
reg fullSpeedPol;
|
|
|
|
|
always @(directCtrlRate or directCtrlPol or sendPacketRate or sendPacketPol or sendPacketSel)
|
always @(directCtrlRate or directCtrlPol or sendPacketRate or sendPacketPol or sendPacketSel)
|
begin
|
begin
|
if (sendPacketSel == 1'b1)
|
if (sendPacketSel == 1'b1)
|
begin
|
begin
|
fullSpeedRate <= sendPacketRate;
|
fullSpeedRate <= sendPacketRate;
|
fullSpeedPol <= sendPacketPol;
|
fullSpeedPol <= sendPacketPol;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
fullSpeedRate <= directCtrlRate;
|
fullSpeedRate <= directCtrlRate;
|
fullSpeedPol <= directCtrlPol;
|
fullSpeedPol <= directCtrlPol;
|
end
|
end
|
end
|
end
|
|
|
|
|