OpenCores
URL https://opencores.org/ocsvn/usbhostslave/usbhostslave/trunk

Subversion Repositories usbhostslave

[/] [usbhostslave/] [tags/] [rel_01_01/] [RTL/] [slaveController/] [slaveSendpacket.asf] - Diff between revs 18 and 21

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Rev 18 Rev 21
VERSION=1.15
VERSION=1.15
HEADER
HEADER
FILE="slaveSendpacket.asf"
FILE="slaveSendpacket.asf"
FID=405e9201
FID=405e9201
LANGUAGE=VERILOG
LANGUAGE=VERILOG
ENTITY="slaveSendPacket"
ENTITY="slaveSendPacket"
FRAMES=ON
FRAMES=ON
FREEOID=215
FREEOID=215
"LIBRARIES=//////////////////////////////////////////////////////////////////////\n////                                                              ////\n//// slaveSendPacket\n////                                                              ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/                 ////\n////                                                              ////\n//// Module Description:                                          ////\n//// \n////                                                              ////\n//// To Do:                                                       ////\n//// \n////                                                              ////\n//// Author(s):                                                   ////\n//// - Steve Fielding, sfielding@base2designs.com                 ////\n////                                                              ////\n//////////////////////////////////////////////////////////////////////\n////                                                              ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG          ////\n////                                                              ////\n//// This source file may be used and distributed without         ////\n//// restriction provided that this copyright statement is not    ////\n//// removed from the file and that any derivative work contains  ////\n//// the original copyright notice and the associated disclaimer. ////\n////                                                              ////\n//// This source file is free software; you can redistribute it   ////\n//// and/or modify it under the terms of the GNU Lesser General   ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any   ////\n//// later version.                                               ////\n////                                                              ////\n//// This source is distributed in the hope that it will be       ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////\n//// PURPOSE. See the GNU Lesser General Public License for more  ////\n//// details.                                                     ////\n////                                                              ////\n//// You should have received a copy of the GNU Lesser General    ////\n//// Public License along with this source; if not, download it   ////\n//// from http://www.opencores.org/lgpl.shtml                     ////\n////                                                              ////\n//////////////////////////////////////////////////////////////////////\n//\n//\n`timescale 1ns / 1ps\n`include \"usbSerialInterfaceEngine_h.v\"\n`include \"usbConstants_h.v\"\n"
"LIBRARIES=//////////////////////////////////////////////////////////////////////\n////                                                              ////\n//// slaveSendPacket\n////                                                              ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/                 ////\n////                                                              ////\n//// Module Description:                                          ////\n//// \n////                                                              ////\n//// To Do:                                                       ////\n//// \n////                                                              ////\n//// Author(s):                                                   ////\n//// - Steve Fielding, sfielding@base2designs.com                 ////\n////                                                              ////\n//////////////////////////////////////////////////////////////////////\n////                                                              ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG          ////\n////                                                              ////\n//// This source file may be used and distributed without         ////\n//// restriction provided that this copyright statement is not    ////\n//// removed from the file and that any derivative work contains  ////\n//// the original copyright notice and the associated disclaimer. ////\n////                                                              ////\n//// This source file is free software; you can redistribute it   ////\n//// and/or modify it under the terms of the GNU Lesser General   ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any   ////\n//// later version.                                               ////\n////                                                              ////\n//// This source is distributed in the hope that it will be       ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////\n//// PURPOSE. See the GNU Lesser General Public License for more  ////\n//// details.                                                     ////\n////                                                              ////\n//// You should have received a copy of the GNU Lesser General    ////\n//// Public License along with this source; if not, download it   ////\n//// from http://www.opencores.org/lgpl.shtml                     ////\n////                                                              ////\n//////////////////////////////////////////////////////////////////////\n//\n//\n`timescale 1ns / 1ps\n`include \"usbSerialInterfaceEngine_h.v\"\n`include \"usbConstants_h.v\"\n"
END
END
BUNDLES
BUNDLES
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B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 1  "Arial" 0
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B F "States" 0,0,0 0 0 1 0,255,0 1 3527 1480 0000 0  "Arial" 0
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B T "Actions" 0,0,0 0 0 1 255,255,255 0 3333 0 0000 1  "Arial" 0
B T "Labels" 0,0,0 0 0 0 255,255,255 0 3333 0 0000 1  "Arial" 0
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B F "Current State" 255,255,0 0 0 1 255,255,0 1 3527 1480 0000 0  "Arial" 0
B T "Comments" 157,157,157 0 0 1 255,255,255 0 3333 0 0000 0  "Arial" 0
B T "Comments" 157,157,157 0 0 1 255,255,255 0 3333 0 0000 0  "Arial" 0
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B L "Info" 0,255,0 0 3 1 255,255,255 1 3527 1480 0000 0  "Arial" 0
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B F "Junction" 0,0,0 0 0 1 255,0,0 1 3527 1480 0000 0  "Arial" 0
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OBJECTS
OBJECTS
S 11 6 4096 ELLIPSE "States" | 110774,159341 6500 6500
S 11 6 4096 ELLIPSE "States" | 110774,159341 6500 6500
L 10 11 0 TEXT "State Labels" | 110774,159341 1 0 0 "SP_WAIT_ENABLE\n/1/"
L 10 11 0 TEXT "State Labels" | 110774,159341 1 0 0 "SP_WAIT_ENABLE\n/1/"
S 9 6 0 ELLIPSE "States" | 108917,188434 6500 6500
S 9 6 0 ELLIPSE "States" | 108917,188434 6500 6500
L 8 9 0 TEXT "State Labels" | 108917,188434 1 0 0 "START_SP1\n/0/"
L 8 9 0 TEXT "State Labels" | 108917,188434 1 0 0 "START_SP1\n/0/"
L 7 6 0 TEXT "Labels" | 32660,203132 1 0 0 "slvSndPkt"
L 7 6 0 TEXT "Labels" | 32660,203132 1 0 0 "slvSndPkt"
F 6 0 671089152 188 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3000 212900,208064
F 6 0 671089152 188 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,3000 212900,208064
A 5 0 1 TEXT "Actions" | 29672,248644 1 0 0 "always @(PID)\nbegin\n  PIDNotPID <=  { (PID ^ 4'hf), PID };\nend"
A 5 0 1 TEXT "Actions" | 29672,248644 1 0 0 "always @(PID)\nbegin\n  PIDNotPID <=  { (PID ^ 4'hf), PID };\nend"
G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0  "Arial" 0 | 110650,251000 1 0 0 "Module: slaveSendPacket"
G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0  "Arial" 0 | 110650,251000 1 0 0 "Module: slaveSendPacket"
I 12 6 0 Builtin Reset | 74872,202290
I 12 6 0 Builtin Reset | 74872,202290
W 13 6 0 12 9 BEZIER "Transitions" | 74872,202290 82145,199755 95857,193927 103130,191392
W 13 6 0 12 9 BEZIER "Transitions" | 74872,202290 82145,199755 95857,193927 103130,191392
W 14 6 0 9 11 BEZIER "Transitions" | 108829,181945 109138,177774 109593,169949 109902,165778
W 14 6 0 9 11 BEZIER "Transitions" | 108829,181945 109138,177774 109593,169949 109902,165778
L 15 16 0 TEXT "State Labels" | 112482,123658 1 0 0 "SP1_WAIT_GNT\n/2/"
L 15 16 0 TEXT "State Labels" | 112482,123658 1 0 0 "SP1_WAIT_GNT\n/2/"
S 16 6 8192 ELLIPSE "States" | 112482,123658 6500 6500
S 16 6 8192 ELLIPSE "States" | 112482,123658 6500 6500
W 17 6 0 11 16 BEZIER "Transitions" | 110929,152860 111315,148225 111934,134981 112152,130145
W 17 6 0 11 16 BEZIER "Transitions" | 110929,152860 111315,148225 111934,134981 112152,130145
C 18 17 0 TEXT "Conditions" | 111903,152311 1 0 0 "sendPacketWEn == 1'b1"
C 18 17 0 TEXT "Conditions" | 111903,152311 1 0 0 "sendPacketWEn == 1'b1"
A 19 17 16 TEXT "Actions" | 106114,144280 1 0 0 "sendPacketRdy <= 1'b0;\nSCTxPortReq <= 1'b1;"
A 19 17 16 TEXT "Actions" | 106114,144280 1 0 0 "sendPacketRdy <= 1'b0;\nSCTxPortReq <= 1'b1;"
L 20 21 0 TEXT "State Labels" | 113767,93734 1 0 0 "SP_SEND_PID"
L 20 21 0 TEXT "State Labels" | 113767,93734 1 0 0 "SP_SEND_PID"
S 21 6 12292 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 113767,93734 6500 6500
S 21 6 12292 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 113767,93734 6500 6500
W 22 6 0 16 21 BEZIER "Transitions" | 112482,117158 112791,112755 112951,104607 113260,100204
W 22 6 0 16 21 BEZIER "Transitions" | 112482,117158 112791,112755 112951,104607 113260,100204
C 23 22 0 TEXT "Conditions" | 114630,116691 1 0 0 "SCTxPortGnt == 1'b1"
C 23 22 0 TEXT "Conditions" | 114630,116691 1 0 0 "SCTxPortGnt == 1'b1"
H 25 21 0 RECT 0,0,0 0 0 1 255,255,255 0 | 29624,2084 214124,250084
H 25 21 0 RECT 0,0,0 0 0 1 255,255,255 0 | 29624,2084 214124,250084
S 26 25 16384 ELLIPSE "States" | 72734,192072 6500 6500
S 26 25 16384 ELLIPSE "States" | 72734,192072 6500 6500
L 27 26 0 TEXT "State Labels" | 72734,192775 1 0 0 "WAIT_RDY\n/3/"
L 27 26 0 TEXT "State Labels" | 72734,192775 1 0 0 "WAIT_RDY\n/3/"
I 28 25 0 Builtin Entry | 49237,230379
I 28 25 0 Builtin Entry | 49237,230379
I 29 25 0 Builtin Exit | 146004,95604
I 29 25 0 Builtin Exit | 146004,95604
W 30 25 0 28 26 BEZIER "Transitions" | 53779,230379 60054,220138 63123,209223 69341,197615
W 30 25 0 28 26 BEZIER "Transitions" | 53779,230379 60054,220138 63123,209223 69341,197615
L 32 33 0 TEXT "State Labels" | 75021,153035 1 0 0 "FIN\n/4/"
L 32 33 0 TEXT "State Labels" | 75021,153035 1 0 0 "FIN\n/4/"
S 33 25 20480 ELLIPSE "States" | 75021,153035 6500 6500
S 33 25 20480 ELLIPSE "States" | 75021,153035 6500 6500
W 34 25 0 26 33 BEZIER "Transitions" | 72953,185597 73302,178879 73960,166205 74309,159487
W 34 25 0 26 33 BEZIER "Transitions" | 72953,185597 73302,178879 73960,166205 74309,159487
C 36 34 0 TEXT "Conditions" | 75236,185214 1 0 0 "SCTxPortRdy == 1'b1"
C 36 34 0 TEXT "Conditions" | 75236,185214 1 0 0 "SCTxPortRdy == 1'b1"
A 37 34 16 TEXT "Actions" | 67602,177580 1 0 0 "SCTxPortWEn <= 1'b1;\nSCTxPortData <= PIDNotPID;\nSCTxPortCntl <= `TX_PACKET_START;"
A 37 34 16 TEXT "Actions" | 67602,177580 1 0 0 "SCTxPortWEn <= 1'b1;\nSCTxPortData <= PIDNotPID;\nSCTxPortCntl <= `TX_PACKET_START;"
A 38 33 4 TEXT "Actions" | 93627,154331 1 0 0 "SCTxPortWEn <= 1'b0;"
A 38 33 4 TEXT "Actions" | 93627,154331 1 0 0 "SCTxPortWEn <= 1'b0;"
W 39 25 0 33 29 BEZIER "Transitions" | 79375,148210 95944,135371 126275,108443 142844,95604
W 39 25 0 33 29 BEZIER "Transitions" | 79375,148210 95944,135371 126275,108443 142844,95604
L 44 45 0 TEXT "State Labels" | 182202,45960 1 0 0 "SP_D0_D1"
L 44 45 0 TEXT "State Labels" | 182202,45960 1 0 0 "SP_D0_D1"
S 45 6 24580 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 182202,45960 6500 6500
S 45 6 24580 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 182202,45960 6500 6500
L 46 47 0 TEXT "State Labels" | 115848,16910 1 0 0 "FIN_SP1\n/5/"
L 46 47 0 TEXT "State Labels" | 115848,16910 1 0 0 "FIN_SP1\n/5/"
S 47 6 28672 ELLIPSE "States" | 115848,16910 6500 6500
S 47 6 28672 ELLIPSE "States" | 115848,16910 6500 6500
W 48 6 8194 21 205 BEZIER "Transitions" | 108645,89734 97773,80901 77133,63853 66261,55020
W 48 6 8194 21 205 BEZIER "Transitions" | 108645,89734 97773,80901 77133,63853 66261,55020
W 50 6 8193 21 45 BEZIER "Transitions" | 119169,90120 134042,80003 162156,60011 177029,49894
W 50 6 8193 21 45 BEZIER "Transitions" | 119169,90120 134042,80003 162156,60011 177029,49894
H 65 45 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,2136 212900,250688
H 65 45 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,2136 212900,250688
W 73 6 0 45 47 BEZIER "Transitions" | 176581,42697 162161,37714 135904,25306 121888,19311
W 73 6 0 45 47 BEZIER "Transitions" | 176581,42697 162161,37714 135904,25306 121888,19311
W 74 6 0 205 47 BEZIER "Transitions" | 67096,47093 78647,41129 99521,27639 110324,20335
W 74 6 0 205 47 BEZIER "Transitions" | 67096,47093 78647,41129 99521,27639 110324,20335
W 75 6 0 47 11 BEZIER "Transitions" | 110250,13609 107004,12024 101864,9321 93182,8641\
W 75 6 0 47 11 BEZIER "Transitions" | 110250,13609 107004,12024 101864,9321 93182,8641\
                                      84500,7962 56262,8416 48108,10114 39955,11813\
                                      84500,7962 56262,8416 48108,10114 39955,11813\
                                      35575,18155 34480,31669 33386,45184 33386,92900\
                                      35575,18155 34480,31669 33386,45184 33386,92900\
                                      35198,110038 37010,127177 44258,148015 49996,153300\
                                      35198,110038 37010,127177 44258,148015 49996,153300\
                                      55734,158585 71438,158887 78535,158887 85632,158887\
                                      55734,158585 71438,158887 78535,158887 85632,158887\
                                      97934,159370 104276,159219
                                      97934,159370 104276,159219
A 77 75 16 TEXT "Actions" | 56036,13776 1 0 0 "sendPacketRdy <= 1'b1;\nSCTxPortReq <= 1'b0;"
A 77 75 16 TEXT "Actions" | 56036,13776 1 0 0 "sendPacketRdy <= 1'b1;\nSCTxPortReq <= 1'b0;"
C 81 50 0 TEXT "Conditions" | 136027,85940 1 0 0 "PID == `DATA0 || PID == `DATA1"
C 81 50 0 TEXT "Conditions" | 136027,85940 1 0 0 "PID == `DATA0 || PID == `DATA1"
I 127 65 0 Builtin Exit | 176933,37229
I 127 65 0 Builtin Exit | 176933,37229
I 126 65 0 Builtin Entry | 68162,237252
I 126 65 0 Builtin Entry | 68162,237252
L 143 142 0 TEXT "State Labels" | 93499,188608 1 0 0 "WAIT_READ_FIFO\n/7/"
L 143 142 0 TEXT "State Labels" | 93499,188608 1 0 0 "WAIT_READ_FIFO\n/7/"
S 142 65 36864 ELLIPSE "States" | 93499,187905 6500 6500
S 142 65 36864 ELLIPSE "States" | 93499,187905 6500 6500
A 141 136 4 TEXT "Actions" | 118498,153974 1 0 0 "SCTxPortWEn <= 1'b1;   \nSCTxPortData <= fifoData;\nSCTxPortCntl <= `TX_PACKET_STREAM;"
A 141 136 4 TEXT "Actions" | 118498,153974 1 0 0 "SCTxPortWEn <= 1'b1;   \nSCTxPortData <= fifoData;\nSCTxPortCntl <= `TX_PACKET_STREAM;"
A 140 138 16 TEXT "Actions" | 77848,170826 1 0 0 "fifoReadEn <= 1'b1;"
A 140 138 16 TEXT "Actions" | 77848,170826 1 0 0 "fifoReadEn <= 1'b1;"
C 139 138 0 TEXT "Conditions" | 93949,179372 1 0 0 "SCTxPortRdy == 1'b1"
C 139 138 0 TEXT "Conditions" | 93949,179372 1 0 0 "SCTxPortRdy == 1'b1"
W 138 65 0 142 212 BEZIER "Transitions" | 93778,181425 88301,173716 82823,166005 77346,158296
W 138 65 0 142 212 BEZIER "Transitions" | 93778,181425 88301,173716 82823,166005 77346,158296
L 137 136 0 TEXT "State Labels" | 97634,134508 1 0 0 "READ_FIFO\n/6/"
L 137 136 0 TEXT "State Labels" | 97634,134508 1 0 0 "READ_FIFO\n/6/"
S 136 65 32768 ELLIPSE "States" | 97326,133352 6500 6500
S 136 65 32768 ELLIPSE "States" | 97326,133352 6500 6500
W 128 65 0 126 145 BEZIER "Transitions" | 72704,237252 77515,245311 99394,235265 108723,227500
W 128 65 0 126 145 BEZIER "Transitions" | 72704,237252 77515,245311 99394,235265 108723,227500
L 159 158 0 TEXT "State Labels" | 59589,120610 1 0 0 "TERM_BYTE\n/10/"
L 159 158 0 TEXT "State Labels" | 59589,120610 1 0 0 "TERM_BYTE\n/10/"
S 158 65 49152 ELLIPSE "States" | 59589,119907 6500 6500
S 158 65 49152 ELLIPSE "States" | 59589,119907 6500 6500
A 157 152 4 TEXT "Actions" | 82022,67382 1 0 0 "SCTxPortWEn <= 1'b0;"
A 157 152 4 TEXT "Actions" | 82022,67382 1 0 0 "SCTxPortWEn <= 1'b0;"
A 156 154 16 TEXT "Actions" | 58975,105373 1 0 0 "//Last byte is not valid data, \n//but the 'TX_PACKET_STOP' flag is required \n//by the SIE state machine to detect end of data packet\nSCTxPortWEn <= 1'b1;\nSCTxPortData <= 8'h00;\nSCTxPortCntl <= `TX_PACKET_STOP;"
A 156 154 16 TEXT "Actions" | 58975,105373 1 0 0 "//Last byte is not valid data, \n//but the 'TX_PACKET_STOP' flag is required \n//by the SIE state machine to detect end of data packet\nSCTxPortWEn <= 1'b1;\nSCTxPortData <= 8'h00;\nSCTxPortCntl <= `TX_PACKET_STOP;"
C 155 154 0 TEXT "Conditions" | 61533,111844 1 0 0 "SCTxPortRdy == 1'b1"
C 155 154 0 TEXT "Conditions" | 61533,111844 1 0 0 "SCTxPortRdy == 1'b1"
W 154 65 0 158 152 BEZIER "Transitions" | 59808,113432 60157,106714 62272,79249 62621,72531
W 154 65 0 158 152 BEZIER "Transitions" | 59808,113432 60157,106714 62272,79249 62621,72531
L 153 152 0 TEXT "State Labels" | 63724,65778 1 0 0 "FIN\n/9/"
L 153 152 0 TEXT "State Labels" | 63724,65778 1 0 0 "FIN\n/9/"
S 152 65 45056 ELLIPSE "States" | 63416,66086 6500 6500
S 152 65 45056 ELLIPSE "States" | 63416,66086 6500 6500
C 148 146 0 TEXT "Conditions" | 110699,212736 1 0 0 "fifoEmpty == 1'b0"
C 148 146 0 TEXT "Conditions" | 110699,212736 1 0 0 "fifoEmpty == 1'b0"
W 146 65 8193 145 142 BEZIER "Transitions" | 109258,216579 105891,210391 99971,199802 96604,193614
W 146 65 8193 145 142 BEZIER "Transitions" | 109258,216579 105891,210391 99971,199802 96604,193614
S 145 65 40960 ELLIPSE "States" | 112500,222212 6500 6500
S 145 65 40960 ELLIPSE "States" | 112500,222212 6500 6500
L 144 145 0 TEXT "State Labels" | 111719,222145 1 0 0 "FIFO_EMPTY\n/8/"
L 144 145 0 TEXT "State Labels" | 111719,222145 1 0 0 "FIFO_EMPTY\n/8/"
I 175 0 2 Builtin OutPort | 155450,237706 "" ""
I 175 0 2 Builtin OutPort | 155450,237706 "" ""
L 174 173 0 TEXT "Labels" | 41299,213676 1 0 0 "PID[3:0]"
L 174 173 0 TEXT "Labels" | 41299,213676 1 0 0 "PID[3:0]"
I 173 0 130 Builtin InPort | 35299,213676 "" ""
I 173 0 130 Builtin InPort | 35299,213676 "" ""
L 172 171 0 TEXT "Labels" | 39427,218968 1 0 0 "sendPacketRdy"
L 172 171 0 TEXT "Labels" | 39427,218968 1 0 0 "sendPacketRdy"
I 171 0 2 Builtin OutPort | 33427,218968 "" ""
I 171 0 2 Builtin OutPort | 33427,218968 "" ""
I 170 0 2 Builtin InPort | 35414,224168 "" ""
I 170 0 2 Builtin InPort | 35414,224168 "" ""
L 169 170 0 TEXT "Labels" | 41414,224168 1 0 0 "sendPacketWEn"
L 169 170 0 TEXT "Labels" | 41414,224168 1 0 0 "sendPacketWEn"
I 168 0 2 Builtin OutPort | 99800,215222 "" ""
I 168 0 2 Builtin OutPort | 99800,215222 "" ""
L 167 168 0 TEXT "Labels" | 105800,214970 1 0 0 "fifoReadEn"
L 167 168 0 TEXT "Labels" | 105800,214970 1 0 0 "fifoReadEn"
L 166 165 0 TEXT "Labels" | 108007,220336 1 0 0 "fifoData[7:0]"
L 166 165 0 TEXT "Labels" | 108007,220336 1 0 0 "fifoData[7:0]"
I 165 0 130 Builtin InPort | 102007,220336 "" ""
I 165 0 130 Builtin InPort | 102007,220336 "" ""
I 164 0 2 Builtin InPort | 101658,228164 "" ""
I 164 0 2 Builtin InPort | 101658,228164 "" ""
L 163 164 0 TEXT "Labels" | 107658,228164 1 0 0 "fifoEmpty"
L 163 164 0 TEXT "Labels" | 107658,228164 1 0 0 "fifoEmpty"
W 162 65 0 152 127 BEZIER "Transitions" | 69206,63133 84852,58192 113349,46697 126570,43677\
W 162 65 0 152 127 BEZIER "Transitions" | 69206,63133 84852,58192 113349,46697 126570,43677\
                                          139792,40658 161594,38692 165369,38074 169145,37457\
                                          139792,40658 161594,38692 165369,38074 169145,37457\
                                          170187,37688 173773,37229
                                          170187,37688 173773,37229
W 160 65 8194 145 158 BEZIER "Transitions" | 106145,220849 94342,218470 70892,213593 64258,206319\
W 160 65 8194 145 158 BEZIER "Transitions" | 106145,220849 94342,218470 70892,213593 64258,206319\
                                             57625,199045 54697,174705 54514,164091 54331,153478\
                                             57625,199045 54697,174705 54514,164091 54331,153478\
                                             57228,135338 58326,126280
                                             57228,135338 58326,126280
C 191 13 0 TEXT "Conditions" | 86196,196179 1 0 0 "rst"
C 191 13 0 TEXT "Conditions" | 86196,196179 1 0 0 "rst"
L 190 189 0 TEXT "Labels" | 204532,251890 1 0 0 "rst"
L 190 189 0 TEXT "Labels" | 204532,251890 1 0 0 "rst"
I 189 0 2 Builtin InPort | 198532,251890 "" ""
I 189 0 2 Builtin InPort | 198532,251890 "" ""
I 188 0 3 Builtin InPort | 198206,245948 "" ""
I 188 0 3 Builtin InPort | 198206,245948 "" ""
L 187 188 0 TEXT "Labels" | 204206,245948 1 0 0 "clk"
L 187 188 0 TEXT "Labels" | 204206,245948 1 0 0 "clk"
L 186 185 0 TEXT "Labels" | 162179,213226 1 0 0 "SCTxPortCntl[7:0]"
L 186 185 0 TEXT "Labels" | 162179,213226 1 0 0 "SCTxPortCntl[7:0]"
I 185 0 130 Builtin OutPort | 156179,213226 "" ""
I 185 0 130 Builtin OutPort | 156179,213226 "" ""
L 184 183 0 TEXT "Labels" | 162035,218266 1 0 0 "SCTxPortData[7:0]"
L 184 183 0 TEXT "Labels" | 162035,218266 1 0 0 "SCTxPortData[7:0]"
I 183 0 130 Builtin OutPort | 156035,218266 "" ""
I 183 0 130 Builtin OutPort | 156035,218266 "" ""
L 182 181 0 TEXT "Labels" | 164231,223036 1 0 0 "SCTxPortRdy"
L 182 181 0 TEXT "Labels" | 164231,223036 1 0 0 "SCTxPortRdy"
I 181 0 2 Builtin InPort | 158231,223036 "" ""
I 181 0 2 Builtin InPort | 158231,223036 "" ""
I 180 0 2 Builtin OutPort | 155564,228002 "" ""
I 180 0 2 Builtin OutPort | 155564,228002 "" ""
L 179 180 0 TEXT "Labels" | 161564,228002 1 0 0 "SCTxPortWEn"
L 179 180 0 TEXT "Labels" | 161564,228002 1 0 0 "SCTxPortWEn"
L 178 177 0 TEXT "Labels" | 163583,232918 1 0 0 "SCTxPortGnt"
L 178 177 0 TEXT "Labels" | 163583,232918 1 0 0 "SCTxPortGnt"
I 177 0 2 Builtin InPort | 157583,232918 "" ""
I 177 0 2 Builtin InPort | 157583,232918 "" ""
L 176 175 0 TEXT "Labels" | 161450,237706 1 0 0 "SCTxPortReq"
L 176 175 0 TEXT "Labels" | 161450,237706 1 0 0 "SCTxPortReq"
S 207 65 57344 ELLIPSE "States" | 163561,124222 6500 6500
S 207 65 57344 ELLIPSE "States" | 163561,124222 6500 6500
L 206 207 0 TEXT "State Labels" | 163561,124222 1 0 0 "CLR_WEN\n/12/"
L 206 207 0 TEXT "State Labels" | 163561,124222 1 0 0 "CLR_WEN\n/12/"
A 192 9 2 TEXT "Actions" | 127282,199550 1 0 0 "sendPacketRdy <= 1'b1;\nfifoReadEn <= 1'b0;\nSCTxPortData <= 8'h00;\nSCTxPortCntl <= 8'h00;\nSCTxPortWEn <= 1'b0;\nSCTxPortReq <= 1'b0;"
A 192 9 2 TEXT "Actions" | 127282,199550 1 0 0 "sendPacketRdy <= 1'b1;\nfifoReadEn <= 1'b0;\nSCTxPortData <= 8'h00;\nSCTxPortCntl <= 8'h00;\nSCTxPortWEn <= 1'b0;\nSCTxPortReq <= 1'b0;"
L 194 195 0 TEXT "Labels" | 38000,231468 1 0 0 "PIDNotPID[7:0]"
L 194 195 0 TEXT "Labels" | 38000,231468 1 0 0 "PIDNotPID[7:0]"
I 195 0 128 Builtin Signal | 35000,231468 "" ""
I 195 0 128 Builtin Signal | 35000,231468 "" ""
L 204 205 0 TEXT "State Labels" | 61573,50520 1 0 0 "SP_NOT_DATA\n/11/"
L 204 205 0 TEXT "State Labels" | 61573,50520 1 0 0 "SP_NOT_DATA\n/11/"
S 205 6 53248 ELLIPSE "States" | 61573,50520 6500 6500
S 205 6 53248 ELLIPSE "States" | 61573,50520 6500 6500
W 210 65 0 207 145 BEZIER "Transitions" | 169895,125680 176804,126013 188953,127552 193864,130465\
W 210 65 0 207 145 BEZIER "Transitions" | 169895,125680 176804,126013 188953,127552 193864,130465\
                                          198775,133379 204604,144369 205686,152818 206768,161268\
                                          198775,133379 204604,144369 205686,152818 206768,161268\
                                          205269,184079 201481,192903 197694,201727 184040,214216\
                                          205269,184079 201481,192903 197694,201727 184040,214216\
                                          173218,217462 162396,220708 133810,221642 118992,221891
                                          173218,217462 162396,220708 133810,221642 118992,221891
W 209 65 0 136 207 BEZIER "Transitions" | 103712,132145 117531,130730 143304,126529 157123,125114
W 209 65 0 136 207 BEZIER "Transitions" | 103712,132145 117531,130730 143304,126529 157123,125114
A 208 207 4 TEXT "Actions" | 145246,113566 1 0 0 "SCTxPortWEn <= 1'b0;"
A 208 207 4 TEXT "Actions" | 145246,113566 1 0 0 "SCTxPortWEn <= 1'b0;"
L 211 212 0 TEXT "State Labels" | 76973,151815 1 0 0 "CLR_REN\n/13/"
L 211 212 0 TEXT "State Labels" | 76973,151815 1 0 0 "CLR_REN\n/13/"
S 212 65 61440 ELLIPSE "States" | 76973,151815 6500 6500
S 212 65 61440 ELLIPSE "States" | 76973,151815 6500 6500
A 213 212 4 TEXT "Actions" | 88033,161295 1 0 0 "fifoReadEn <= 1'b0;"
A 213 212 4 TEXT "Actions" | 88033,161295 1 0 0 "fifoReadEn <= 1'b0;"
W 214 65 0 212 136 BEZIER "Transitions" | 81800,147464 84861,145094 89728,140374 92789,138004
W 214 65 0 212 136 BEZIER "Transitions" | 81800,147464 84861,145094 89728,140374 92789,138004
END
END
 
 

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