VERSION=1.15
|
VERSION=1.15
|
HEADER
|
HEADER
|
FILE="hctxportarbiter.asf"
|
FILE="hctxportarbiter.asf"
|
FID=405ea588
|
FID=405ea588
|
LANGUAGE=VERILOG
|
LANGUAGE=VERILOG
|
ENTITY="HCTxPortArbiter"
|
ENTITY="HCTxPortArbiter"
|
FRAMES=ON
|
FRAMES=ON
|
FREEOID=101
|
FREEOID=101
|
"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// hctxPortArbiter\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@base2designs.com ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n`include \"timescale.v\"\n"
|
"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// hctxPortArbiter\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@base2designs.com ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n`include \"timescale.v\"\n"
|
END
|
END
|
BUNDLES
|
BUNDLES
|
B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 1 "Arial" 0
|
B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 1 "Arial" 0
|
B T "Conditions" 0,0,0 0 0 0 255,255,255 0 3333 0 0110 1 "Arial" 0
|
B T "Conditions" 0,0,0 0 0 0 255,255,255 0 3333 0 0110 1 "Arial" 0
|
B F "States" 0,0,0 0 0 1 0,255,0 1 3527 1480 0000 0 "Arial" 0
|
B F "States" 0,0,0 0 0 1 0,255,0 1 3527 1480 0000 0 "Arial" 0
|
B T "Actions" 0,0,0 0 0 1 255,255,255 0 3333 0 0000 1 "Arial" 0
|
B T "Actions" 0,0,0 0 0 1 255,255,255 0 3333 0 0000 1 "Arial" 0
|
B T "Labels" 0,0,0 0 0 0 0,0,0 0 3333 0 0000 1 "Arial" 0
|
B T "Labels" 0,0,0 0 0 0 0,0,0 0 3333 0 0000 1 "Arial" 0
|
B L "Transitions" 0,0,0 0 0 1 0,0,0 1 3527 1480 0000 0 "Arial" 0
|
B L "Transitions" 0,0,0 0 0 1 0,0,0 1 3527 1480 0000 0 "Arial" 0
|
B F "Ports" 0,0,0 0 0 1 0,255,255 1 3527 1480 0000 0 "Arial" 0
|
B F "Ports" 0,0,0 0 0 1 0,255,255 1 3527 1480 0000 0 "Arial" 0
|
B L "Errors" 255,0,0 0 3 1 255,255,255 1 3527 1480 0000 0 "Arial" 0
|
B L "Errors" 255,0,0 0 3 1 255,255,255 1 3527 1480 0000 0 "Arial" 0
|
B T "State Labels" 0,0,0 0 0 0 0,0,0 0 3333 0 0000 1 "Arial" 4
|
B T "State Labels" 0,0,0 0 0 0 0,0,0 0 3333 0 0000 1 "Arial" 4
|
B F "Current State" 255,255,0 0 0 1 255,255,0 1 3527 1480 0000 0 "Arial" 0
|
B F "Current State" 255,255,0 0 0 1 255,255,0 1 3527 1480 0000 0 "Arial" 0
|
B T "Comments" 157,157,157 0 0 1 255,255,255 0 3333 0 0000 0 "Arial" 0
|
B T "Comments" 157,157,157 0 0 1 255,255,255 0 3333 0 0000 0 "Arial" 0
|
B L "Info" 0,255,0 0 3 1 255,255,255 1 3527 1480 0000 0 "Arial" 0
|
B L "Info" 0,255,0 0 3 1 255,255,255 1 3527 1480 0000 0 "Arial" 0
|
B F "Junction" 0,0,0 0 0 1 255,0,0 1 3527 1480 0000 0 "Arial" 0
|
B F "Junction" 0,0,0 0 0 1 255,0,0 1 3527 1480 0000 0 "Arial" 0
|
B F "Initial State Indicator" 0,0,0 0 0 1 240,140,40 1 3527 1480 0000 0 "Arial" 0
|
B F "Initial State Indicator" 0,0,0 0 0 1 240,140,40 1 3527 1480 0000 0 "Arial" 0
|
END
|
END
|
INSTHEADER 1
|
INSTHEADER 1
|
PAGE 12700,12700 431800,558800
|
PAGE 12700,12700 431800,558800
|
UPPERLEFT 0,0
|
UPPERLEFT 0,0
|
GRID=OFF
|
GRID=OFF
|
GRIDSIZE 5000,5000 10000,10000
|
GRIDSIZE 5000,5000 10000,10000
|
END
|
END
|
OBJECTS
|
OBJECTS
|
G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 97950,543100 1 0 0 "Module: HCTxPortArbiter"
|
G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 97950,543100 1 0 0 "Module: HCTxPortArbiter"
|
F 6 0 671089152 41 0 RECT 0,0,0 0 0 1 255,255,255 0 | 138680,277900 323180,412945
|
F 6 0 671089152 41 0 RECT 0,0,0 0 0 1 255,255,255 0 | 138680,277900 323180,412945
|
L 7 6 0 TEXT "Labels" | 153720,399520 1 0 0 "HCTxArb"
|
L 7 6 0 TEXT "Labels" | 153720,399520 1 0 0 "HCTxArb"
|
S 8 6 0 ELLIPSE "States" | 225591,395370 6500 6500
|
S 8 6 0 ELLIPSE "States" | 225591,395370 6500 6500
|
L 9 8 0 TEXT "State Labels" | 225591,395370 1 0 0 "START_HARB\n/0/"
|
L 9 8 0 TEXT "State Labels" | 225591,395370 1 0 0 "START_HARB\n/0/"
|
S 10 6 4096 ELLIPSE "States" | 224972,365039 6500 6500
|
S 10 6 4096 ELLIPSE "States" | 224972,365039 6500 6500
|
L 11 10 0 TEXT "State Labels" | 224972,363653 1 0 0 "WAIT_REQ\n/1/"
|
L 11 10 0 TEXT "State Labels" | 224972,363653 1 0 0 "WAIT_REQ\n/1/"
|
S 12 6 8192 ELLIPSE "States" | 191859,293613 6500 6500
|
S 12 6 8192 ELLIPSE "States" | 191859,293613 6500 6500
|
L 13 12 0 TEXT "State Labels" | 191859,293613 1 0 0 "SEND_SOF\n/2/"
|
L 13 12 0 TEXT "State Labels" | 191859,293613 1 0 0 "SEND_SOF\n/2/"
|
S 14 6 12288 ELLIPSE "States" | 269063,296392 6500 6500
|
S 14 6 12288 ELLIPSE "States" | 269063,296392 6500 6500
|
L 15 14 0 TEXT "State Labels" | 269063,296392 1 0 0 "SEND_PACKET\n/3/"
|
L 15 14 0 TEXT "State Labels" | 269063,296392 1 0 0 "SEND_PACKET\n/3/"
|
I 16 6 0 Builtin Reset | 178237,395710
|
I 16 6 0 Builtin Reset | 178237,395710
|
W 17 6 0 16 8 BEZIER "Transitions" | 178237,395710 187522,391937 210052,391894 219337,393602
|
W 17 6 0 16 8 BEZIER "Transitions" | 178237,395710 187522,391937 210052,391894 219337,393602
|
W 18 6 0 8 10 BEZIER "Transitions" | 225224,388894 225070,384414 224938,376011 224784,371531
|
W 18 6 0 8 10 BEZIER "Transitions" | 225224,388894 225070,384414 224938,376011 224784,371531
|
W 19 6 2 10 14 BEZIER "Transitions" | 229757,360641 236477,355079 258220,315910 265438,301787
|
W 19 6 2 10 14 BEZIER "Transitions" | 229757,360641 236477,355079 258220,315910 265438,301787
|
W 20 6 1 10 12 BEZIER "Transitions" | 219884,360995 214322,355742 203672,314353 193976,299756
|
W 20 6 1 10 12 BEZIER "Transitions" | 219884,360995 214322,355742 203672,314353 193976,299756
|
C 21 20 0 TEXT "Conditions" | 185611,358255 1 0 0 "SOFCntlReq == 1'b1"
|
C 21 20 0 TEXT "Conditions" | 185611,358255 1 0 0 "SOFCntlReq == 1'b1"
|
C 22 19 0 TEXT "Conditions" | 235353,358515 1 0 0 "sendPacketReq == 1'b1"
|
C 22 19 0 TEXT "Conditions" | 235353,358515 1 0 0 "sendPacketReq == 1'b1"
|
A 23 19 16 TEXT "Actions" | 233291,339940 1 0 0 "sendPacketGnt <= 1'b1;\nmuxCntl <= `SEND_PACKET_MUX;"
|
A 23 19 16 TEXT "Actions" | 233291,339940 1 0 0 "sendPacketGnt <= 1'b1;\nmuxCntl <= `SEND_PACKET_MUX;"
|
A 24 20 16 TEXT "Actions" | 172116,340566 1 0 0 "SOFCntlGnt <= 1'b1;\nmuxCntl <= `SOF_CTRL_MUX;"
|
A 24 20 16 TEXT "Actions" | 172116,340566 1 0 0 "SOFCntlGnt <= 1'b1;\nmuxCntl <= `SOF_CTRL_MUX;"
|
A 25 8 2 TEXT "Actions" | 255918,407981 1 0 0 "SOFCntlGnt <= 1'b0;\nsendPacketGnt <= 1'b0;\ndirectCntlGnt <= 1'b0;\nmuxCntl <= 2'b00;"
|
A 25 8 2 TEXT "Actions" | 255918,407981 1 0 0 "SOFCntlGnt <= 1'b0;\nsendPacketGnt <= 1'b0;\ndirectCntlGnt <= 1'b0;\nmuxCntl <= 2'b00;"
|
C 26 17 0 TEXT "Conditions" | 201742,391978 1 0 0 "rst"
|
C 26 17 0 TEXT "Conditions" | 201742,391978 1 0 0 "rst"
|
W 27 6 0 14 10 BEZIER "Transitions" | 272129,302121 294143,322021 288020,346232 288403,352802\
|
W 27 6 0 14 10 BEZIER "Transitions" | 272129,302121 294143,322021 288020,346232 288403,352802\
|
288786,359372 287077,371461 282417,376909 277757,382357\
|
288786,359372 287077,371461 282417,376909 277757,382357\
|
274547,381487 268775,381564 263003,381642 254872,381366\
|
274547,381487 268775,381564 263003,381642 254872,381366\
|
248267,378971 241663,376577 234289,371557 230118,369008
|
248267,378971 241663,376577 234289,371557 230118,369008
|
W 28 6 0 12 10 BEZIER "Transitions" | 186560,297376 167155,311353 168429,333163 167686,340659\
|
W 28 6 0 12 10 BEZIER "Transitions" | 186560,297376 167155,311353 168429,333163 167686,340659\
|
166944,348155 168507,364217 173450,370590 178394,376963\
|
166944,348155 168507,364217 173450,370590 178394,376963\
|
186275,384997 193806,383684 201338,382371 213515,373400\
|
186275,384997 193806,383684 201338,382371 213515,373400\
|
220004,369229
|
220004,369229
|
A 29 28 16 TEXT "Actions" | 161739,369899 1 0 0 "SOFCntlGnt <= 1'b0;"
|
A 29 28 16 TEXT "Actions" | 161739,369899 1 0 0 "SOFCntlGnt <= 1'b0;"
|
C 30 28 0 TEXT "Conditions" | 155052,298962 1 0 0 "SOFCntlReq == 1'b0"
|
C 30 28 0 TEXT "Conditions" | 155052,298962 1 0 0 "SOFCntlReq == 1'b0"
|
C 31 27 0 TEXT "Conditions" | 272024,315171 1 0 0 "sendPacketReq == 1'b0"
|
C 31 27 0 TEXT "Conditions" | 272024,315171 1 0 0 "sendPacketReq == 1'b0"
|
A 32 27 16 TEXT "Actions" | 268756,371179 1 0 0 "sendPacketGnt <= 1'b0;"
|
A 32 27 16 TEXT "Actions" | 268756,371179 1 0 0 "sendPacketGnt <= 1'b0;"
|
I 33 0 2 Builtin OutPort | 117425,484940 "" ""
|
I 33 0 2 Builtin OutPort | 117425,484940 "" ""
|
L 34 33 0 TEXT "Labels" | 123425,484940 1 0 0 "SOFCntlGnt"
|
L 34 33 0 TEXT "Labels" | 123425,484940 1 0 0 "SOFCntlGnt"
|
I 37 0 2 Builtin OutPort | 164033,485851 "" ""
|
I 37 0 2 Builtin OutPort | 164033,485851 "" ""
|
L 38 37 0 TEXT "Labels" | 170033,485851 1 0 0 "sendPacketGnt"
|
L 38 37 0 TEXT "Labels" | 170033,485851 1 0 0 "sendPacketGnt"
|
I 39 0 2 Builtin InPort | 197412,542480 "" ""
|
I 39 0 2 Builtin InPort | 197412,542480 "" ""
|
L 40 39 0 TEXT "Labels" | 203412,542480 1 0 0 "rst"
|
L 40 39 0 TEXT "Labels" | 203412,542480 1 0 0 "rst"
|
I 41 0 3 Builtin InPort | 197495,536936 "" ""
|
I 41 0 3 Builtin InPort | 197495,536936 "" ""
|
I 44 0 130 Builtin InPort | 166169,499499 "" ""
|
I 44 0 130 Builtin InPort | 166169,499499 "" ""
|
L 45 44 0 TEXT "Labels" | 172169,499499 1 0 0 "sendPacketData[7:0]"
|
L 45 44 0 TEXT "Labels" | 172169,499499 1 0 0 "sendPacketData[7:0]"
|
L 36 35 0 TEXT "Labels" | 170373,457796 1 0 0 "HCTxPortWEnable"
|
L 36 35 0 TEXT "Labels" | 170373,457796 1 0 0 "HCTxPortWEnable"
|
I 35 0 2 Builtin OutPort | 164373,457796 "" ""
|
I 35 0 2 Builtin OutPort | 164373,457796 "" ""
|
I 48 0 2 Builtin InPort | 120008,489821 "" ""
|
I 48 0 2 Builtin InPort | 120008,489821 "" ""
|
L 49 48 0 TEXT "Labels" | 126008,489821 1 0 0 "SOFCntlWEn"
|
L 49 48 0 TEXT "Labels" | 126008,489821 1 0 0 "SOFCntlWEn"
|
I 52 0 2 Builtin InPort | 165981,490639 "" ""
|
I 52 0 2 Builtin InPort | 165981,490639 "" ""
|
L 53 52 0 TEXT "Labels" | 171981,490639 1 0 0 "sendPacketWEn"
|
L 53 52 0 TEXT "Labels" | 171981,490639 1 0 0 "sendPacketWEn"
|
A 54 0 1 TEXT "Actions" | 25211,394555 1 0 0 "// SOFController/directContol/sendPacket mux\nalways @(muxCntl or SOFCntlWEn or SOFCntlData or SOFCntlCntl or\n directCntlWEn or directCntlData or directCntlCntl or\n directCntlWEn or directCntlData or directCntlCntl or\n sendPacketWEn or sendPacketData or sendPacketCntl)\nbegin\ncase (muxCntl)\n `SOF_CTRL_MUX :\n begin \n HCTxPortWEnable <= SOFCntlWEn;\n HCTxPortData <= SOFCntlData;\n HCTxPortCntl <= SOFCntlCntl;\n end\n `DIRECT_CTRL_MUX :\n begin \n HCTxPortWEnable <= directCntlWEn;\n HCTxPortData <= directCntlData;\n HCTxPortCntl <= directCntlCntl;\n end\n `SEND_PACKET_MUX :\n begin \n HCTxPortWEnable <= sendPacketWEn;\n HCTxPortData <= sendPacketData;\n HCTxPortCntl <= sendPacketCntl;\n end\n default :\n begin \n HCTxPortWEnable <= 1'b0;\n HCTxPortData <= 8'h00;\n HCTxPortCntl <= 8'h00;\n end\nendcase \nend"
|
A 54 0 1 TEXT "Actions" | 25211,394555 1 0 0 "// SOFController/directContol/sendPacket mux\nalways @(muxCntl or SOFCntlWEn or SOFCntlData or SOFCntlCntl or\n directCntlWEn or directCntlData or directCntlCntl or\n directCntlWEn or directCntlData or directCntlCntl or\n sendPacketWEn or sendPacketData or sendPacketCntl)\nbegin\ncase (muxCntl)\n `SOF_CTRL_MUX :\n begin \n HCTxPortWEnable <= SOFCntlWEn;\n HCTxPortData <= SOFCntlData;\n HCTxPortCntl <= SOFCntlCntl;\n end\n `DIRECT_CTRL_MUX :\n begin \n HCTxPortWEnable <= directCntlWEn;\n HCTxPortData <= directCntlData;\n HCTxPortCntl <= directCntlCntl;\n end\n `SEND_PACKET_MUX :\n begin \n HCTxPortWEnable <= sendPacketWEn;\n HCTxPortData <= sendPacketData;\n HCTxPortCntl <= sendPacketCntl;\n end\n default :\n begin \n HCTxPortWEnable <= 1'b0;\n HCTxPortData <= 8'h00;\n HCTxPortCntl <= 8'h00;\n end\nendcase \nend"
|
I 55 0 2 Builtin InPort | 119812,480347 "" ""
|
I 55 0 2 Builtin InPort | 119812,480347 "" ""
|
I 56 0 2 Builtin InPort | 166286,481063 "" ""
|
I 56 0 2 Builtin InPort | 166286,481063 "" ""
|
L 57 56 0 TEXT "Labels" | 172286,481063 1 0 0 "sendPacketReq"
|
L 57 56 0 TEXT "Labels" | 172286,481063 1 0 0 "sendPacketReq"
|
L 60 55 0 TEXT "Labels" | 125812,480347 1 0 0 "SOFCntlReq"
|
L 60 55 0 TEXT "Labels" | 125812,480347 1 0 0 "SOFCntlReq"
|
L 61 41 0 TEXT "Labels" | 203495,536936 1 0 0 "clk"
|
L 61 41 0 TEXT "Labels" | 203495,536936 1 0 0 "clk"
|
I 62 0 130 Builtin InPort | 166256,495120 "" ""
|
I 62 0 130 Builtin InPort | 166256,495120 "" ""
|
L 63 62 0 TEXT "Labels" | 172256,495120 1 0 0 "sendPacketCntl[7:0]"
|
L 63 62 0 TEXT "Labels" | 172256,495120 1 0 0 "sendPacketCntl[7:0]"
|
L 59 58 0 TEXT "Labels" | 170296,453278 1 0 0 "HCTxPortData[7:0]"
|
L 59 58 0 TEXT "Labels" | 170296,453278 1 0 0 "HCTxPortData[7:0]"
|
I 58 0 130 Builtin OutPort | 164296,453278 "" ""
|
I 58 0 130 Builtin OutPort | 164296,453278 "" ""
|
I 68 0 130 Builtin InPort | 119837,494606 "" ""
|
I 68 0 130 Builtin InPort | 119837,494606 "" ""
|
L 69 68 0 TEXT "Labels" | 125837,494606 1 0 0 "SOFCntlCntl[7:0]"
|
L 69 68 0 TEXT "Labels" | 125837,494606 1 0 0 "SOFCntlCntl[7:0]"
|
I 70 0 130 Builtin InPort | 119737,499229 "" ""
|
I 70 0 130 Builtin InPort | 119737,499229 "" ""
|
L 71 70 0 TEXT "Labels" | 125737,499229 1 0 0 "SOFCntlData[7:0]"
|
L 71 70 0 TEXT "Labels" | 125737,499229 1 0 0 "SOFCntlData[7:0]"
|
L 72 73 0 TEXT "Labels" | 144050,542882 1 0 0 "SEND_PACKET_MUX=2'b00"
|
L 72 73 0 TEXT "Labels" | 144050,542882 1 0 0 "SEND_PACKET_MUX=2'b00"
|
I 73 0 263 Builtin Constant | 141050,542882 "" I "" ""
|
I 73 0 263 Builtin Constant | 141050,542882 "" I "" ""
|
L 74 75 0 TEXT "Labels" | 144050,538259 1 0 0 "SOF_CTRL_MUX=2'b01"
|
L 74 75 0 TEXT "Labels" | 144050,538259 1 0 0 "SOF_CTRL_MUX=2'b01"
|
I 75 0 263 Builtin Constant | 141050,538259 "" I "" ""
|
I 75 0 263 Builtin Constant | 141050,538259 "" I "" ""
|
I 76 0 263 Builtin Constant | 140950,533626 "" I "" ""
|
I 76 0 263 Builtin Constant | 140950,533626 "" I "" ""
|
L 77 76 0 TEXT "Labels" | 143950,533626 1 0 0 "DIRECT_CTRL_MUX=2'b10"
|
L 77 76 0 TEXT "Labels" | 143950,533626 1 0 0 "DIRECT_CTRL_MUX=2'b10"
|
I 78 0 2 Builtin OutPort | 117944,457060 "" ""
|
I 78 0 2 Builtin OutPort | 117944,457060 "" ""
|
L 79 78 0 TEXT "Labels" | 123944,457060 1 0 0 "directCntlGnt"
|
L 79 78 0 TEXT "Labels" | 123944,457060 1 0 0 "directCntlGnt"
|
L 67 66 0 TEXT "Labels" | 170124,471556 1 0 0 "HCTxPortCntl[7:0]"
|
L 67 66 0 TEXT "Labels" | 170124,471556 1 0 0 "HCTxPortCntl[7:0]"
|
I 66 0 130 Builtin OutPort | 164124,471556 "" ""
|
I 66 0 130 Builtin OutPort | 164124,471556 "" ""
|
I 80 0 2 Builtin InPort | 120331,452467 "" ""
|
I 80 0 2 Builtin InPort | 120331,452467 "" ""
|
L 81 80 0 TEXT "Labels" | 126331,452467 1 0 0 "directCntlReq"
|
L 81 80 0 TEXT "Labels" | 126331,452467 1 0 0 "directCntlReq"
|
I 82 0 2 Builtin InPort | 120527,461941 "" ""
|
I 82 0 2 Builtin InPort | 120527,461941 "" ""
|
L 83 82 0 TEXT "Labels" | 126527,461941 1 0 0 "directCntlWEn"
|
L 83 82 0 TEXT "Labels" | 126527,461941 1 0 0 "directCntlWEn"
|
I 84 0 130 Builtin InPort | 120256,471349 "" ""
|
I 84 0 130 Builtin InPort | 120256,471349 "" ""
|
L 85 84 0 TEXT "Labels" | 126256,471349 1 0 0 "directCntlData[7:0]"
|
L 85 84 0 TEXT "Labels" | 126256,471349 1 0 0 "directCntlData[7:0]"
|
I 86 0 130 Builtin InPort | 120356,466726 "" ""
|
I 86 0 130 Builtin InPort | 120356,466726 "" ""
|
L 87 86 0 TEXT "Labels" | 126356,466726 1 0 0 "directCntlCntl[7:0]"
|
L 87 86 0 TEXT "Labels" | 126356,466726 1 0 0 "directCntlCntl[7:0]"
|
L 88 89 0 TEXT "Labels" | 144050,528812 1 0 0 "muxCntl[1:0]"
|
L 88 89 0 TEXT "Labels" | 144050,528812 1 0 0 "muxCntl[1:0]"
|
I 89 0 130 Builtin Signal | 141050,528812 "" ""
|
I 89 0 130 Builtin Signal | 141050,528812 "" ""
|
L 90 91 0 TEXT "State Labels" | 230314,289948 1 0 0 "DIRECT_CONTROL\n/4/"
|
L 90 91 0 TEXT "State Labels" | 230314,289948 1 0 0 "DIRECT_CONTROL\n/4/"
|
S 91 6 16384 ELLIPSE "States" | 230314,289948 6500 6500
|
S 91 6 16384 ELLIPSE "States" | 230314,289948 6500 6500
|
W 92 6 8195 10 91 BEZIER "Transitions" | 225187,358573 226192,342895 228547,312073 229552,296395
|
W 92 6 8195 10 91 BEZIER "Transitions" | 225187,358573 226192,342895 228547,312073 229552,296395
|
C 94 92 0 TEXT "Conditions" | 216646,319294 1 0 0 "directCntlReq == 1'b1"
|
C 94 92 0 TEXT "Conditions" | 216646,319294 1 0 0 "directCntlReq == 1'b1"
|
A 95 92 16 TEXT "Actions" | 205993,310852 1 0 0 "directCntlGnt <= 1'b1;\nmuxCntl <= `DIRECT_CTRL_MUX;"
|
A 95 92 16 TEXT "Actions" | 205993,310852 1 0 0 "directCntlGnt <= 1'b1;\nmuxCntl <= `DIRECT_CTRL_MUX;"
|
W 96 6 0 91 10 BEZIER "Transitions" | 235538,286081 238258,285074 242316,283075 251081,282571\
|
W 96 6 0 91 10 BEZIER "Transitions" | 235538,286081 238258,285074 242316,283075 251081,282571\
|
259846,282068 289467,282068 298484,284234 307501,286400\
|
259846,282068 289467,282068 298484,284234 307501,286400\
|
313949,295065 315460,307759 316972,320453 316568,362568\
|
313949,295065 315460,307759 316972,320453 316568,362568\
|
311430,375060 306292,387553 286404,388600 275724,388298\
|
311430,375060 306292,387553 286404,388600 275724,388298\
|
265045,387996 242215,385739 236069,382112 229924,378486\
|
265045,387996 242215,385739 236069,382112 229924,378486\
|
228216,373858 227209,371138
|
228216,373858 227209,371138
|
C 97 96 0 TEXT "Conditions" | 246245,286904 1 0 0 "directCntlReq == 1'b0"
|
C 97 96 0 TEXT "Conditions" | 246245,286904 1 0 0 "directCntlReq == 1'b0"
|
A 98 96 16 TEXT "Actions" | 290172,290128 1 0 0 "directCntlGnt <= 1'b0;"
|
A 98 96 16 TEXT "Actions" | 290172,290128 1 0 0 "directCntlGnt <= 1'b0;"
|
END
|
END
|
|
|
