//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// usbHostControl.v ////
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//// usbHostControl.v ////
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//// ////
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//// ////
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//// This file is part of the usbhostslave opencores effort.
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//// This file is part of the usbhostslave opencores effort.
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//// <http://www.opencores.org/cores//> ////
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//// <http://www.opencores.org/cores//> ////
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//// ////
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//// ////
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//// Module Description: ////
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//// Module Description: ////
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////
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////
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//// ////
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//// ////
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//// To Do: ////
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//// To Do: ////
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////
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////
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//// ////
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//// ////
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//// Author(s): ////
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//// Author(s): ////
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//// - Steve Fielding, sfielding@base2designs.com ////
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//// - Steve Fielding, sfielding@base2designs.com ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////
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//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// later version. ////
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//// ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// details. ////
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//// ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// Public License along with this source; if not, download it ////
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//// from <http://www.opencores.org/lgpl.shtml> ////
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//// from <http://www.opencores.org/lgpl.shtml> ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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`timescale 1ns / 1ps
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`timescale 1ns / 1ps
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|
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module usbHostControl(
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module usbHostControl(
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clk, rst,
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busClk, rstSyncToBusClk,
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usbClk, rstSyncToUsbClk,
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//sendPacket
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//sendPacket
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TxFifoRE, TxFifoData, TxFifoEmpty,
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TxFifoRE, TxFifoData, TxFifoEmpty,
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//getPacket
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//getPacket
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RxFifoWE, RxFifoData, RxFifoFull,
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RxFifoWE, RxFifoData, RxFifoFull,
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RxByteStatus, RxData, RxDataValid,
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RxByteStatus, RxData, RxDataValid,
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SIERxTimeOut,
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SIERxTimeOut,
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//speedCtrlMux
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//speedCtrlMux
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fullSpeedRate, fullSpeedPol,
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fullSpeedRate, fullSpeedPol,
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//HCTxPortArbiter
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//HCTxPortArbiter
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HCTxPortEn, HCTxPortRdy,
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HCTxPortEn, HCTxPortRdy,
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HCTxPortData, HCTxPortCtrl,
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HCTxPortData, HCTxPortCtrl,
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//rxStatusMonitor
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//rxStatusMonitor
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connectStateIn,
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connectStateIn,
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resumeDetectedIn,
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resumeDetectedIn,
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//USBHostControlBI
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//USBHostControlBI
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busAddress,
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busAddress,
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busDataIn,
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busDataIn,
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busDataOut,
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busDataOut,
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busWriteEn,
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busWriteEn,
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busStrobe_i,
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busStrobe_i,
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SOFSentIntOut,
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SOFSentIntOut,
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connEventIntOut,
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connEventIntOut,
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resumeIntOut,
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resumeIntOut,
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transDoneIntOut,
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transDoneIntOut,
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hostControlSelect
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hostControlSelect
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);
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);
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|
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input clk, rst;
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input busClk;
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input rstSyncToBusClk;
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input usbClk;
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input rstSyncToUsbClk;
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//sendPacket
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//sendPacket
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output TxFifoRE;
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output TxFifoRE;
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input [7:0] TxFifoData;
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input [7:0] TxFifoData;
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input TxFifoEmpty;
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input TxFifoEmpty;
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//getPacket
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//getPacket
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output RxFifoWE;
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output RxFifoWE;
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output [7:0] RxFifoData;
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output [7:0] RxFifoData;
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input RxFifoFull;
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input RxFifoFull;
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input [7:0] RxByteStatus;
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input [7:0] RxByteStatus;
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input [7:0] RxData;
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input [7:0] RxData;
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input RxDataValid;
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input RxDataValid;
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input SIERxTimeOut;
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input SIERxTimeOut;
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//speedCtrlMux
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//speedCtrlMux
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output fullSpeedRate;
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output fullSpeedRate;
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output fullSpeedPol;
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output fullSpeedPol;
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//HCTxPortArbiter
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//HCTxPortArbiter
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output HCTxPortEn;
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output HCTxPortEn;
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input HCTxPortRdy;
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input HCTxPortRdy;
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output [7:0] HCTxPortData;
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output [7:0] HCTxPortData;
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output [7:0] HCTxPortCtrl;
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output [7:0] HCTxPortCtrl;
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//rxStatusMonitor
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//rxStatusMonitor
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input [1:0] connectStateIn;
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input [1:0] connectStateIn;
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input resumeDetectedIn;
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input resumeDetectedIn;
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//USBHostControlBI
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//USBHostControlBI
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input [3:0] busAddress;
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input [3:0] busAddress;
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input [7:0] busDataIn;
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input [7:0] busDataIn;
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output [7:0] busDataOut;
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output [7:0] busDataOut;
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input busWriteEn;
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input busWriteEn;
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input busStrobe_i;
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input busStrobe_i;
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output SOFSentIntOut;
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output SOFSentIntOut;
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output connEventIntOut;
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output connEventIntOut;
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output resumeIntOut;
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output resumeIntOut;
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output transDoneIntOut;
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output transDoneIntOut;
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input hostControlSelect;
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input hostControlSelect;
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wire clk;
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wire busClk;
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wire rst;
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wire rstSyncToBusClk;
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wire usbClk;
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wire rstSyncToUsbClk;
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wire [10:0] frameNum;
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wire [10:0] frameNum;
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wire SOFSent;
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wire SOFSent;
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wire TxFifoRE;
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wire TxFifoRE;
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wire [7:0] TxFifoData;
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wire [7:0] TxFifoData;
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wire TxFifoEmpty;
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wire TxFifoEmpty;
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wire RxFifoWE;
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wire RxFifoWE;
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wire [7:0] RxFifoData;
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wire [7:0] RxFifoData;
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wire RxFifoFull;
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wire RxFifoFull;
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wire [7:0] RxByteStatus;
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wire [7:0] RxByteStatus;
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wire [7:0] RxData;
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wire [7:0] RxData;
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wire RxDataValid;
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wire RxDataValid;
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wire SIERxTimeOut;
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wire SIERxTimeOut;
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wire fullSpeedRate;
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wire fullSpeedRate;
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wire fullSpeedPol;
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wire fullSpeedPol;
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wire HCTxPortEn;
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wire HCTxPortEn;
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wire HCTxPortRdy;
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wire HCTxPortRdy;
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wire [7:0] HCTxPortData;
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wire [7:0] HCTxPortData;
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wire [7:0] HCTxPortCtrl;
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wire [7:0] HCTxPortCtrl;
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wire [1:0] connectStateIn;
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wire [1:0] connectStateIn;
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wire resumeDetectedIn;
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wire resumeDetectedIn;
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wire [3:0] busAddress;
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wire [3:0] busAddress;
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wire [7:0] busDataIn;
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wire [7:0] busDataIn;
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wire [7:0] busDataOut;
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wire [7:0] busDataOut;
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wire busWriteEn;
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wire busWriteEn;
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wire busStrobe_i;
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wire busStrobe_i;
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wire SOFSentIntOut;
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wire SOFSentIntOut;
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wire connEventIntOut;
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wire connEventIntOut;
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wire resumeIntOut;
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wire resumeIntOut;
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wire transDoneIntOut;
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wire transDoneIntOut;
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wire hostControlSelect;
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wire hostControlSelect;
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//internal wiring
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//internal wiring
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wire SOFTimerClr;
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wire SOFTimerClr;
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wire getPacketREn;
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wire getPacketREn;
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wire getPacketRdy;
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wire getPacketRdy;
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wire HCTxGnt;
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wire HCTxGnt;
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wire HCTxReq;
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wire HCTxReq;
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wire [3:0] HC_PID;
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wire [3:0] HC_PID;
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wire HC_SP_WEn;
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wire HC_SP_WEn;
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wire SOFTxGnt;
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wire SOFTxGnt;
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wire SOFTxReq;
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wire SOFTxReq;
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wire SOF_SP_WEn;
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wire SOF_SP_WEn;
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wire SOFEnable;
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wire SOFEnable;
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wire SOFSyncEn;
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wire SOFSyncEn;
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wire sendPacketCPReadyIn;
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wire sendPacketCPReadyIn;
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wire sendPacketCPReadyOut;
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wire sendPacketCPReadyOut;
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wire [3:0] sendPacketCPPIDIn;
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wire [3:0] sendPacketCPPIDIn;
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wire [3:0] sendPacketCPPIDOut;
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wire [3:0] sendPacketCPPIDOut;
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wire sendPacketCPWEnIn;
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wire sendPacketCPWEnIn;
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wire sendPacketCPWEnOut;
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wire sendPacketCPWEnOut;
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wire [7:0] SOFCntlCntl;
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wire [7:0] SOFCntlCntl;
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wire [7:0] SOFCntlData;
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wire [7:0] SOFCntlData;
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wire SOFCntlGnt;
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wire SOFCntlGnt;
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wire SOFCntlReq;
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wire SOFCntlReq;
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wire SOFCntlWEn;
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wire SOFCntlWEn;
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wire [7:0] directCntlCntl;
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wire [7:0] directCntlCntl;
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wire [7:0] directCntlData;
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wire [7:0] directCntlData;
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wire directCntlGnt;
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wire directCntlGnt;
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wire directCntlReq;
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wire directCntlReq;
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wire directCntlWEn;
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wire directCntlWEn;
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wire [7:0] sendPacketCntl;
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wire [7:0] sendPacketCntl;
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wire [7:0] sendPacketData;
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wire [7:0] sendPacketData;
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wire sendPacketGnt;
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wire sendPacketGnt;
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wire sendPacketReq;
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wire sendPacketReq;
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wire sendPacketWEn;
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wire sendPacketWEn;
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wire [15:0] SOFTimer;
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wire [15:0] SOFTimer;
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wire clrTxReq;
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wire clrTxReq;
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wire transDone;
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wire transDone;
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wire transReq;
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wire transReq;
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wire isoEn;
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wire isoEn;
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wire [1:0] transType;
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wire [1:0] transType;
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wire preAmbleEnable;
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wire preAmbleEnable;
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wire [1:0] directLineState;
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wire [1:0] directLineState;
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wire directLineCtrlEn;
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wire directLineCtrlEn;
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wire [6:0] TxAddr;
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wire [6:0] TxAddr;
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wire [3:0] TxEndP;
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wire [3:0] TxEndP;
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wire [7:0] RxPktStatus;
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wire [7:0] RxPktStatus;
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wire [3:0] RxPID;
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wire [3:0] RxPID;
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wire [1:0] connectStateOut;
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wire [1:0] connectStateOut;
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wire resumeIntFromRxStatusMon;
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wire resumeIntFromRxStatusMon;
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wire connectionEventFromRxStatusMon;
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wire connectionEventFromRxStatusMon;
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|
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USBHostControlBI u_USBHostControlBI
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USBHostControlBI u_USBHostControlBI
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(.address(busAddress),
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(.address(busAddress),
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.dataIn(busDataIn),
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.dataIn(busDataIn),
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.dataOut(busDataOut),
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.dataOut(busDataOut),
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.writeEn(busWriteEn),
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.writeEn(busWriteEn),
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.strobe_i(busStrobe_i),
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.strobe_i(busStrobe_i),
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.clk(clk),
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.busClk(busClk),
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.rst(rst),
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.rstSyncToBusClk(rstSyncToBusClk),
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.usbClk(usbClk),
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.rstSyncToUsbClk(rstSyncToUsbClk),
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.SOFSentIntOut(SOFSentIntOut),
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.SOFSentIntOut(SOFSentIntOut),
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.connEventIntOut(connEventIntOut),
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.connEventIntOut(connEventIntOut),
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.resumeIntOut(resumeIntOut),
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.resumeIntOut(resumeIntOut),
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.transDoneIntOut(transDoneIntOut),
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.transDoneIntOut(transDoneIntOut),
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.TxTransTypeReg(transType),
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.TxTransTypeReg(transType),
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.TxSOFEnableReg(SOFEnable),
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.TxSOFEnableReg(SOFEnable),
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.TxAddrReg(TxAddr),
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.TxAddrReg(TxAddr),
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.TxEndPReg(TxEndP),
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.TxEndPReg(TxEndP),
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.frameNumIn(frameNum),
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.frameNumIn(frameNum),
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.RxPktStatusIn(RxPktStatus),
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.RxPktStatusIn(RxPktStatus),
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.RxPIDIn(RxPID),
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.RxPIDIn(RxPID),
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.connectStateIn(connectStateOut),
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.connectStateIn(connectStateOut),
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.SOFSentIn(SOFSent),
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.SOFSentIn(SOFSent),
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.connEventIn(connectionEventFromRxStatusMon),
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.connEventIn(connectionEventFromRxStatusMon),
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.resumeIntIn(resumeIntFromRxStatusMon),
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.resumeIntIn(resumeIntFromRxStatusMon),
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.transDoneIn(transDone),
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.transDoneIn(transDone),
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.hostControlSelect(hostControlSelect),
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.hostControlSelect(hostControlSelect),
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.clrTransReq(clrTxReq),
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.clrTransReq(clrTxReq),
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.preambleEn(preAmbleEnable),
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.preambleEn(preAmbleEnable),
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.SOFSync(SOFSyncEn),
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.SOFSync(SOFSyncEn),
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.TxLineState(directLineState),
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.TxLineState(directLineState),
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.LineDirectControlEn(directLineCtrlEn),
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.LineDirectControlEn(directLineCtrlEn),
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.fullSpeedPol(fullSpeedPol),
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.fullSpeedPol(fullSpeedPol),
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.fullSpeedRate(fullSpeedRate),
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.fullSpeedRate(fullSpeedRate),
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.transReq(transReq),
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.transReq(transReq),
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.isoEn(isoEn),
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.isoEn(isoEn),
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.SOFTimer(SOFTimer)
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.SOFTimer(SOFTimer)
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);
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);
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|
|
|
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hostcontroller u_hostController
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hostcontroller u_hostController
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(.RXStatus(RxPktStatus),
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(.RXStatus(RxPktStatus),
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.clearTXReq(clrTxReq),
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.clearTXReq(clrTxReq),
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.clk(clk),
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.clk(usbClk),
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.getPacketREn(getPacketREn),
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.getPacketREn(getPacketREn),
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.getPacketRdy(getPacketRdy),
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.getPacketRdy(getPacketRdy),
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.rst(rst),
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.rst(rstSyncToUsbClk),
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.sendPacketArbiterGnt(HCTxGnt),
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.sendPacketArbiterGnt(HCTxGnt),
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.sendPacketArbiterReq(HCTxReq),
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.sendPacketArbiterReq(HCTxReq),
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.sendPacketPID(HC_PID),
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.sendPacketPID(HC_PID),
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.sendPacketRdy(sendPacketCPReadyOut),
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.sendPacketRdy(sendPacketCPReadyOut),
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.sendPacketWEn(HC_SP_WEn),
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.sendPacketWEn(HC_SP_WEn),
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.transDone(transDone),
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.transDone(transDone),
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.transReq(transReq),
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.transReq(transReq),
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.transType(transType),
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.transType(transType),
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.isoEn(isoEn) );
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.isoEn(isoEn) );
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|
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SOFController u_SOFController
|
SOFController u_SOFController
|
(.HCTxPortCntl(SOFCntlCntl),
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(.HCTxPortCntl(SOFCntlCntl),
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.HCTxPortData(SOFCntlData),
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.HCTxPortData(SOFCntlData),
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.HCTxPortGnt(SOFCntlGnt),
|
.HCTxPortGnt(SOFCntlGnt),
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.HCTxPortRdy(HCTxPortRdy),
|
.HCTxPortRdy(HCTxPortRdy),
|
.HCTxPortReq(SOFCntlReq),
|
.HCTxPortReq(SOFCntlReq),
|
.HCTxPortWEn(SOFCntlWEn),
|
.HCTxPortWEn(SOFCntlWEn),
|
.SOFEnable(SOFEnable),
|
.SOFEnable(SOFEnable),
|
.SOFTimerClr(SOFTimerClr),
|
.SOFTimerClr(SOFTimerClr),
|
.SOFTimer(SOFTimer),
|
.SOFTimer(SOFTimer),
|
.clk(clk),
|
.clk(usbClk),
|
.rst(rst) );
|
.rst(rstSyncToUsbClk) );
|
|
|
SOFTransmit u_SOFTransmit
|
SOFTransmit u_SOFTransmit
|
(.SOFEnable(SOFEnable),
|
(.SOFEnable(SOFEnable),
|
.SOFSent(SOFSent),
|
.SOFSent(SOFSent),
|
.SOFSyncEn(SOFSyncEn),
|
.SOFSyncEn(SOFSyncEn),
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.SOFTimerClr(SOFTimerClr),
|
.SOFTimerClr(SOFTimerClr),
|
.SOFTimer(SOFTimer),
|
.SOFTimer(SOFTimer),
|
.clk(clk),
|
.clk(usbClk),
|
.rst(rst),
|
.rst(rstSyncToUsbClk),
|
.sendPacketArbiterGnt(SOFTxGnt),
|
.sendPacketArbiterGnt(SOFTxGnt),
|
.sendPacketArbiterReq(SOFTxReq),
|
.sendPacketArbiterReq(SOFTxReq),
|
.sendPacketRdy(sendPacketCPReadyOut),
|
.sendPacketRdy(sendPacketCPReadyOut),
|
.sendPacketWEn(SOF_SP_WEn) );
|
.sendPacketWEn(SOF_SP_WEn) );
|
|
|
|
|
sendPacketArbiter u_sendPacketArbiter
|
sendPacketArbiter u_sendPacketArbiter
|
(.HCTxGnt(HCTxGnt),
|
(.HCTxGnt(HCTxGnt),
|
.HCTxReq(HCTxReq),
|
.HCTxReq(HCTxReq),
|
.HC_PID(HC_PID),
|
.HC_PID(HC_PID),
|
.HC_SP_WEn(HC_SP_WEn),
|
.HC_SP_WEn(HC_SP_WEn),
|
.SOFTxGnt(SOFTxGnt),
|
.SOFTxGnt(SOFTxGnt),
|
.SOFTxReq(SOFTxReq),
|
.SOFTxReq(SOFTxReq),
|
.SOF_SP_WEn(SOF_SP_WEn),
|
.SOF_SP_WEn(SOF_SP_WEn),
|
.clk(clk),
|
.clk(usbClk),
|
.rst(rst),
|
.rst(rstSyncToUsbClk),
|
.sendPacketPID(sendPacketCPPIDIn),
|
.sendPacketPID(sendPacketCPPIDIn),
|
.sendPacketWEnable(sendPacketCPWEnIn) );
|
.sendPacketWEnable(sendPacketCPWEnIn) );
|
|
|
sendPacketCheckPreamble u_sendPacketCheckPreamble
|
sendPacketCheckPreamble u_sendPacketCheckPreamble
|
(.sendPacketCPPID(sendPacketCPPIDIn),
|
(.sendPacketCPPID(sendPacketCPPIDIn),
|
.clk(clk),
|
.clk(usbClk),
|
.preAmbleEnable(preAmbleEnable),
|
.preAmbleEnable(preAmbleEnable),
|
.rst(rst),
|
.rst(rstSyncToUsbClk),
|
.sendPacketCPReady(sendPacketCPReadyOut),
|
.sendPacketCPReady(sendPacketCPReadyOut),
|
.sendPacketCPWEn(sendPacketCPWEnIn),
|
.sendPacketCPWEn(sendPacketCPWEnIn),
|
.sendPacketPID(sendPacketCPPIDOut),
|
.sendPacketPID(sendPacketCPPIDOut),
|
.sendPacketRdy(sendPacketCPReadyIn),
|
.sendPacketRdy(sendPacketCPReadyIn),
|
.sendPacketWEn(sendPacketCPWEnOut) );
|
.sendPacketWEn(sendPacketCPWEnOut) );
|
|
|
sendPacket u_sendPacket
|
sendPacket u_sendPacket
|
(.HCTxPortCntl(sendPacketCntl),
|
(.HCTxPortCntl(sendPacketCntl),
|
.HCTxPortData(sendPacketData),
|
.HCTxPortData(sendPacketData),
|
.HCTxPortGnt(sendPacketGnt),
|
.HCTxPortGnt(sendPacketGnt),
|
.HCTxPortRdy(HCTxPortRdy),
|
.HCTxPortRdy(HCTxPortRdy),
|
.HCTxPortReq(sendPacketReq),
|
.HCTxPortReq(sendPacketReq),
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.HCTxPortWEn(sendPacketWEn),
|
.HCTxPortWEn(sendPacketWEn),
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.PID(sendPacketCPPIDOut),
|
.PID(sendPacketCPPIDOut),
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.TxAddr(TxAddr),
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.TxAddr(TxAddr),
|
.TxEndP(TxEndP),
|
.TxEndP(TxEndP),
|
.clk(clk),
|
.clk(usbClk),
|
.fifoData(TxFifoData),
|
.fifoData(TxFifoData),
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.fifoEmpty(TxFifoEmpty),
|
.fifoEmpty(TxFifoEmpty),
|
.fifoReadEn(TxFifoRE),
|
.fifoReadEn(TxFifoRE),
|
.frameNum(frameNum),
|
.frameNum(frameNum),
|
.rst(rst),
|
.rst(rstSyncToUsbClk),
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.sendPacketRdy(sendPacketCPReadyIn),
|
.sendPacketRdy(sendPacketCPReadyIn),
|
.sendPacketWEn(sendPacketCPWEnOut),
|
.sendPacketWEn(sendPacketCPWEnOut),
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.fullSpeedPolarity(fullSpeedPol) );
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.fullSpeedPolarity(fullSpeedPol) );
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|
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directControl u_directControl
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directControl u_directControl
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(.HCTxPortCntl(directCntlCntl),
|
(.HCTxPortCntl(directCntlCntl),
|
.HCTxPortData(directCntlData),
|
.HCTxPortData(directCntlData),
|
.HCTxPortGnt(directCntlGnt),
|
.HCTxPortGnt(directCntlGnt),
|
.HCTxPortRdy(HCTxPortRdy),
|
.HCTxPortRdy(HCTxPortRdy),
|
.HCTxPortReq(directCntlReq),
|
.HCTxPortReq(directCntlReq),
|
.HCTxPortWEn(directCntlWEn),
|
.HCTxPortWEn(directCntlWEn),
|
.clk(clk),
|
.clk(usbClk),
|
.directControlEn(directLineCtrlEn),
|
.directControlEn(directLineCtrlEn),
|
.directControlLineState(directLineState),
|
.directControlLineState(directLineState),
|
.rst(rst) );
|
.rst(rstSyncToUsbClk) );
|
|
|
HCTxPortArbiter u_HCTxPortArbiter
|
HCTxPortArbiter u_HCTxPortArbiter
|
(.HCTxPortCntl(HCTxPortCtrl),
|
(.HCTxPortCntl(HCTxPortCtrl),
|
.HCTxPortData(HCTxPortData),
|
.HCTxPortData(HCTxPortData),
|
.HCTxPortWEnable(HCTxPortEn),
|
.HCTxPortWEnable(HCTxPortEn),
|
.SOFCntlCntl(SOFCntlCntl),
|
.SOFCntlCntl(SOFCntlCntl),
|
.SOFCntlData(SOFCntlData),
|
.SOFCntlData(SOFCntlData),
|
.SOFCntlGnt(SOFCntlGnt),
|
.SOFCntlGnt(SOFCntlGnt),
|
.SOFCntlReq(SOFCntlReq),
|
.SOFCntlReq(SOFCntlReq),
|
.SOFCntlWEn(SOFCntlWEn),
|
.SOFCntlWEn(SOFCntlWEn),
|
.clk(clk),
|
.clk(usbClk),
|
.directCntlCntl(directCntlCntl),
|
.directCntlCntl(directCntlCntl),
|
.directCntlData(directCntlData),
|
.directCntlData(directCntlData),
|
.directCntlGnt(directCntlGnt),
|
.directCntlGnt(directCntlGnt),
|
.directCntlReq(directCntlReq),
|
.directCntlReq(directCntlReq),
|
.directCntlWEn(directCntlWEn),
|
.directCntlWEn(directCntlWEn),
|
.rst(rst),
|
.rst(rstSyncToUsbClk),
|
.sendPacketCntl(sendPacketCntl),
|
.sendPacketCntl(sendPacketCntl),
|
.sendPacketData(sendPacketData),
|
.sendPacketData(sendPacketData),
|
.sendPacketGnt(sendPacketGnt),
|
.sendPacketGnt(sendPacketGnt),
|
.sendPacketReq(sendPacketReq),
|
.sendPacketReq(sendPacketReq),
|
.sendPacketWEn(sendPacketWEn) );
|
.sendPacketWEn(sendPacketWEn) );
|
|
|
getPacket u_getPacket
|
getPacket u_getPacket
|
(.RXDataIn(RxData),
|
(.RXDataIn(RxData),
|
.RXDataValid(RxDataValid),
|
.RXDataValid(RxDataValid),
|
.RXFifoData(RxFifoData),
|
.RXFifoData(RxFifoData),
|
.RXFifoFull(RxFifoFull),
|
.RXFifoFull(RxFifoFull),
|
.RXFifoWEn(RxFifoWE),
|
.RXFifoWEn(RxFifoWE),
|
.RXPacketRdy(getPacketRdy),
|
.RXPacketRdy(getPacketRdy),
|
.RXPktStatus(RxPktStatus),
|
.RXPktStatus(RxPktStatus),
|
.RXStreamStatusIn(RxByteStatus),
|
.RXStreamStatusIn(RxByteStatus),
|
.RxPID(RxPID),
|
.RxPID(RxPID),
|
.SIERxTimeOut(SIERxTimeOut),
|
.SIERxTimeOut(SIERxTimeOut),
|
.clk(clk),
|
.clk(usbClk),
|
.getPacketEn(getPacketREn),
|
.getPacketEn(getPacketREn),
|
.rst(rst) );
|
.rst(rstSyncToUsbClk) );
|
|
|
rxStatusMonitor u_rxStatusMonitor
|
rxStatusMonitor u_rxStatusMonitor
|
(.connectStateIn(connectStateIn),
|
(.connectStateIn(connectStateIn),
|
.connectStateOut(connectStateOut),
|
.connectStateOut(connectStateOut),
|
.resumeDetectedIn(resumeDetectedIn),
|
.resumeDetectedIn(resumeDetectedIn),
|
.connectionEventOut(connectionEventFromRxStatusMon),
|
.connectionEventOut(connectionEventFromRxStatusMon),
|
.resumeIntOut(resumeIntFromRxStatusMon),
|
.resumeIntOut(resumeIntFromRxStatusMon),
|
.clk(clk),
|
.clk(usbClk),
|
.rst(rst) );
|
.rst(rstSyncToUsbClk) );
|
|
|
endmodule
|
endmodule
|
|
|
|
|
|
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