-- $Id: pdp11_sequencer.vhd 556 2014-05-29 19:01:39Z mueller $
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-- $Id: pdp11_sequencer.vhd 556 2014-05-29 19:01:39Z mueller $
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--
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--
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-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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-- Software Foundation, either version 2, or at your option any later version.
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--
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--
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-- This program is distributed in the hope that it will be useful, but
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-- This program is distributed in the hope that it will be useful, but
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for complete details.
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-- for complete details.
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--
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--
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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-- Module Name: pdp11_sequencer - syn
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-- Module Name: pdp11_sequencer - syn
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-- Description: pdp11: CPU sequencer
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-- Description: pdp11: CPU sequencer
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--
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--
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-- Dependencies: ib_sel
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-- Dependencies: ib_sel
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-- Test bench: tb/tb_pdp11_core (implicit)
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-- Test bench: tb/tb_pdp11_core (implicit)
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-- Target Devices: generic
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-- Target Devices: generic
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-- Tool versions: xst 8.2-14.7; viv 2014.1; ghdl 0.18-0.29
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-- Tool versions: xst 8.2-14.7; viv 2014.1; ghdl 0.18-0.29
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--
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--
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-- Revision History:
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-- Revision History:
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-- Date Rev Version Comment
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-- Date Rev Version Comment
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-- 2014-04-20 554 1.5 now vivado compatible (add dummy assigns in procs)
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-- 2014-04-20 554 1.5 now vivado compatible (add dummy assigns in procs)
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-- 2011-11-18 427 1.4.2 now numeric_std clean
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-- 2011-11-18 427 1.4.2 now numeric_std clean
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-- 2010-10-23 335 1.4.1 use ib_sel
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-- 2010-10-23 335 1.4.1 use ib_sel
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-- 2010-10-17 333 1.4 use ibus V2 interface
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-- 2010-10-17 333 1.4 use ibus V2 interface
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-- 2010-09-18 300 1.3.2 rename (adlm)box->(oalm)unit
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-- 2010-09-18 300 1.3.2 rename (adlm)box->(oalm)unit
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-- 2010-06-20 307 1.3.1 rename cpacc to cacc in vm_cntl_type
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-- 2010-06-20 307 1.3.1 rename cpacc to cacc in vm_cntl_type
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-- 2010-06-13 305 1.3 remove CPDIN_WE, CPDOUT_WE out ports; set
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-- 2010-06-13 305 1.3 remove CPDIN_WE, CPDOUT_WE out ports; set
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-- CNTL.cpdout_we instead of CPDOUT_WE
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-- CNTL.cpdout_we instead of CPDOUT_WE
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-- 2010-06-12 304 1.2.8 signal cpuwait when spinning in s_op_wait
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-- 2010-06-12 304 1.2.8 signal cpuwait when spinning in s_op_wait
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-- 2009-05-30 220 1.2.7 final removal of snoopers (were already commented)
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-- 2009-05-30 220 1.2.7 final removal of snoopers (were already commented)
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-- 2009-05-09 213 1.2.6 BUGFIX: use is_dstkstack1246, stklim for mode=6
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-- 2009-05-09 213 1.2.6 BUGFIX: use is_dstkstack1246, stklim for mode=6
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-- 2009-05-02 211 1.2.5 BUGFIX: 11/70 spl semantics again in kernel mode
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-- 2009-05-02 211 1.2.5 BUGFIX: 11/70 spl semantics again in kernel mode
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-- 2009-04-26 209 1.2.4 BUGFIX: give interrupts priority over trap handling
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-- 2009-04-26 209 1.2.4 BUGFIX: give interrupts priority over trap handling
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-- 2008-12-14 177 1.2.3 BUGFIX: use is_dstkstack124, fix stklim check bug
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-- 2008-12-14 177 1.2.3 BUGFIX: use is_dstkstack124, fix stklim check bug
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-- 2008-12-13 176 1.2.2 BUGFIX: use is_pci in s_dstw_inc if DSTDEF='1'
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-- 2008-12-13 176 1.2.2 BUGFIX: use is_pci in s_dstw_inc if DSTDEF='1'
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-- 2008-11-30 174 1.2.1 BUGFIX: add updt_dstadsrc; prevent stale DSRC
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-- 2008-11-30 174 1.2.1 BUGFIX: add updt_dstadsrc; prevent stale DSRC
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-- 2008-08-22 161 1.2 rename ubf_ -> ibf_; use iblib
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-- 2008-08-22 161 1.2 rename ubf_ -> ibf_; use iblib
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-- 2008-05-03 143 1.1.9 rename _cpursta->_cpurust; cp reset sets now
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-- 2008-05-03 143 1.1.9 rename _cpursta->_cpurust; cp reset sets now
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-- c_cpurust_reset; proper c_cpurust_vfail handling
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-- c_cpurust_reset; proper c_cpurust_vfail handling
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-- 2008-04-27 140 1.1.8 BUGFIX: halt cpu in case of a vector fetch error
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-- 2008-04-27 140 1.1.8 BUGFIX: halt cpu in case of a vector fetch error
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-- use cpursta to encode why cpu halts, remove cpufail
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-- use cpursta to encode why cpu halts, remove cpufail
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-- 2008-04-27 139 1.1.7 BUGFIX: correct bytop handling for address fetches;
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-- 2008-04-27 139 1.1.7 BUGFIX: correct bytop handling for address fetches;
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-- BUGFIX: redo mtp flow; add fork_dsta fork and ddst
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-- BUGFIX: redo mtp flow; add fork_dsta fork and ddst
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-- reload in s_opa_mtp_pop_w;
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-- reload in s_opa_mtp_pop_w;
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-- 2008-04-19 137 1.1.6 BUGFIX: fix loop state in s_rti_getpc_w
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-- 2008-04-19 137 1.1.6 BUGFIX: fix loop state in s_rti_getpc_w
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-- 2008-03-30 131 1.1.5 BUGFIX: inc/dec by 2 for byte mode -(sp),(sp)+
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-- 2008-03-30 131 1.1.5 BUGFIX: inc/dec by 2 for byte mode -(sp),(sp)+
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-- inc/dec by 2 for @(R)+ and @-(R) also for bytop's
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-- inc/dec by 2 for @(R)+ and @-(R) also for bytop's
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-- 2008-03-02 121 1.1.4 remove snoopers; add waitsusp, redo WAIT handling
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-- 2008-03-02 121 1.1.4 remove snoopers; add waitsusp, redo WAIT handling
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-- 2008-02-24 119 1.1.3 add lah,rps,wps command; revamp cp memory access
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-- 2008-02-24 119 1.1.3 add lah,rps,wps command; revamp cp memory access
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-- change WAIT logic, now also bails out on cp command
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-- change WAIT logic, now also bails out on cp command
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-- 2008-01-20 112 1.1.2 rename PRESET->BRESET
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-- 2008-01-20 112 1.1.2 rename PRESET->BRESET
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-- 2008-01-05 110 1.1.1 rename IB_MREQ(ena->req) SRES(sel->ack, hold->busy)
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-- 2008-01-05 110 1.1.1 rename IB_MREQ(ena->req) SRES(sel->ack, hold->busy)
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-- 2007-12-30 107 1.1 use IB_MREQ/IB_SRES interface now
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-- 2007-12-30 107 1.1 use IB_MREQ/IB_SRES interface now
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-- 2007-06-14 56 1.0.1 Use slvtypes.all
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-- 2007-06-14 56 1.0.1 Use slvtypes.all
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-- 2007-05-12 26 1.0 Initial version
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-- 2007-05-12 26 1.0 Initial version
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use ieee.numeric_std.all;
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use work.slvtypes.all;
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use work.slvtypes.all;
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use work.iblib.all;
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use work.iblib.all;
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use work.pdp11.all;
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use work.pdp11.all;
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-- ----------------------------------------------------------------------------
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-- ----------------------------------------------------------------------------
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entity pdp11_sequencer is -- CPU sequencer
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entity pdp11_sequencer is -- CPU sequencer
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port (
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port (
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CLK : in slbit; -- clock
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CLK : in slbit; -- clock
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GRESET : in slbit; -- global reset
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GRESET : in slbit; -- global reset
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PSW : in psw_type; -- processor status
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PSW : in psw_type; -- processor status
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PC : in slv16; -- program counter
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PC : in slv16; -- program counter
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IREG : in slv16; -- IREG
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IREG : in slv16; -- IREG
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ID_STAT : in decode_stat_type; -- instr. decoder status
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ID_STAT : in decode_stat_type; -- instr. decoder status
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DP_STAT : in dpath_stat_type; -- data path status
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DP_STAT : in dpath_stat_type; -- data path status
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CP_CNTL : in cp_cntl_type; -- console port control
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CP_CNTL : in cp_cntl_type; -- console port control
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VM_STAT : in vm_stat_type; -- virtual memory status port
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VM_STAT : in vm_stat_type; -- virtual memory status port
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INT_PRI : in slv3; -- interrupt priority
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INT_PRI : in slv3; -- interrupt priority
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INT_VECT : in slv9_2; -- interrupt vector
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INT_VECT : in slv9_2; -- interrupt vector
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CRESET : out slbit; -- console reset
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CRESET : out slbit; -- console reset
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BRESET : out slbit; -- ibus reset
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BRESET : out slbit; -- ibus reset
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MMU_MONI : out mmu_moni_type; -- mmu monitor port
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MMU_MONI : out mmu_moni_type; -- mmu monitor port
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DP_CNTL : out dpath_cntl_type; -- data path control
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DP_CNTL : out dpath_cntl_type; -- data path control
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VM_CNTL : out vm_cntl_type; -- virtual memory control port
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VM_CNTL : out vm_cntl_type; -- virtual memory control port
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CP_STAT : out cp_stat_type; -- console port status
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CP_STAT : out cp_stat_type; -- console port status
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INT_ACK : out slbit; -- interrupt acknowledge
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INT_ACK : out slbit; -- interrupt acknowledge
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_SRES : out ib_sres_type -- ibus response
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IB_SRES : out ib_sres_type -- ibus response
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);
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);
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end pdp11_sequencer;
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end pdp11_sequencer;
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architecture syn of pdp11_sequencer is
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architecture syn of pdp11_sequencer is
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constant ibaddr_cpuerr : slv16 := slv(to_unsigned(8#177766#,16));
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constant ibaddr_cpuerr : slv16 := slv(to_unsigned(8#177766#,16));
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constant cpuerr_ibf_illhlt : integer := 7;
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constant cpuerr_ibf_illhlt : integer := 7;
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constant cpuerr_ibf_adderr : integer := 6;
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constant cpuerr_ibf_adderr : integer := 6;
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constant cpuerr_ibf_nxm : integer := 5;
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constant cpuerr_ibf_nxm : integer := 5;
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constant cpuerr_ibf_iobto : integer := 4;
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constant cpuerr_ibf_iobto : integer := 4;
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constant cpuerr_ibf_ysv : integer := 3;
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constant cpuerr_ibf_ysv : integer := 3;
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constant cpuerr_ibf_rsv : integer := 2;
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constant cpuerr_ibf_rsv : integer := 2;
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type state_type is (
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type state_type is (
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s_idle,
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s_idle,
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s_cp_regread,
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s_cp_regread,
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s_cp_rps,
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s_cp_rps,
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s_cp_memr_w,
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s_cp_memr_w,
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s_cp_memw_w,
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s_cp_memw_w,
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s_ifetch,
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s_ifetch,
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s_ifetch_w,
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s_ifetch_w,
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s_idecode,
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s_idecode,
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s_srcr_def,
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s_srcr_def,
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s_srcr_def_w,
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s_srcr_def_w,
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s_srcr_inc,
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s_srcr_inc,
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s_srcr_inc_w,
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s_srcr_inc_w,
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s_srcr_dec,
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s_srcr_dec,
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s_srcr_dec1,
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s_srcr_dec1,
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s_srcr_ind,
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s_srcr_ind,
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s_srcr_ind1_w,
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s_srcr_ind1_w,
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s_srcr_ind2,
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s_srcr_ind2,
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s_srcr_ind2_w,
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s_srcr_ind2_w,
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s_dstr_def,
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s_dstr_def,
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s_dstr_def_w,
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s_dstr_def_w,
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s_dstr_inc,
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s_dstr_inc,
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s_dstr_inc_w,
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s_dstr_inc_w,
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s_dstr_dec,
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s_dstr_dec,
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s_dstr_dec1,
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s_dstr_dec1,
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s_dstr_ind,
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s_dstr_ind,
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s_dstr_ind1_w,
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s_dstr_ind1_w,
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s_dstr_ind2,
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s_dstr_ind2,
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s_dstr_ind2_w,
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s_dstr_ind2_w,
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s_dstw_def,
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s_dstw_def,
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s_dstw_def_w,
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s_dstw_def_w,
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s_dstw_inc,
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s_dstw_inc,
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s_dstw_inc_w,
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s_dstw_inc_w,
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s_dstw_incdef_w,
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s_dstw_incdef_w,
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s_dstw_dec,
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s_dstw_dec,
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s_dstw_dec1,
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s_dstw_dec1,
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s_dstw_ind,
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s_dstw_ind,
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s_dstw_ind_w,
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s_dstw_ind_w,
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s_dstw_def246,
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s_dstw_def246,
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s_dsta_inc,
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s_dsta_inc,
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s_dsta_incdef_w,
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s_dsta_incdef_w,
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s_dsta_dec,
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s_dsta_dec,
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s_dsta_dec1,
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s_dsta_dec1,
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s_dsta_ind,
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s_dsta_ind,
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s_dsta_ind_w,
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s_dsta_ind_w,
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s_op_halt,
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s_op_halt,
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s_op_wait,
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s_op_wait,
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s_op_trap,
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s_op_trap,
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s_op_reset,
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s_op_reset,
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s_op_rts,
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s_op_rts,
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s_op_rts_pop,
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s_op_rts_pop,
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s_op_rts_pop_w,
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s_op_rts_pop_w,
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s_op_spl,
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s_op_spl,
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s_op_mcc,
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s_op_mcc,
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s_op_br,
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s_op_br,
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s_op_mark,
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s_op_mark,
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s_op_mark1,
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s_op_mark1,
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s_op_mark_pop,
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s_op_mark_pop,
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s_op_mark_pop_w,
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s_op_mark_pop_w,
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s_op_sob,
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s_op_sob,
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s_op_sob1,
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s_op_sob1,
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s_opg_gen,
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s_opg_gen,
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s_opg_gen_rmw_w,
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s_opg_gen_rmw_w,
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s_opg_mul,
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s_opg_mul,
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s_opg_mul1,
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s_opg_mul1,
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s_opg_div,
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s_opg_div,
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s_opg_div_cn,
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s_opg_div_cn,
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s_opg_div_cr,
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s_opg_div_cr,
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s_opg_div_sq,
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s_opg_div_sq,
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s_opg_div_sr,
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s_opg_div_sr,
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s_opg_div_zero,
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s_opg_div_zero,
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s_opg_ash,
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s_opg_ash,
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s_opg_ash_cn,
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s_opg_ash_cn,
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s_opg_ashc,
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s_opg_ashc,
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s_opg_ashc_cn,
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s_opg_ashc_cn,
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s_opg_ashc_wl,
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s_opg_ashc_wl,
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s_opa_jsr,
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s_opa_jsr,
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s_opa_jsr1,
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s_opa_jsr1,
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s_opa_jsr_push,
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s_opa_jsr_push,
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s_opa_jsr_push_w,
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s_opa_jsr_push_w,
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s_opa_jsr2,
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s_opa_jsr2,
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s_opa_jmp,
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s_opa_jmp,
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s_opa_mtp,
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s_opa_mtp,
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s_opa_mtp_pop_w,
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s_opa_mtp_pop_w,
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s_opa_mtp_reg,
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s_opa_mtp_reg,
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s_opa_mtp_mem,
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s_opa_mtp_mem,
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s_opa_mtp_mem_w,
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s_opa_mtp_mem_w,
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s_opa_mfp_reg,
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s_opa_mfp_reg,
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s_opa_mfp_mem,
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s_opa_mfp_mem,
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s_opa_mfp_mem_w,
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s_opa_mfp_mem_w,
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s_opa_mfp_dec,
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s_opa_mfp_dec,
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s_opa_mfp_push,
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s_opa_mfp_push,
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s_opa_mfp_push_w,
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s_opa_mfp_push_w,
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s_trap_4,
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s_trap_4,
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s_trap_10,
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s_trap_10,
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s_trap_disp,
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s_trap_disp,
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s_int_ext,
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s_int_ext,
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s_int_getpc,
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s_int_getpc,
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s_int_getpc_w,
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s_int_getpc_w,
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s_int_getps,
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s_int_getps,
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s_int_getps_w,
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s_int_getps_w,
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s_int_getsp,
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s_int_getsp,
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s_int_decsp,
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s_int_decsp,
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s_int_pushps,
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s_int_pushps,
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s_int_pushps_w,
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s_int_pushps_w,
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s_int_pushpc,
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s_int_pushpc,
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s_int_pushpc_w,
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s_int_pushpc_w,
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s_rti_getpc,
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s_rti_getpc,
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s_rti_getpc_w,
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s_rti_getpc_w,
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s_rti_getps,
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s_rti_getps,
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s_rti_getps_w,
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s_rti_getps_w,
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s_rti_newpc,
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s_rti_newpc,
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|
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s_vmerr,
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s_vmerr,
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s_cpufail
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s_cpufail
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);
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);
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signal R_STATE : state_type := s_idle; -- state register
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signal R_STATE : state_type := s_idle; -- state register
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signal N_STATE : state_type := s_idle;
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signal N_STATE : state_type := s_idle;
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|
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signal R_STATUS : cpustat_type := cpustat_init;
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signal R_STATUS : cpustat_type := cpustat_init;
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signal N_STATUS : cpustat_type := cpustat_init;
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signal N_STATUS : cpustat_type := cpustat_init;
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signal R_CPUERR : cpuerr_type := cpuerr_init;
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signal R_CPUERR : cpuerr_type := cpuerr_init;
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signal N_CPUERR : cpuerr_type := cpuerr_init;
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signal N_CPUERR : cpuerr_type := cpuerr_init;
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signal R_IDSTAT : decode_stat_type := decode_stat_init;
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signal R_IDSTAT : decode_stat_type := decode_stat_init;
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signal N_IDSTAT : decode_stat_type := decode_stat_init;
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signal N_IDSTAT : decode_stat_type := decode_stat_init;
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signal R_VMSTAT : vm_stat_type := vm_stat_init;
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signal R_VMSTAT : vm_stat_type := vm_stat_init;
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signal IBSEL_CPUERR : slbit := '0';
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signal IBSEL_CPUERR : slbit := '0';
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begin
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begin
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SEL : ib_sel
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SEL : ib_sel
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generic map (
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generic map (
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IB_ADDR => ibaddr_cpuerr)
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IB_ADDR => ibaddr_cpuerr)
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port map (
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port map (
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CLK => CLK,
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CLK => CLK,
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IB_MREQ => IB_MREQ,
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IB_MREQ => IB_MREQ,
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SEL => IBSEL_CPUERR
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SEL => IBSEL_CPUERR
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);
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);
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proc_ibres : process (IBSEL_CPUERR, IB_MREQ, R_CPUERR)
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proc_ibres : process (IBSEL_CPUERR, IB_MREQ, R_CPUERR)
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variable idout : slv16 := (others=>'0');
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variable idout : slv16 := (others=>'0');
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begin
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begin
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idout := (others=>'0');
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idout := (others=>'0');
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if IBSEL_CPUERR = '1' then
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if IBSEL_CPUERR = '1' then
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idout(cpuerr_ibf_illhlt) := R_CPUERR.illhlt;
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idout(cpuerr_ibf_illhlt) := R_CPUERR.illhlt;
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idout(cpuerr_ibf_adderr) := R_CPUERR.adderr;
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idout(cpuerr_ibf_adderr) := R_CPUERR.adderr;
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idout(cpuerr_ibf_nxm) := R_CPUERR.nxm;
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idout(cpuerr_ibf_nxm) := R_CPUERR.nxm;
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idout(cpuerr_ibf_iobto) := R_CPUERR.iobto;
|
idout(cpuerr_ibf_iobto) := R_CPUERR.iobto;
|
idout(cpuerr_ibf_ysv) := R_CPUERR.ysv;
|
idout(cpuerr_ibf_ysv) := R_CPUERR.ysv;
|
idout(cpuerr_ibf_rsv) := R_CPUERR.rsv;
|
idout(cpuerr_ibf_rsv) := R_CPUERR.rsv;
|
end if;
|
end if;
|
IB_SRES.dout <= idout;
|
IB_SRES.dout <= idout;
|
IB_SRES.ack <= IBSEL_CPUERR and (IB_MREQ.re or IB_MREQ.we); -- ack all
|
IB_SRES.ack <= IBSEL_CPUERR and (IB_MREQ.re or IB_MREQ.we); -- ack all
|
IB_SRES.busy <= '0';
|
IB_SRES.busy <= '0';
|
end process proc_ibres;
|
end process proc_ibres;
|
|
|
proc_status: process (CLK)
|
proc_status: process (CLK)
|
begin
|
begin
|
if rising_edge(CLK) then
|
if rising_edge(CLK) then
|
if GRESET = '1' then
|
if GRESET = '1' then
|
R_STATUS <= cpustat_init;
|
R_STATUS <= cpustat_init;
|
R_CPUERR <= cpuerr_init;
|
R_CPUERR <= cpuerr_init;
|
R_IDSTAT <= decode_stat_init;
|
R_IDSTAT <= decode_stat_init;
|
R_VMSTAT <= vm_stat_init;
|
R_VMSTAT <= vm_stat_init;
|
else
|
else
|
R_STATUS <= N_STATUS;
|
R_STATUS <= N_STATUS;
|
R_CPUERR <= N_CPUERR;
|
R_CPUERR <= N_CPUERR;
|
R_IDSTAT <= N_IDSTAT;
|
R_IDSTAT <= N_IDSTAT;
|
R_VMSTAT <= VM_STAT;
|
R_VMSTAT <= VM_STAT;
|
end if;
|
end if;
|
end if;
|
end if;
|
end process proc_status;
|
end process proc_status;
|
|
|
proc_state: process (CLK)
|
proc_state: process (CLK)
|
begin
|
begin
|
if rising_edge(CLK) then
|
if rising_edge(CLK) then
|
if GRESET = '1' then
|
if GRESET = '1' then
|
R_STATE <= s_idle;
|
R_STATE <= s_idle;
|
else
|
else
|
R_STATE <= N_STATE;
|
R_STATE <= N_STATE;
|
end if;
|
end if;
|
end if;
|
end if;
|
end process proc_state;
|
end process proc_state;
|
|
|
proc_next: process (R_STATE, R_STATUS, PSW, PC, CP_CNTL,
|
proc_next: process (R_STATE, R_STATUS, PSW, PC, CP_CNTL,
|
ID_STAT, R_IDSTAT, IREG, VM_STAT, DP_STAT,
|
ID_STAT, R_IDSTAT, IREG, VM_STAT, DP_STAT,
|
R_CPUERR, R_VMSTAT, IB_MREQ, IBSEL_CPUERR,
|
R_CPUERR, R_VMSTAT, IB_MREQ, IBSEL_CPUERR,
|
INT_PRI, INT_VECT)
|
INT_PRI, INT_VECT)
|
|
|
variable nstate : state_type;
|
variable nstate : state_type;
|
variable nstatus : cpustat_type := cpustat_init;
|
variable nstatus : cpustat_type := cpustat_init;
|
variable ncpuerr : cpuerr_type := cpuerr_init;
|
variable ncpuerr : cpuerr_type := cpuerr_init;
|
|
|
variable ncreset : slbit := '0';
|
variable ncreset : slbit := '0';
|
variable nbreset : slbit := '0';
|
variable nbreset : slbit := '0';
|
variable nintack : slbit := '0';
|
variable nintack : slbit := '0';
|
|
|
variable ndpcntl : dpath_cntl_type := dpath_cntl_init;
|
variable ndpcntl : dpath_cntl_type := dpath_cntl_init;
|
variable nvmcntl : vm_cntl_type := vm_cntl_init;
|
variable nvmcntl : vm_cntl_type := vm_cntl_init;
|
variable nidstat : decode_stat_type := decode_stat_init;
|
variable nidstat : decode_stat_type := decode_stat_init;
|
variable nmmumoni : mmu_moni_type := mmu_moni_init;
|
variable nmmumoni : mmu_moni_type := mmu_moni_init;
|
|
|
variable imemok : boolean;
|
variable imemok : boolean;
|
variable bytop : slbit := '0'; -- local bytop access flag
|
variable bytop : slbit := '0'; -- local bytop access flag
|
variable macc : slbit := '0'; -- local modify access flag
|
variable macc : slbit := '0'; -- local modify access flag
|
|
|
variable lvector : slv9_2 := (others=>'0'); -- local trap/interrupt vector
|
variable lvector : slv9_2 := (others=>'0'); -- local trap/interrupt vector
|
|
|
variable brcode : slv4 := (others=>'0'); -- reduced br opcode (15,10-8)
|
variable brcode : slv4 := (others=>'0'); -- reduced br opcode (15,10-8)
|
variable brcond : slbit := '0'; -- br condition value
|
variable brcond : slbit := '0'; -- br condition value
|
|
|
variable is_kmode : slbit := '0'; -- cmode is kernel mode
|
variable is_kmode : slbit := '0'; -- cmode is kernel mode
|
variable is_dstkstack1246 : slbit := '0'; -- dest is k-stack & mode= 1,2,4,6
|
variable is_dstkstack1246 : slbit := '0'; -- dest is k-stack & mode= 1,2,4,6
|
|
|
variable int_pending : slbit := '0'; -- an interrupt is pending
|
variable int_pending : slbit := '0'; -- an interrupt is pending
|
|
|
alias SRCMOD : slv2 is IREG(11 downto 10); -- src register mode high
|
alias SRCMOD : slv2 is IREG(11 downto 10); -- src register mode high
|
alias SRCDEF : slbit is IREG(9); -- src register mode defered
|
alias SRCDEF : slbit is IREG(9); -- src register mode defered
|
alias SRCREG : slv3 is IREG(8 downto 6); -- src register number
|
alias SRCREG : slv3 is IREG(8 downto 6); -- src register number
|
alias DSTMODF : slv3 is IREG(5 downto 3); -- dst register full mode
|
alias DSTMODF : slv3 is IREG(5 downto 3); -- dst register full mode
|
alias DSTMOD : slv2 is IREG(5 downto 4); -- dst register mode high
|
alias DSTMOD : slv2 is IREG(5 downto 4); -- dst register mode high
|
alias DSTDEF : slbit is IREG(3); -- dst register mode defered
|
alias DSTDEF : slbit is IREG(3); -- dst register mode defered
|
alias DSTREG : slv3 is IREG(2 downto 0); -- dst register number
|
alias DSTREG : slv3 is IREG(2 downto 0); -- dst register number
|
|
|
procedure do_memread_i(nstate : inout state_type;
|
procedure do_memread_i(nstate : inout state_type;
|
ndpcntl : inout dpath_cntl_type;
|
ndpcntl : inout dpath_cntl_type;
|
nvmcntl : inout vm_cntl_type;
|
nvmcntl : inout vm_cntl_type;
|
wstate : in state_type) is
|
wstate : in state_type) is
|
begin
|
begin
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
nvmcntl.dspace := '0';
|
nvmcntl.dspace := '0';
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
ndpcntl.gpr_pcinc := '1'; -- (pc)++
|
ndpcntl.gpr_pcinc := '1'; -- (pc)++
|
nstate := wstate;
|
nstate := wstate;
|
end procedure do_memread_i;
|
end procedure do_memread_i;
|
|
|
procedure do_memread_d(nstate : inout state_type;
|
procedure do_memread_d(nstate : inout state_type;
|
nvmcntl : inout vm_cntl_type;
|
nvmcntl : inout vm_cntl_type;
|
wstate : in state_type;
|
wstate : in state_type;
|
bytop : in slbit := '0';
|
bytop : in slbit := '0';
|
macc : in slbit := '0';
|
macc : in slbit := '0';
|
is_pci : in slbit := '0') is
|
is_pci : in slbit := '0') is
|
begin
|
begin
|
nvmcntl.dspace := not is_pci; -- ispace if pc immediate modes
|
nvmcntl.dspace := not is_pci; -- ispace if pc immediate modes
|
-- bytop := R_IDSTAT.is_bytop and not is_addr;
|
-- bytop := R_IDSTAT.is_bytop and not is_addr;
|
nvmcntl.bytop := bytop;
|
nvmcntl.bytop := bytop;
|
nvmcntl.macc := macc;
|
nvmcntl.macc := macc;
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
nstate := wstate;
|
nstate := wstate;
|
end procedure do_memread_d;
|
end procedure do_memread_d;
|
|
|
procedure do_memread_srcinc(nstate : inout state_type;
|
procedure do_memread_srcinc(nstate : inout state_type;
|
ndpcntl : inout dpath_cntl_type;
|
ndpcntl : inout dpath_cntl_type;
|
nvmcntl : inout vm_cntl_type;
|
nvmcntl : inout vm_cntl_type;
|
wstate : in state_type;
|
wstate : in state_type;
|
nmmumoni : inout mmu_moni_type;
|
nmmumoni : inout mmu_moni_type;
|
updt_sp : in slbit := '0') is
|
updt_sp : in slbit := '0') is
|
begin
|
begin
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_const := "000000010"; -- OUNIT const=2
|
ndpcntl.ounit_const := "000000010"; -- OUNIT const=2
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
if updt_sp = '1' then
|
if updt_sp = '1' then
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '0';
|
nmmumoni.isdec := '0';
|
ndpcntl.gpr_adst := c_gpr_sp; -- update SP too
|
ndpcntl.gpr_adst := c_gpr_sp; -- update SP too
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
end if;
|
end if;
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
nvmcntl.dspace := '1';
|
nvmcntl.dspace := '1';
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
nstate := wstate;
|
nstate := wstate;
|
end procedure do_memread_srcinc;
|
end procedure do_memread_srcinc;
|
|
|
procedure do_memwrite(nstate : inout state_type;
|
procedure do_memwrite(nstate : inout state_type;
|
nvmcntl : inout vm_cntl_type;
|
nvmcntl : inout vm_cntl_type;
|
wstate : in state_type;
|
wstate : in state_type;
|
macc : in slbit :='0') is
|
macc : in slbit :='0') is
|
begin
|
begin
|
nvmcntl.dspace := '1';
|
nvmcntl.dspace := '1';
|
nvmcntl.bytop := R_IDSTAT.is_bytop;
|
nvmcntl.bytop := R_IDSTAT.is_bytop;
|
nvmcntl.wacc := '1';
|
nvmcntl.wacc := '1';
|
nvmcntl.macc := macc;
|
nvmcntl.macc := macc;
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
nstate := wstate;
|
nstate := wstate;
|
end procedure do_memwrite;
|
end procedure do_memwrite;
|
|
|
procedure do_memcheck(nstate : inout state_type;
|
procedure do_memcheck(nstate : inout state_type;
|
nstatus : inout cpustat_type;
|
nstatus : inout cpustat_type;
|
mok : out boolean) is
|
mok : out boolean) is
|
begin
|
begin
|
nstate := nstate; -- dummy to add driver (vivado)
|
nstate := nstate; -- dummy to add driver (vivado)
|
nstatus := nstatus; -- "
|
nstatus := nstatus; -- "
|
mok := false;
|
mok := false;
|
if VM_STAT.ack = '1' then
|
if VM_STAT.ack = '1' then
|
mok := true;
|
mok := true;
|
nstatus.trap_mmu := VM_STAT.trap_mmu;
|
nstatus.trap_mmu := VM_STAT.trap_mmu;
|
if R_CPUERR.ysv = '0' then -- ysv trap when cpuerr not yet set
|
if R_CPUERR.ysv = '0' then -- ysv trap when cpuerr not yet set
|
nstatus.trap_ysv := VM_STAT.trap_ysv;
|
nstatus.trap_ysv := VM_STAT.trap_ysv;
|
end if;
|
end if;
|
elsif VM_STAT.err='1' or VM_STAT.fail='1' then
|
elsif VM_STAT.err='1' or VM_STAT.fail='1' then
|
nstate := s_vmerr;
|
nstate := s_vmerr;
|
end if;
|
end if;
|
end procedure do_memcheck;
|
end procedure do_memcheck;
|
|
|
procedure do_const_opsize(ndpcntl : inout dpath_cntl_type;
|
procedure do_const_opsize(ndpcntl : inout dpath_cntl_type;
|
bytop : in slbit;
|
bytop : in slbit;
|
isdef : in slbit;
|
isdef : in slbit;
|
regnum : in slv3) is
|
regnum : in slv3) is
|
begin
|
begin
|
ndpcntl := ndpcntl; -- dummy to add driver (vivado)
|
ndpcntl := ndpcntl; -- dummy to add driver (vivado)
|
if bytop='0' or isdef='1' or
|
if bytop='0' or isdef='1' or
|
regnum=c_gpr_pc or regnum=c_gpr_sp then
|
regnum=c_gpr_pc or regnum=c_gpr_sp then
|
ndpcntl.ounit_const := "000000010";
|
ndpcntl.ounit_const := "000000010";
|
else
|
else
|
ndpcntl.ounit_const := "000000001";
|
ndpcntl.ounit_const := "000000001";
|
end if;
|
end if;
|
end procedure do_const_opsize;
|
end procedure do_const_opsize;
|
|
|
procedure do_fork_dstr(nstate : inout state_type;
|
procedure do_fork_dstr(nstate : inout state_type;
|
idstat : in decode_stat_type) is
|
idstat : in decode_stat_type) is
|
begin
|
begin
|
case idstat.fork_dstr is
|
case idstat.fork_dstr is
|
when c_fork_dstr_def => nstate := s_dstr_def;
|
when c_fork_dstr_def => nstate := s_dstr_def;
|
when c_fork_dstr_inc => nstate := s_dstr_inc;
|
when c_fork_dstr_inc => nstate := s_dstr_inc;
|
when c_fork_dstr_dec => nstate := s_dstr_dec;
|
when c_fork_dstr_dec => nstate := s_dstr_dec;
|
when c_fork_dstr_ind => nstate := s_dstr_ind;
|
when c_fork_dstr_ind => nstate := s_dstr_ind;
|
when others => nstate := s_cpufail;
|
when others => nstate := s_cpufail;
|
end case;
|
end case;
|
end procedure do_fork_dstr;
|
end procedure do_fork_dstr;
|
|
|
procedure do_fork_opg(nstate : inout state_type;
|
procedure do_fork_opg(nstate : inout state_type;
|
idstat : in decode_stat_type) is
|
idstat : in decode_stat_type) is
|
begin
|
begin
|
case idstat.fork_opg is
|
case idstat.fork_opg is
|
when c_fork_opg_gen => nstate := s_opg_gen;
|
when c_fork_opg_gen => nstate := s_opg_gen;
|
when c_fork_opg_wdef => nstate := s_dstw_def;
|
when c_fork_opg_wdef => nstate := s_dstw_def;
|
when c_fork_opg_winc => nstate := s_dstw_inc;
|
when c_fork_opg_winc => nstate := s_dstw_inc;
|
when c_fork_opg_wdec => nstate := s_dstw_dec;
|
when c_fork_opg_wdec => nstate := s_dstw_dec;
|
when c_fork_opg_wind => nstate := s_dstw_ind;
|
when c_fork_opg_wind => nstate := s_dstw_ind;
|
when c_fork_opg_mul => nstate := s_opg_mul;
|
when c_fork_opg_mul => nstate := s_opg_mul;
|
when c_fork_opg_div => nstate := s_opg_div;
|
when c_fork_opg_div => nstate := s_opg_div;
|
when c_fork_opg_ash => nstate := s_opg_ash;
|
when c_fork_opg_ash => nstate := s_opg_ash;
|
when c_fork_opg_ashc => nstate := s_opg_ashc;
|
when c_fork_opg_ashc => nstate := s_opg_ashc;
|
when others => nstate := s_cpufail;
|
when others => nstate := s_cpufail;
|
end case;
|
end case;
|
end procedure do_fork_opg;
|
end procedure do_fork_opg;
|
|
|
procedure do_fork_opa(nstate : inout state_type;
|
procedure do_fork_opa(nstate : inout state_type;
|
idstat : in decode_stat_type) is
|
idstat : in decode_stat_type) is
|
begin
|
begin
|
case idstat.fork_opa is
|
case idstat.fork_opa is
|
when c_fork_opa_jmp => nstate := s_opa_jmp;
|
when c_fork_opa_jmp => nstate := s_opa_jmp;
|
when c_fork_opa_jsr => nstate := s_opa_jsr;
|
when c_fork_opa_jsr => nstate := s_opa_jsr;
|
when c_fork_opa_mtp => nstate := s_opa_mtp_mem;
|
when c_fork_opa_mtp => nstate := s_opa_mtp_mem;
|
when c_fork_opa_mfp_reg => nstate := s_opa_mfp_reg;
|
when c_fork_opa_mfp_reg => nstate := s_opa_mfp_reg;
|
when c_fork_opa_mfp_mem => nstate := s_opa_mfp_mem;
|
when c_fork_opa_mfp_mem => nstate := s_opa_mfp_mem;
|
when others => nstate := s_cpufail;
|
when others => nstate := s_cpufail;
|
end case;
|
end case;
|
end procedure do_fork_opa;
|
end procedure do_fork_opa;
|
|
|
procedure do_fork_next(nstate : inout state_type;
|
procedure do_fork_next(nstate : inout state_type;
|
nstatus : inout cpustat_type;
|
nstatus : inout cpustat_type;
|
nmmumoni : inout mmu_moni_type) is
|
nmmumoni : inout mmu_moni_type) is
|
begin
|
begin
|
nmmumoni.idone := '1';
|
nmmumoni.idone := '1';
|
if unsigned(INT_PRI) > unsigned(PSW.pri) then
|
if unsigned(INT_PRI) > unsigned(PSW.pri) then
|
nstate := s_idle;
|
nstate := s_idle;
|
elsif R_STATUS.trap_mmu='1' or nstatus.trap_mmu='1' or
|
elsif R_STATUS.trap_mmu='1' or nstatus.trap_mmu='1' or
|
R_STATUS.trap_ysv='1' or nstatus.trap_ysv='1' or
|
R_STATUS.trap_ysv='1' or nstatus.trap_ysv='1' or
|
PSW.tflag='1' then
|
PSW.tflag='1' then
|
nstate := s_trap_disp;
|
nstate := s_trap_disp;
|
elsif R_STATUS.cpugo='1' and not R_STATUS.cmdbusy='1' then
|
elsif R_STATUS.cpugo='1' and not R_STATUS.cmdbusy='1' then
|
nstate := s_ifetch;
|
nstate := s_ifetch;
|
else
|
else
|
nstate := s_idle;
|
nstate := s_idle;
|
end if;
|
end if;
|
end procedure do_fork_next;
|
end procedure do_fork_next;
|
|
|
procedure do_fork_next_pref(nstate : inout state_type;
|
procedure do_fork_next_pref(nstate : inout state_type;
|
nstatus : inout cpustat_type;
|
nstatus : inout cpustat_type;
|
ndpcntl : inout dpath_cntl_type;
|
ndpcntl : inout dpath_cntl_type;
|
nvmcntl : inout vm_cntl_type;
|
nvmcntl : inout vm_cntl_type;
|
nmmumoni : inout mmu_moni_type) is
|
nmmumoni : inout mmu_moni_type) is
|
begin
|
begin
|
ndpcntl := ndpcntl; -- dummy to add driver (vivado)
|
ndpcntl := ndpcntl; -- dummy to add driver (vivado)
|
nvmcntl := nvmcntl; -- "
|
nvmcntl := nvmcntl; -- "
|
nmmumoni.idone := '1';
|
nmmumoni.idone := '1';
|
if unsigned(INT_PRI) > unsigned(PSW.pri) then
|
if unsigned(INT_PRI) > unsigned(PSW.pri) then
|
nstate := s_idle;
|
nstate := s_idle;
|
elsif R_STATUS.trap_mmu='1' or nstatus.trap_mmu='1' or
|
elsif R_STATUS.trap_mmu='1' or nstatus.trap_mmu='1' or
|
R_STATUS.trap_ysv='1' or nstatus.trap_ysv='1' or
|
R_STATUS.trap_ysv='1' or nstatus.trap_ysv='1' or
|
PSW.tflag='1' then
|
PSW.tflag='1' then
|
nstate := s_trap_disp;
|
nstate := s_trap_disp;
|
elsif R_STATUS.cpugo='1' and not R_STATUS.cmdbusy='1' then
|
elsif R_STATUS.cpugo='1' and not R_STATUS.cmdbusy='1' then
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
ndpcntl.gpr_pcinc := '1';
|
ndpcntl.gpr_pcinc := '1';
|
nmmumoni.istart := '1';
|
nmmumoni.istart := '1';
|
nstate := s_ifetch_w;
|
nstate := s_ifetch_w;
|
else
|
else
|
nstate := s_idle;
|
nstate := s_idle;
|
end if;
|
end if;
|
end procedure do_fork_next_pref;
|
end procedure do_fork_next_pref;
|
|
|
procedure do_start_int(nstate : inout state_type;
|
procedure do_start_int(nstate : inout state_type;
|
ndpcntl : inout dpath_cntl_type;
|
ndpcntl : inout dpath_cntl_type;
|
vector : in slv9_2) is
|
vector : in slv9_2) is
|
begin
|
begin
|
ndpcntl.dtmp_sel := c_dpath_dtmp_psw; -- DTMP = PSW
|
ndpcntl.dtmp_sel := c_dpath_dtmp_psw; -- DTMP = PSW
|
ndpcntl.dtmp_we := '1';
|
ndpcntl.dtmp_we := '1';
|
ndpcntl.ounit_azero := '1'; -- OUNIT A = 0
|
ndpcntl.ounit_azero := '1'; -- OUNIT A = 0
|
ndpcntl.ounit_const := vector & "00"; -- vector
|
ndpcntl.ounit_const := vector & "00"; -- vector
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const(vector)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const(vector)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_we := '1'; -- DSRC = vector
|
ndpcntl.dsrc_we := '1'; -- DSRC = vector
|
nstate := s_int_getpc;
|
nstate := s_int_getpc;
|
end procedure do_start_int;
|
end procedure do_start_int;
|
|
|
begin
|
begin
|
|
|
nstate := R_STATE;
|
nstate := R_STATE;
|
nstatus := R_STATUS;
|
nstatus := R_STATUS;
|
ncpuerr := R_CPUERR;
|
ncpuerr := R_CPUERR;
|
|
|
nstatus.cpuwait := '0'; -- wait flag 0 unless set in s_op_wait
|
nstatus.cpuwait := '0'; -- wait flag 0 unless set in s_op_wait
|
|
|
ncreset := '0';
|
ncreset := '0';
|
nbreset := '0';
|
nbreset := '0';
|
nintack := '0';
|
nintack := '0';
|
|
|
nidstat := R_IDSTAT;
|
nidstat := R_IDSTAT;
|
|
|
if IBSEL_CPUERR='1' and IB_MREQ.we='1' then -- write to CPUERR clears it !
|
if IBSEL_CPUERR='1' and IB_MREQ.we='1' then -- write to CPUERR clears it !
|
ncpuerr := cpuerr_init;
|
ncpuerr := cpuerr_init;
|
end if;
|
end if;
|
|
|
int_pending := '0';
|
int_pending := '0';
|
if unsigned(INT_PRI) > unsigned(PSW.pri) then
|
if unsigned(INT_PRI) > unsigned(PSW.pri) then
|
int_pending := '1';
|
int_pending := '1';
|
end if;
|
end if;
|
|
|
imemok := false;
|
imemok := false;
|
|
|
nmmumoni := mmu_moni_init;
|
nmmumoni := mmu_moni_init;
|
nmmumoni.pc := PC;
|
nmmumoni.pc := PC;
|
|
|
macc := '0';
|
macc := '0';
|
bytop := '0';
|
bytop := '0';
|
brcode := IREG(15) & IREG(10 downto 8);
|
brcode := IREG(15) & IREG(10 downto 8);
|
brcond := '1';
|
brcond := '1';
|
|
|
is_kmode := '0';
|
is_kmode := '0';
|
is_dstkstack1246 := '0';
|
is_dstkstack1246 := '0';
|
|
|
if PSW.cmode = c_psw_kmode then
|
if PSW.cmode = c_psw_kmode then
|
is_kmode := '1';
|
is_kmode := '1';
|
if DSTREG = c_gpr_sp and
|
if DSTREG = c_gpr_sp and
|
(DSTMODF="001" or DSTMODF="010" or
|
(DSTMODF="001" or DSTMODF="010" or
|
DSTMODF="100" or DSTMODF="110") then
|
DSTMODF="100" or DSTMODF="110") then
|
is_dstkstack1246 := '1';
|
is_dstkstack1246 := '1';
|
end if;
|
end if;
|
end if;
|
end if;
|
|
|
lvector := (others=>'0');
|
lvector := (others=>'0');
|
|
|
nvmcntl := vm_cntl_init;
|
nvmcntl := vm_cntl_init;
|
nvmcntl.dspace := '1'; -- DEFAULT
|
nvmcntl.dspace := '1'; -- DEFAULT
|
nvmcntl.mode := PSW.cmode; -- DEFAULT
|
nvmcntl.mode := PSW.cmode; -- DEFAULT
|
nvmcntl.intrsv := R_STATUS.do_intrsv; -- DEFAULT
|
nvmcntl.intrsv := R_STATUS.do_intrsv; -- DEFAULT
|
|
|
ndpcntl := dpath_cntl_init;
|
ndpcntl := dpath_cntl_init;
|
ndpcntl.gpr_asrc := SRCREG; -- DEFAULT
|
ndpcntl.gpr_asrc := SRCREG; -- DEFAULT
|
ndpcntl.gpr_adst := DSTREG; -- DEFAULT
|
ndpcntl.gpr_adst := DSTREG; -- DEFAULT
|
ndpcntl.gpr_mode := PSW.cmode; -- DEFAULT
|
ndpcntl.gpr_mode := PSW.cmode; -- DEFAULT
|
ndpcntl.gpr_rset := PSW.rset; -- DEFAULT
|
ndpcntl.gpr_rset := PSW.rset; -- DEFAULT
|
ndpcntl.gpr_we := '0'; -- DEFAULT
|
ndpcntl.gpr_we := '0'; -- DEFAULT
|
ndpcntl.gpr_bytop := '0'; -- DEFAULT
|
ndpcntl.gpr_bytop := '0'; -- DEFAULT
|
ndpcntl.gpr_pcinc := '0'; -- DEFAULT
|
ndpcntl.gpr_pcinc := '0'; -- DEFAULT
|
|
|
ndpcntl.psr_ccwe := '0'; -- DEFAULT
|
ndpcntl.psr_ccwe := '0'; -- DEFAULT
|
ndpcntl.psr_we := '0'; -- DEFAULT
|
ndpcntl.psr_we := '0'; -- DEFAULT
|
ndpcntl.psr_func := "000"; -- DEFAULT
|
ndpcntl.psr_func := "000"; -- DEFAULT
|
|
|
ndpcntl.dsrc_sel := c_dpath_dsrc_src;
|
ndpcntl.dsrc_sel := c_dpath_dsrc_src;
|
ndpcntl.dsrc_we := '0';
|
ndpcntl.dsrc_we := '0';
|
ndpcntl.ddst_sel := c_dpath_ddst_dst;
|
ndpcntl.ddst_sel := c_dpath_ddst_dst;
|
ndpcntl.ddst_we := '0';
|
ndpcntl.ddst_we := '0';
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dsrc;
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dsrc;
|
ndpcntl.dtmp_we := '0';
|
ndpcntl.dtmp_we := '0';
|
|
|
ndpcntl.ounit_asel := c_ounit_asel_ddst;
|
ndpcntl.ounit_asel := c_ounit_asel_ddst;
|
ndpcntl.ounit_azero := '0'; -- DEFAULT
|
ndpcntl.ounit_azero := '0'; -- DEFAULT
|
ndpcntl.ounit_const := (others=>'0'); -- DEFAULT
|
ndpcntl.ounit_const := (others=>'0'); -- DEFAULT
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;
|
ndpcntl.ounit_opsub := '0'; -- DEFAULT
|
ndpcntl.ounit_opsub := '0'; -- DEFAULT
|
|
|
ndpcntl.aunit_srcmod := R_IDSTAT.aunit_srcmod; -- STATIC
|
ndpcntl.aunit_srcmod := R_IDSTAT.aunit_srcmod; -- STATIC
|
ndpcntl.aunit_dstmod := R_IDSTAT.aunit_dstmod; -- STATIC
|
ndpcntl.aunit_dstmod := R_IDSTAT.aunit_dstmod; -- STATIC
|
ndpcntl.aunit_cimod := R_IDSTAT.aunit_cimod; -- STATIC
|
ndpcntl.aunit_cimod := R_IDSTAT.aunit_cimod; -- STATIC
|
ndpcntl.aunit_cc1op := R_IDSTAT.aunit_cc1op; -- STATIC
|
ndpcntl.aunit_cc1op := R_IDSTAT.aunit_cc1op; -- STATIC
|
ndpcntl.aunit_ccmode := R_IDSTAT.aunit_ccmode; -- STATIC
|
ndpcntl.aunit_ccmode := R_IDSTAT.aunit_ccmode; -- STATIC
|
ndpcntl.aunit_bytop := R_IDSTAT.is_bytop; -- STATIC
|
ndpcntl.aunit_bytop := R_IDSTAT.is_bytop; -- STATIC
|
|
|
ndpcntl.lunit_func := R_IDSTAT.lunit_func; -- STATIC
|
ndpcntl.lunit_func := R_IDSTAT.lunit_func; -- STATIC
|
ndpcntl.lunit_bytop := R_IDSTAT.is_bytop; -- STATIC
|
ndpcntl.lunit_bytop := R_IDSTAT.is_bytop; -- STATIC
|
|
|
ndpcntl.munit_func := R_IDSTAT.munit_func; -- STATIC
|
ndpcntl.munit_func := R_IDSTAT.munit_func; -- STATIC
|
|
|
ndpcntl.ireg_we := '0';
|
ndpcntl.ireg_we := '0';
|
|
|
ndpcntl.cres_sel := R_IDSTAT.res_sel; -- DEFAULT
|
ndpcntl.cres_sel := R_IDSTAT.res_sel; -- DEFAULT
|
ndpcntl.dres_sel := c_dpath_res_ounit;
|
ndpcntl.dres_sel := c_dpath_res_ounit;
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc;
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc;
|
|
|
if CP_CNTL.req='1' and R_STATUS.cmdbusy='0' then
|
if CP_CNTL.req='1' and R_STATUS.cmdbusy='0' then
|
nstatus.cmdbusy := '1';
|
nstatus.cmdbusy := '1';
|
nstatus.cpfunc := CP_CNTL.func;
|
nstatus.cpfunc := CP_CNTL.func;
|
nstatus.cprnum := CP_CNTL.rnum;
|
nstatus.cprnum := CP_CNTL.rnum;
|
end if;
|
end if;
|
|
|
if R_STATUS.cmdack = '1' then
|
if R_STATUS.cmdack = '1' then
|
nstatus.cmdack := '0';
|
nstatus.cmdack := '0';
|
nstatus.cmderr := '0';
|
nstatus.cmderr := '0';
|
nstatus.cmdmerr := '0';
|
nstatus.cmdmerr := '0';
|
end if;
|
end if;
|
|
|
case R_STATE is
|
case R_STATE is
|
|
|
-- idle and command port states ---------------------------------------------
|
-- idle and command port states ---------------------------------------------
|
|
|
-- Note: s_idle was entered from suspended WAIT when waitsusp='1'
|
-- Note: s_idle was entered from suspended WAIT when waitsusp='1'
|
-- --> all exits must check this and either return to s_op_wait
|
-- --> all exits must check this and either return to s_op_wait
|
-- or abort the WAIT and set waitsusp='0'
|
-- or abort the WAIT and set waitsusp='0'
|
|
|
when s_idle =>
|
when s_idle =>
|
|
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST (do mux early)
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST (do mux early)
|
nstatus.cpustep := '0';
|
nstatus.cpustep := '0';
|
|
|
if R_STATUS.cmdbusy = '1' then
|
if R_STATUS.cmdbusy = '1' then
|
case R_STATUS.cpfunc is
|
case R_STATUS.cpfunc is
|
|
|
when c_cpfunc_noop => -- noop : no operation --------
|
when c_cpfunc_noop => -- noop : no operation --------
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
when c_cpfunc_sta => -- sta : cpu start -----------
|
when c_cpfunc_sta => -- sta : cpu start -----------
|
ncreset := '1';
|
ncreset := '1';
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstatus.cpugo := '1';
|
nstatus.cpugo := '1';
|
nstatus.cpuhalt := '0';
|
nstatus.cpuhalt := '0';
|
nstatus.cpurust := c_cpurust_runs;
|
nstatus.cpurust := c_cpurust_runs;
|
nstatus.waitsusp := '0';
|
nstatus.waitsusp := '0';
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
when c_cpfunc_sto => -- sto : cpu stop ------------
|
when c_cpfunc_sto => -- sto : cpu stop ------------
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstatus.cpugo := '0';
|
nstatus.cpugo := '0';
|
nstatus.cpurust := c_cpurust_stop;
|
nstatus.cpurust := c_cpurust_stop;
|
nstatus.waitsusp := '0';
|
nstatus.waitsusp := '0';
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
when c_cpfunc_cont => -- cont : cpu continue --------
|
when c_cpfunc_cont => -- cont : cpu continue --------
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstatus.cpugo := '1';
|
nstatus.cpugo := '1';
|
nstatus.cpuhalt := '0';
|
nstatus.cpuhalt := '0';
|
nstatus.cpurust := c_cpurust_runs;
|
nstatus.cpurust := c_cpurust_runs;
|
nstatus.waitsusp := '0';
|
nstatus.waitsusp := '0';
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
when c_cpfunc_step => -- step : cpu step ------------
|
when c_cpfunc_step => -- step : cpu step ------------
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstatus.cpustep := '1';
|
nstatus.cpustep := '1';
|
nstatus.cpuhalt := '0';
|
nstatus.cpuhalt := '0';
|
nstatus.cpurust := c_cpurust_step;
|
nstatus.cpurust := c_cpurust_step;
|
nstatus.waitsusp := '0';
|
nstatus.waitsusp := '0';
|
if int_pending = '1' then
|
if int_pending = '1' then
|
nintack := '1';
|
nintack := '1';
|
nstatus.intvect := INT_VECT;
|
nstatus.intvect := INT_VECT;
|
nstate := s_int_ext;
|
nstate := s_int_ext;
|
else
|
else
|
nstate := s_ifetch;
|
nstate := s_ifetch;
|
end if;
|
end if;
|
|
|
when c_cpfunc_rst => -- rst : cpu reset (soft) ----
|
when c_cpfunc_rst => -- rst : cpu reset (soft) ----
|
ncreset := '1';
|
ncreset := '1';
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstatus.cpugo := '0';
|
nstatus.cpugo := '0';
|
nstatus.cpuhalt := '0';
|
nstatus.cpuhalt := '0';
|
nstatus.cpurust := c_cpurust_reset;
|
nstatus.cpurust := c_cpurust_reset;
|
nstatus.waitsusp := '0';
|
nstatus.waitsusp := '0';
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
when c_cpfunc_rreg => -- rreg : read register ------
|
when c_cpfunc_rreg => -- rreg : read register ------
|
ndpcntl.gpr_adst := R_STATUS.cprnum;
|
ndpcntl.gpr_adst := R_STATUS.cprnum;
|
ndpcntl.ddst_sel := c_dpath_ddst_dst;
|
ndpcntl.ddst_sel := c_dpath_ddst_dst;
|
ndpcntl.ddst_we := '1';
|
ndpcntl.ddst_we := '1';
|
nstate := s_cp_regread;
|
nstate := s_cp_regread;
|
|
|
when c_cpfunc_wreg => -- wreg : write register -----
|
when c_cpfunc_wreg => -- wreg : write register -----
|
ndpcntl.dres_sel := c_dpath_res_cpdin; -- DRES = CPDIN
|
ndpcntl.dres_sel := c_dpath_res_cpdin; -- DRES = CPDIN
|
ndpcntl.gpr_adst := R_STATUS.cprnum;
|
ndpcntl.gpr_adst := R_STATUS.cprnum;
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
when c_cpfunc_rpsw => -- rpsw : read psw -----------
|
when c_cpfunc_rpsw => -- rpsw : read psw -----------
|
ndpcntl.dtmp_sel := c_dpath_dtmp_psw; -- DTMP = PSW
|
ndpcntl.dtmp_sel := c_dpath_dtmp_psw; -- DTMP = PSW
|
ndpcntl.dtmp_we := '1';
|
ndpcntl.dtmp_we := '1';
|
nstate := s_cp_rps;
|
nstate := s_cp_rps;
|
|
|
when c_cpfunc_wpsw => -- wpsw : write psw ----------
|
when c_cpfunc_wpsw => -- wpsw : write psw ----------
|
ndpcntl.dres_sel := c_dpath_res_cpdin; -- DRES = CPDIN
|
ndpcntl.dres_sel := c_dpath_res_cpdin; -- DRES = CPDIN
|
ndpcntl.psr_func := c_psr_func_wall; -- write all fields
|
ndpcntl.psr_func := c_psr_func_wall; -- write all fields
|
ndpcntl.psr_we := '1'; -- load new PS
|
ndpcntl.psr_we := '1'; -- load new PS
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
when c_cpfunc_rmem => -- rmem : read memory --------
|
when c_cpfunc_rmem => -- rmem : read memory --------
|
nvmcntl.cacc := '1';
|
nvmcntl.cacc := '1';
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
nstate := s_cp_memr_w;
|
nstate := s_cp_memr_w;
|
|
|
when c_cpfunc_wmem => -- wmem : write memory -------
|
when c_cpfunc_wmem => -- wmem : write memory -------
|
ndpcntl.dres_sel := c_dpath_res_cpdin; -- DRES = CPDIN
|
ndpcntl.dres_sel := c_dpath_res_cpdin; -- DRES = CPDIN
|
nvmcntl.wacc := '1'; -- write mem
|
nvmcntl.wacc := '1'; -- write mem
|
nvmcntl.cacc := '1';
|
nvmcntl.cacc := '1';
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
nstate := s_cp_memw_w;
|
nstate := s_cp_memw_w;
|
|
|
when others =>
|
when others =>
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstatus.cmderr := '1';
|
nstatus.cmderr := '1';
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
end case;
|
end case;
|
|
|
elsif R_STATUS.waitsusp = '1' then
|
elsif R_STATUS.waitsusp = '1' then
|
nstatus.waitsusp := '0';
|
nstatus.waitsusp := '0';
|
nstate := s_op_wait;
|
nstate := s_op_wait;
|
|
|
elsif R_STATUS.cpugo = '1' then
|
elsif R_STATUS.cpugo = '1' then
|
if int_pending = '1' then
|
if int_pending = '1' then
|
nintack := '1';
|
nintack := '1';
|
nstatus.intvect := INT_VECT;
|
nstatus.intvect := INT_VECT;
|
nstate := s_int_ext;
|
nstate := s_int_ext;
|
else
|
else
|
nstate := s_ifetch;
|
nstate := s_ifetch;
|
end if;
|
end if;
|
|
|
end if;
|
end if;
|
|
|
when s_cp_regread =>
|
when s_cp_regread =>
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A = DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A = DDST
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B = const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B = const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
when s_cp_rps =>
|
when s_cp_rps =>
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A = DTMP
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A = DTMP
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B = const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B = const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
when s_cp_memr_w =>
|
when s_cp_memr_w =>
|
nstate := s_cp_memr_w;
|
nstate := s_cp_memr_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
if (VM_STAT.ack or VM_STAT.err or VM_STAT.fail)='1' then
|
if (VM_STAT.ack or VM_STAT.err or VM_STAT.fail)='1' then
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstatus.trap_ysv := '0'; -- suppress traps on console
|
nstatus.trap_ysv := '0'; -- suppress traps on console
|
nstatus.trap_mmu := '0';
|
nstatus.trap_mmu := '0';
|
nstatus.cmdmerr := VM_STAT.err or VM_STAT.fail;
|
nstatus.cmdmerr := VM_STAT.err or VM_STAT.fail;
|
nstate := s_idle;
|
nstate := s_idle;
|
end if;
|
end if;
|
|
|
when s_cp_memw_w =>
|
when s_cp_memw_w =>
|
nstate := s_cp_memw_w;
|
nstate := s_cp_memw_w;
|
if (VM_STAT.ack or VM_STAT.err or VM_STAT.fail)='1' then
|
if (VM_STAT.ack or VM_STAT.err or VM_STAT.fail)='1' then
|
nstatus.cmdack := '1';
|
nstatus.cmdack := '1';
|
nstatus.trap_ysv := '0'; -- suppress traps on console
|
nstatus.trap_ysv := '0'; -- suppress traps on console
|
nstatus.trap_mmu := '0';
|
nstatus.trap_mmu := '0';
|
nstatus.cmdmerr := VM_STAT.err or VM_STAT.fail;
|
nstatus.cmdmerr := VM_STAT.err or VM_STAT.fail;
|
nstate := s_idle;
|
nstate := s_idle;
|
end if;
|
end if;
|
|
|
-- instruction fetch and decode ---------------------------------------------
|
-- instruction fetch and decode ---------------------------------------------
|
|
|
when s_ifetch =>
|
when s_ifetch =>
|
nmmumoni.istart := '1'; -- do here; memread_i inc PC !
|
nmmumoni.istart := '1'; -- do here; memread_i inc PC !
|
do_memread_i(nstate, ndpcntl, nvmcntl, s_ifetch_w);
|
do_memread_i(nstate, ndpcntl, nvmcntl, s_ifetch_w);
|
|
|
when s_ifetch_w =>
|
when s_ifetch_w =>
|
nstate := s_ifetch_w;
|
nstate := s_ifetch_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.ireg_we := '1';
|
ndpcntl.ireg_we := '1';
|
nstate := s_idecode;
|
nstate := s_idecode;
|
end if;
|
end if;
|
|
|
when s_idecode =>
|
when s_idecode =>
|
nidstat := ID_STAT; -- register decode status
|
nidstat := ID_STAT; -- register decode status
|
if ID_STAT.force_srcsp = '1' then
|
if ID_STAT.force_srcsp = '1' then
|
ndpcntl.gpr_asrc := c_gpr_sp;
|
ndpcntl.gpr_asrc := c_gpr_sp;
|
end if;
|
end if;
|
ndpcntl.dsrc_sel := c_dpath_dsrc_src;
|
ndpcntl.dsrc_sel := c_dpath_dsrc_src;
|
ndpcntl.dsrc_we := '1';
|
ndpcntl.dsrc_we := '1';
|
ndpcntl.ddst_sel := c_dpath_ddst_dst;
|
ndpcntl.ddst_sel := c_dpath_ddst_dst;
|
ndpcntl.ddst_we := '1';
|
ndpcntl.ddst_we := '1';
|
|
|
nvmcntl.dspace := '0';
|
nvmcntl.dspace := '0';
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
|
|
if ID_STAT.do_pref_dec='1' and PSW.tflag='0' and int_pending='0' and
|
if ID_STAT.do_pref_dec='1' and PSW.tflag='0' and int_pending='0' and
|
R_STATUS.cpugo='1' and not R_STATUS.cmdbusy='1'
|
R_STATUS.cpugo='1' and not R_STATUS.cmdbusy='1'
|
then
|
then
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
ndpcntl.gpr_pcinc := '1'; -- (pc)++
|
ndpcntl.gpr_pcinc := '1'; -- (pc)++
|
nmmumoni.istart := '1';
|
nmmumoni.istart := '1';
|
nstatus.prefdone := '1';
|
nstatus.prefdone := '1';
|
end if;
|
end if;
|
|
|
if ID_STAT.do_fork_op = '1' then
|
if ID_STAT.do_fork_op = '1' then
|
case ID_STAT.fork_op is
|
case ID_STAT.fork_op is
|
when c_fork_op_halt => nstate := s_op_halt;
|
when c_fork_op_halt => nstate := s_op_halt;
|
when c_fork_op_wait => nstate := s_op_wait;
|
when c_fork_op_wait => nstate := s_op_wait;
|
when c_fork_op_rtti => nstate := s_rti_getpc;
|
when c_fork_op_rtti => nstate := s_rti_getpc;
|
when c_fork_op_trap => nstate := s_op_trap;
|
when c_fork_op_trap => nstate := s_op_trap;
|
when c_fork_op_reset=> nstate := s_op_reset;
|
when c_fork_op_reset=> nstate := s_op_reset;
|
when c_fork_op_rts => nstate := s_op_rts;
|
when c_fork_op_rts => nstate := s_op_rts;
|
when c_fork_op_spl => nstate := s_op_spl;
|
when c_fork_op_spl => nstate := s_op_spl;
|
when c_fork_op_mcc => nstate := s_op_mcc;
|
when c_fork_op_mcc => nstate := s_op_mcc;
|
when c_fork_op_br => nstate := s_op_br;
|
when c_fork_op_br => nstate := s_op_br;
|
when c_fork_op_mark => nstate := s_op_mark;
|
when c_fork_op_mark => nstate := s_op_mark;
|
when c_fork_op_sob => nstate := s_op_sob;
|
when c_fork_op_sob => nstate := s_op_sob;
|
when c_fork_op_mtp => nstate := s_opa_mtp;
|
when c_fork_op_mtp => nstate := s_opa_mtp;
|
when others => nstate := s_cpufail;
|
when others => nstate := s_cpufail;
|
end case;
|
end case;
|
elsif ID_STAT.do_fork_srcr = '1' then
|
elsif ID_STAT.do_fork_srcr = '1' then
|
case ID_STAT.fork_srcr is
|
case ID_STAT.fork_srcr is
|
when c_fork_srcr_def => nstate := s_srcr_def;
|
when c_fork_srcr_def => nstate := s_srcr_def;
|
when c_fork_srcr_inc => nstate := s_srcr_inc;
|
when c_fork_srcr_inc => nstate := s_srcr_inc;
|
when c_fork_srcr_dec => nstate := s_srcr_dec;
|
when c_fork_srcr_dec => nstate := s_srcr_dec;
|
when c_fork_srcr_ind => nstate := s_srcr_ind;
|
when c_fork_srcr_ind => nstate := s_srcr_ind;
|
when others => nstate := s_cpufail;
|
when others => nstate := s_cpufail;
|
end case;
|
end case;
|
elsif ID_STAT.do_fork_dstr = '1' then
|
elsif ID_STAT.do_fork_dstr = '1' then
|
do_fork_dstr(nstate, ID_STAT);
|
do_fork_dstr(nstate, ID_STAT);
|
elsif ID_STAT.do_fork_dsta = '1' then
|
elsif ID_STAT.do_fork_dsta = '1' then
|
case ID_STAT.fork_dsta is -- 2nd dsta fork in s_opa_mtp_pop_w
|
case ID_STAT.fork_dsta is -- 2nd dsta fork in s_opa_mtp_pop_w
|
when c_fork_dsta_def => do_fork_opa(nstate, ID_STAT);
|
when c_fork_dsta_def => do_fork_opa(nstate, ID_STAT);
|
when c_fork_dsta_inc => nstate := s_dsta_inc;
|
when c_fork_dsta_inc => nstate := s_dsta_inc;
|
when c_fork_dsta_dec => nstate := s_dsta_dec;
|
when c_fork_dsta_dec => nstate := s_dsta_dec;
|
when c_fork_dsta_ind => nstate := s_dsta_ind;
|
when c_fork_dsta_ind => nstate := s_dsta_ind;
|
when others => nstate := s_cpufail;
|
when others => nstate := s_cpufail;
|
end case;
|
end case;
|
elsif ID_STAT.do_fork_opg = '1' then
|
elsif ID_STAT.do_fork_opg = '1' then
|
do_fork_opg(nstate, ID_STAT);
|
do_fork_opg(nstate, ID_STAT);
|
elsif ID_STAT.is_res = '1' then
|
elsif ID_STAT.is_res = '1' then
|
nstate := s_trap_10; -- do trap 10;
|
nstate := s_trap_10; -- do trap 10;
|
else
|
else
|
nstate := s_cpufail; -- catch mistakes here...
|
nstate := s_cpufail; -- catch mistakes here...
|
end if;
|
end if;
|
|
|
-- source read states -------------------------------------------------------
|
-- source read states -------------------------------------------------------
|
-- flows:
|
-- flows:
|
-- 1 (r) s_srcr_def req (r)
|
-- 1 (r) s_srcr_def req (r)
|
-- s_srcr_def_w get (r)
|
-- s_srcr_def_w get (r)
|
-- -> do_fork_dstr or do_fork_opg
|
-- -> do_fork_dstr or do_fork_opg
|
--
|
--
|
-- 2 (r)+ s_srcr_inc req (r); r+=s
|
-- 2 (r)+ s_srcr_inc req (r); r+=s
|
-- s_srcr_inc_w get (r)
|
-- s_srcr_inc_w get (r)
|
-- -> do_fork_dstr or do_fork_opg
|
-- -> do_fork_dstr or do_fork_opg
|
--
|
--
|
-- 3 @(r)+ s_srcr_inc req (r); r+=s
|
-- 3 @(r)+ s_srcr_inc req (r); r+=s
|
-- s_srcr_inc_w get (r)
|
-- s_srcr_inc_w get (r)
|
-- s_srcr_def req @(r)
|
-- s_srcr_def req @(r)
|
-- s_srcr_def_w get @(r)
|
-- s_srcr_def_w get @(r)
|
-- -> do_fork_dstr or do_fork_opg
|
-- -> do_fork_dstr or do_fork_opg
|
--
|
--
|
-- 4 -(r) s_srcr_dec r-=s
|
-- 4 -(r) s_srcr_dec r-=s
|
-- s_srcr_dec1 req (r)
|
-- s_srcr_dec1 req (r)
|
-- s_srcr_inc_w get (r)
|
-- s_srcr_inc_w get (r)
|
-- -> do_fork_dstr or do_fork_opg
|
-- -> do_fork_dstr or do_fork_opg
|
--
|
--
|
-- 5 @-(r) s_srcr_dec r-=s
|
-- 5 @-(r) s_srcr_dec r-=s
|
-- s_srcr_dec1 req (r)
|
-- s_srcr_dec1 req (r)
|
-- s_srcr_inc_w get (r)
|
-- s_srcr_inc_w get (r)
|
-- s_srcr_def req @(r)
|
-- s_srcr_def req @(r)
|
-- s_srcr_def_w get @(r)
|
-- s_srcr_def_w get @(r)
|
-- -> do_fork_dstr or do_fork_opg
|
-- -> do_fork_dstr or do_fork_opg
|
--
|
--
|
-- 6 n(r) s_srcr_ind req n
|
-- 6 n(r) s_srcr_ind req n
|
-- s_srcr_ind1_w get n; ea=r+n
|
-- s_srcr_ind1_w get n; ea=r+n
|
-- s_srcr_ind2 req n(r)
|
-- s_srcr_ind2 req n(r)
|
-- s_srcr_ind2_w get n(r)
|
-- s_srcr_ind2_w get n(r)
|
-- -> do_fork_dstr or do_fork_opg
|
-- -> do_fork_dstr or do_fork_opg
|
--
|
--
|
-- 7 @n(r) s_srcr_ind req n
|
-- 7 @n(r) s_srcr_ind req n
|
-- s_srcr_ind1_w get n; ea=r+n
|
-- s_srcr_ind1_w get n; ea=r+n
|
-- s_srcr_ind2 req n(r)
|
-- s_srcr_ind2 req n(r)
|
-- s_srcr_ind2_w get n(r)
|
-- s_srcr_ind2_w get n(r)
|
-- s_srcr_def req @n(r)
|
-- s_srcr_def req @n(r)
|
-- s_srcr_def_w get @n(r)
|
-- s_srcr_def_w get @n(r)
|
-- -> do_fork_dstr or do_fork_opg
|
-- -> do_fork_dstr or do_fork_opg
|
|
|
when s_srcr_def =>
|
when s_srcr_def =>
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
do_memread_d(nstate, nvmcntl, s_srcr_def_w,
|
do_memread_d(nstate, nvmcntl, s_srcr_def_w,
|
bytop=>R_IDSTAT.is_bytop,
|
bytop=>R_IDSTAT.is_bytop,
|
is_pci=>R_IDSTAT.is_srcpcmode1);
|
is_pci=>R_IDSTAT.is_srcpcmode1);
|
|
|
when s_srcr_def_w =>
|
when s_srcr_def_w =>
|
nstate := s_srcr_def_w;
|
nstate := s_srcr_def_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
if imemok then
|
if imemok then
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
if R_IDSTAT.do_fork_dstr = '1' then
|
if R_IDSTAT.do_fork_dstr = '1' then
|
do_fork_dstr(nstate, R_IDSTAT);
|
do_fork_dstr(nstate, R_IDSTAT);
|
else
|
else
|
do_fork_opg(nstate, R_IDSTAT);
|
do_fork_opg(nstate, R_IDSTAT);
|
end if;
|
end if;
|
end if;
|
end if;
|
|
|
when s_srcr_inc =>
|
when s_srcr_inc =>
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, SRCDEF, SRCREG);
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, SRCDEF, SRCREG);
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := SRCREG;
|
ndpcntl.gpr_adst := SRCREG;
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '0';
|
nmmumoni.isdec := '0';
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES (for if)
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES (for if)
|
if DSTREG = SRCREG then -- prevent stale DDST copy
|
if DSTREG = SRCREG then -- prevent stale DDST copy
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
end if;
|
end if;
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
bytop := R_IDSTAT.is_bytop and not SRCDEF;
|
bytop := R_IDSTAT.is_bytop and not SRCDEF;
|
do_memread_d(nstate, nvmcntl, s_srcr_inc_w,
|
do_memread_d(nstate, nvmcntl, s_srcr_inc_w,
|
bytop=>bytop, is_pci=>R_IDSTAT.is_srcpc);
|
bytop=>bytop, is_pci=>R_IDSTAT.is_srcpc);
|
|
|
when s_srcr_inc_w =>
|
when s_srcr_inc_w =>
|
nstate := s_srcr_inc_w;
|
nstate := s_srcr_inc_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
if SRCDEF = '1' then
|
if SRCDEF = '1' then
|
nstate := s_srcr_def;
|
nstate := s_srcr_def;
|
else
|
else
|
if R_IDSTAT.do_fork_dstr = '1' then
|
if R_IDSTAT.do_fork_dstr = '1' then
|
do_fork_dstr(nstate, R_IDSTAT);
|
do_fork_dstr(nstate, R_IDSTAT);
|
else
|
else
|
do_fork_opg(nstate, R_IDSTAT);
|
do_fork_opg(nstate, R_IDSTAT);
|
end if;
|
end if;
|
end if;
|
end if;
|
end if;
|
end if;
|
|
|
when s_srcr_dec =>
|
when s_srcr_dec =>
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, SRCDEF, SRCREG);
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, SRCDEF, SRCREG);
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.gpr_adst := SRCREG;
|
ndpcntl.gpr_adst := SRCREG;
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '1';
|
nmmumoni.isdec := '1';
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES (for if)
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES (for if)
|
if DSTREG = SRCREG then -- prevent stale DDST copy
|
if DSTREG = SRCREG then -- prevent stale DDST copy
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
end if;
|
end if;
|
nstate := s_srcr_dec1;
|
nstate := s_srcr_dec1;
|
|
|
when s_srcr_dec1 =>
|
when s_srcr_dec1 =>
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
bytop := R_IDSTAT.is_bytop and not SRCDEF;
|
bytop := R_IDSTAT.is_bytop and not SRCDEF;
|
do_memread_d(nstate, nvmcntl, s_srcr_inc_w, bytop=>bytop);
|
do_memread_d(nstate, nvmcntl, s_srcr_inc_w, bytop=>bytop);
|
|
|
when s_srcr_ind =>
|
when s_srcr_ind =>
|
do_memread_i(nstate, ndpcntl, nvmcntl, s_srcr_ind1_w);
|
do_memread_i(nstate, ndpcntl, nvmcntl, s_srcr_ind1_w);
|
|
|
when s_srcr_ind1_w =>
|
when s_srcr_ind1_w =>
|
nstate := s_srcr_ind1_w;
|
nstate := s_srcr_ind1_w;
|
if R_IDSTAT.is_srcpc = '0' then
|
if R_IDSTAT.is_srcpc = '0' then
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A = DSRC
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A = DSRC
|
else
|
else
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC (for nn(pc))
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC (for nn(pc))
|
end if;
|
end if;
|
ndpcntl.ounit_bsel := c_ounit_bsel_vmdout; -- OUNIT B = VMDOUT
|
ndpcntl.ounit_bsel := c_ounit_bsel_vmdout; -- OUNIT B = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_dst; -- DDST = R(DST)
|
ndpcntl.ddst_sel := c_dpath_ddst_dst; -- DDST = R(DST)
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.ddst_we := '1'; -- update DDST (to reload PC)
|
ndpcntl.ddst_we := '1'; -- update DDST (to reload PC)
|
nstate := s_srcr_ind2;
|
nstate := s_srcr_ind2;
|
end if;
|
end if;
|
|
|
when s_srcr_ind2 =>
|
when s_srcr_ind2 =>
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
bytop := R_IDSTAT.is_bytop and not SRCDEF;
|
bytop := R_IDSTAT.is_bytop and not SRCDEF;
|
do_memread_d(nstate, nvmcntl, s_srcr_ind2_w, bytop=>bytop);
|
do_memread_d(nstate, nvmcntl, s_srcr_ind2_w, bytop=>bytop);
|
|
|
when s_srcr_ind2_w =>
|
when s_srcr_ind2_w =>
|
nstate := s_srcr_ind2_w;
|
nstate := s_srcr_ind2_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
if SRCDEF = '1' then
|
if SRCDEF = '1' then
|
nstate := s_srcr_def;
|
nstate := s_srcr_def;
|
else
|
else
|
if R_IDSTAT.do_fork_dstr = '1' then
|
if R_IDSTAT.do_fork_dstr = '1' then
|
do_fork_dstr(nstate, R_IDSTAT);
|
do_fork_dstr(nstate, R_IDSTAT);
|
else
|
else
|
do_fork_opg(nstate, R_IDSTAT);
|
do_fork_opg(nstate, R_IDSTAT);
|
end if;
|
end if;
|
end if;
|
end if;
|
end if;
|
end if;
|
|
|
-- destination read states --------------------------------------------------
|
-- destination read states --------------------------------------------------
|
-- flows:
|
-- flows:
|
-- 1 (r) s_dstr_def req (r) (rmw if rmw op)
|
-- 1 (r) s_dstr_def req (r) (rmw if rmw op)
|
-- s_dstr_def_w get (r)
|
-- s_dstr_def_w get (r)
|
-- -> do_fork_opg
|
-- -> do_fork_opg
|
--
|
--
|
-- 2 (r)+ s_dstr_inc req (r); r+=s (rmw if rmw op)
|
-- 2 (r)+ s_dstr_inc req (r); r+=s (rmw if rmw op)
|
-- s_dstr_inc_w get (r)
|
-- s_dstr_inc_w get (r)
|
-- -> do_fork_opg
|
-- -> do_fork_opg
|
--
|
--
|
-- 3 @(r)+ s_dstr_inc req (r); r+=s
|
-- 3 @(r)+ s_dstr_inc req (r); r+=s
|
-- s_dstr_inc_w get (r)
|
-- s_dstr_inc_w get (r)
|
-- s_dstr_def req @(r) (rmw if rmw op)
|
-- s_dstr_def req @(r) (rmw if rmw op)
|
-- s_dstr_def_w get @(r)
|
-- s_dstr_def_w get @(r)
|
-- -> do_fork_opg
|
-- -> do_fork_opg
|
--
|
--
|
-- 4 -(r) s_dstr_dec r-=s
|
-- 4 -(r) s_dstr_dec r-=s
|
-- s_dstr_dec1 req (r) (rmw if rmw op)
|
-- s_dstr_dec1 req (r) (rmw if rmw op)
|
-- s_dstr_inc_w get (r)
|
-- s_dstr_inc_w get (r)
|
-- -> do_fork_opg
|
-- -> do_fork_opg
|
--
|
--
|
-- 5 @-(r) s_dstr_dec r-=s
|
-- 5 @-(r) s_dstr_dec r-=s
|
-- s_dstr_dec1 req (r)
|
-- s_dstr_dec1 req (r)
|
-- s_dstr_inc_w get (r)
|
-- s_dstr_inc_w get (r)
|
-- s_dstr_def req @(r) (rmw if rmw op)
|
-- s_dstr_def req @(r) (rmw if rmw op)
|
-- s_dstr_def_w get @(r)
|
-- s_dstr_def_w get @(r)
|
-- -> do_fork_opg
|
-- -> do_fork_opg
|
--
|
--
|
-- 6 n(r) s_dstr_ind req n
|
-- 6 n(r) s_dstr_ind req n
|
-- s_dstr_ind1_w get n; ea=r+n
|
-- s_dstr_ind1_w get n; ea=r+n
|
-- s_dstr_ind2 req n(r) (rmw if rmw op)
|
-- s_dstr_ind2 req n(r) (rmw if rmw op)
|
-- s_dstr_ind2_w get n(r)
|
-- s_dstr_ind2_w get n(r)
|
-- -> do_fork_opg
|
-- -> do_fork_opg
|
--
|
--
|
-- 7 @n(r) s_dstr_ind req n
|
-- 7 @n(r) s_dstr_ind req n
|
-- s_dstr_ind1_w get n; ea=r+n
|
-- s_dstr_ind1_w get n; ea=r+n
|
-- s_dstr_ind2 req n(r)
|
-- s_dstr_ind2 req n(r)
|
-- s_dstr_ind2_w get n(r)
|
-- s_dstr_ind2_w get n(r)
|
-- s_dstr_def req @n(r) (rmw if rmw op)
|
-- s_dstr_def req @n(r) (rmw if rmw op)
|
-- s_dstr_def_w get @n(r)
|
-- s_dstr_def_w get @n(r)
|
-- -> do_fork_opg
|
-- -> do_fork_opg
|
|
|
when s_dstr_def =>
|
when s_dstr_def =>
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
do_memread_d(nstate, nvmcntl, s_dstr_def_w,
|
do_memread_d(nstate, nvmcntl, s_dstr_def_w,
|
bytop=>R_IDSTAT.is_bytop, macc=>R_IDSTAT.is_rmwop);
|
bytop=>R_IDSTAT.is_bytop, macc=>R_IDSTAT.is_rmwop);
|
|
|
when s_dstr_def_w =>
|
when s_dstr_def_w =>
|
nstate := s_dstr_def_w;
|
nstate := s_dstr_def_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
if imemok then
|
if imemok then
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
do_fork_opg(nstate, R_IDSTAT);
|
do_fork_opg(nstate, R_IDSTAT);
|
end if;
|
end if;
|
|
|
when s_dstr_inc =>
|
when s_dstr_inc =>
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, DSTDEF, DSTREG);
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, DSTDEF, DSTREG);
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '0';
|
nmmumoni.isdec := '0';
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
macc := R_IDSTAT.is_rmwop and not DSTDEF;
|
macc := R_IDSTAT.is_rmwop and not DSTDEF;
|
bytop := R_IDSTAT.is_bytop and not DSTDEF;
|
bytop := R_IDSTAT.is_bytop and not DSTDEF;
|
do_memread_d(nstate, nvmcntl, s_dstr_inc_w,
|
do_memread_d(nstate, nvmcntl, s_dstr_inc_w,
|
bytop=>bytop, macc=>macc, is_pci=>R_IDSTAT.is_dstpc);
|
bytop=>bytop, macc=>macc, is_pci=>R_IDSTAT.is_dstpc);
|
|
|
when s_dstr_inc_w =>
|
when s_dstr_inc_w =>
|
nstate := s_dstr_inc_w;
|
nstate := s_dstr_inc_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
if DSTDEF = '1' then
|
if DSTDEF = '1' then
|
nstate := s_dstr_def;
|
nstate := s_dstr_def;
|
else
|
else
|
do_fork_opg(nstate, R_IDSTAT);
|
do_fork_opg(nstate, R_IDSTAT);
|
end if;
|
end if;
|
end if;
|
end if;
|
|
|
when s_dstr_dec =>
|
when s_dstr_dec =>
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, DSTDEF, DSTREG);
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, DSTDEF, DSTREG);
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '1';
|
nmmumoni.isdec := '1';
|
nstate := s_dstr_dec1;
|
nstate := s_dstr_dec1;
|
|
|
when s_dstr_dec1 =>
|
when s_dstr_dec1 =>
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
macc := R_IDSTAT.is_rmwop and not DSTDEF;
|
macc := R_IDSTAT.is_rmwop and not DSTDEF;
|
bytop := R_IDSTAT.is_bytop and not DSTDEF;
|
bytop := R_IDSTAT.is_bytop and not DSTDEF;
|
do_memread_d(nstate, nvmcntl, s_dstr_inc_w,
|
do_memread_d(nstate, nvmcntl, s_dstr_inc_w,
|
bytop=>bytop, macc=>macc);
|
bytop=>bytop, macc=>macc);
|
|
|
when s_dstr_ind =>
|
when s_dstr_ind =>
|
do_memread_i(nstate, ndpcntl, nvmcntl, s_dstr_ind1_w);
|
do_memread_i(nstate, ndpcntl, nvmcntl, s_dstr_ind1_w);
|
|
|
when s_dstr_ind1_w =>
|
when s_dstr_ind1_w =>
|
nstate := s_dstr_ind1_w;
|
nstate := s_dstr_ind1_w;
|
if R_IDSTAT.is_dstpc = '0' then
|
if R_IDSTAT.is_dstpc = '0' then
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A = DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A = DDST
|
else
|
else
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC (for nn(pc))
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC (for nn(pc))
|
end if;
|
end if;
|
ndpcntl.ounit_bsel := c_ounit_bsel_vmdout;-- OUNIT B = VMDOUT
|
ndpcntl.ounit_bsel := c_ounit_bsel_vmdout;-- OUNIT B = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
nstate := s_dstr_ind2;
|
nstate := s_dstr_ind2;
|
end if;
|
end if;
|
|
|
when s_dstr_ind2 =>
|
when s_dstr_ind2 =>
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
macc := R_IDSTAT.is_rmwop and not DSTDEF;
|
macc := R_IDSTAT.is_rmwop and not DSTDEF;
|
bytop := R_IDSTAT.is_bytop and not DSTDEF;
|
bytop := R_IDSTAT.is_bytop and not DSTDEF;
|
do_memread_d(nstate, nvmcntl, s_dstr_ind2_w,
|
do_memread_d(nstate, nvmcntl, s_dstr_ind2_w,
|
bytop=>bytop, macc=>macc);
|
bytop=>bytop, macc=>macc);
|
|
|
when s_dstr_ind2_w =>
|
when s_dstr_ind2_w =>
|
nstate := s_dstr_ind2_w;
|
nstate := s_dstr_ind2_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
if DSTDEF = '1' then
|
if DSTDEF = '1' then
|
nstate := s_dstr_def;
|
nstate := s_dstr_def;
|
else
|
else
|
do_fork_opg(nstate, R_IDSTAT);
|
do_fork_opg(nstate, R_IDSTAT);
|
end if;
|
end if;
|
end if;
|
end if;
|
|
|
-- destination write states -------------------------------------------------
|
-- destination write states -------------------------------------------------
|
-- flows:
|
-- flows:
|
-- 1 (r) s_dstw_def wreq (r) check kstack
|
-- 1 (r) s_dstw_def wreq (r) check kstack
|
-- s_dstw_def_w ack (r)
|
-- s_dstw_def_w ack (r)
|
-- -> do_fork_next
|
-- -> do_fork_next
|
--
|
--
|
-- 2 (r)+ s_dstw_inc wreq (r) check kstack
|
-- 2 (r)+ s_dstw_inc wreq (r) check kstack
|
-- s_dstw_inc_w ack (r); r+=s
|
-- s_dstw_inc_w ack (r); r+=s
|
-- -> do_fork_next
|
-- -> do_fork_next
|
--
|
--
|
-- 3 @(r)+ s_dstw_inc rreq (r); r+=s
|
-- 3 @(r)+ s_dstw_inc rreq (r); r+=s
|
-- s_dstw_incdef_w get (r)
|
-- s_dstw_incdef_w get (r)
|
-- s_dstw_def246 wreq @(r)
|
-- s_dstw_def246 wreq @(r)
|
-- s_dstw_def_w ack @(r)
|
-- s_dstw_def_w ack @(r)
|
-- -> do_fork_next
|
-- -> do_fork_next
|
--
|
--
|
-- 4 -(r) s_dstw_dec r-=s
|
-- 4 -(r) s_dstw_dec r-=s
|
-- s_dstw_dec1 wreq (r) check kstack
|
-- s_dstw_dec1 wreq (r) check kstack
|
-- s_dstw_def_w ack (r)
|
-- s_dstw_def_w ack (r)
|
-- -> do_fork_next
|
-- -> do_fork_next
|
--
|
--
|
-- 5 @-(r) s_dstw_dec r-=s
|
-- 5 @-(r) s_dstw_dec r-=s
|
-- s_dstw_dec1 rreq (r)
|
-- s_dstw_dec1 rreq (r)
|
-- s_dstw_incdef_w get (r)
|
-- s_dstw_incdef_w get (r)
|
-- s_dstw_def246 wreq @(r)
|
-- s_dstw_def246 wreq @(r)
|
-- s_dstw_def_w ack @(r)
|
-- s_dstw_def_w ack @(r)
|
-- -> do_fork_next
|
-- -> do_fork_next
|
--
|
--
|
-- 6 n(r) s_dstw_ind rreq n
|
-- 6 n(r) s_dstw_ind rreq n
|
-- s_dstw_ind_w get n; ea=r+n
|
-- s_dstw_ind_w get n; ea=r+n
|
-- s_dstw_dec1 wreq n(r) check kstack
|
-- s_dstw_dec1 wreq n(r) check kstack
|
-- s_dstw_def_w ack n(r)
|
-- s_dstw_def_w ack n(r)
|
-- -> do_fork_next
|
-- -> do_fork_next
|
--
|
--
|
-- 7 @n(r) s_dstw_ind rreq n
|
-- 7 @n(r) s_dstw_ind rreq n
|
-- s_dstw_ind_w get n; ea=r+n
|
-- s_dstw_ind_w get n; ea=r+n
|
-- s_dstw_dec1 rreq n(r)
|
-- s_dstw_dec1 rreq n(r)
|
-- s_dstw_incdef_w get n(r)
|
-- s_dstw_incdef_w get n(r)
|
-- s_dstw_def246 wreq @n(r)
|
-- s_dstw_def246 wreq @n(r)
|
-- s_dstw_def_w ack @n(r)
|
-- s_dstw_def_w ack @n(r)
|
-- -> do_fork_next
|
-- -> do_fork_next
|
|
|
when s_dstw_def =>
|
when s_dstw_def =>
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
nvmcntl.kstack := is_dstkstack1246;
|
nvmcntl.kstack := is_dstkstack1246;
|
do_memwrite(nstate, nvmcntl, s_dstw_def_w);
|
do_memwrite(nstate, nvmcntl, s_dstw_def_w);
|
|
|
when s_dstw_def_w =>
|
when s_dstw_def_w =>
|
nstate := s_dstw_def_w;
|
nstate := s_dstw_def_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
end if;
|
end if;
|
|
|
when s_dstw_inc =>
|
when s_dstw_inc =>
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST (for else)
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST (for else)
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, DSTDEF, DSTREG); --(...)
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, DSTDEF, DSTREG); --(...)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (for else)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (for else)
|
if DSTDEF = '0' then
|
if DSTDEF = '0' then
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
nvmcntl.kstack := is_dstkstack1246;
|
nvmcntl.kstack := is_dstkstack1246;
|
do_memwrite(nstate, nvmcntl, s_dstw_inc_w);
|
do_memwrite(nstate, nvmcntl, s_dstw_inc_w);
|
nstatus.do_gprwe := '1';
|
nstatus.do_gprwe := '1';
|
else
|
else
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '0';
|
nmmumoni.isdec := '0';
|
do_memread_d(nstate, nvmcntl, s_dstw_incdef_w,
|
do_memread_d(nstate, nvmcntl, s_dstw_incdef_w,
|
is_pci=>R_IDSTAT.is_dstpc);
|
is_pci=>R_IDSTAT.is_dstpc);
|
end if;
|
end if;
|
|
|
when s_dstw_inc_w =>
|
when s_dstw_inc_w =>
|
nstate := s_dstw_inc_w;
|
nstate := s_dstw_inc_w;
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, DSTDEF, DSTREG);
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, DSTDEF, DSTREG);
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_adst := DSTREG;
|
if R_STATUS.do_gprwe = '1' then
|
if R_STATUS.do_gprwe = '1' then
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '0';
|
nmmumoni.isdec := '0';
|
nmmumoni.trace_prev := '1'; -- ssr freeze of prev state
|
nmmumoni.trace_prev := '1'; -- ssr freeze of prev state
|
ndpcntl.gpr_we := '1'; -- update DST reg
|
ndpcntl.gpr_we := '1'; -- update DST reg
|
end if;
|
end if;
|
nstatus.do_gprwe := '0';
|
nstatus.do_gprwe := '0';
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
end if;
|
end if;
|
|
|
when s_dstw_incdef_w =>
|
when s_dstw_incdef_w =>
|
nstate := s_dstw_incdef_w;
|
nstate := s_dstw_incdef_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
nstate := s_dstw_def246;
|
nstate := s_dstw_def246;
|
end if;
|
end if;
|
|
|
when s_dstw_dec =>
|
when s_dstw_dec =>
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, DSTDEF, DSTREG);
|
do_const_opsize(ndpcntl, R_IDSTAT.is_bytop, DSTDEF, DSTREG);
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '1';
|
nmmumoni.isdec := '1';
|
nstate := s_dstw_dec1;
|
nstate := s_dstw_dec1;
|
|
|
when s_dstw_dec1 =>
|
when s_dstw_dec1 =>
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = from idec (for if)
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = from idec (for if)
|
if DSTDEF = '0' then
|
if DSTDEF = '0' then
|
nvmcntl.kstack := is_dstkstack1246;
|
nvmcntl.kstack := is_dstkstack1246;
|
do_memwrite(nstate, nvmcntl, s_dstw_def_w);
|
do_memwrite(nstate, nvmcntl, s_dstw_def_w);
|
else
|
else
|
do_memread_d(nstate, nvmcntl, s_dstw_incdef_w);
|
do_memread_d(nstate, nvmcntl, s_dstw_incdef_w);
|
end if;
|
end if;
|
|
|
when s_dstw_ind =>
|
when s_dstw_ind =>
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.psr_ccwe := '1';
|
do_memread_i(nstate, ndpcntl, nvmcntl, s_dstw_ind_w);
|
do_memread_i(nstate, ndpcntl, nvmcntl, s_dstw_ind_w);
|
|
|
when s_dstw_ind_w =>
|
when s_dstw_ind_w =>
|
nstate := s_dstw_ind_w;
|
nstate := s_dstw_ind_w;
|
if R_IDSTAT.is_dstpc = '0' then
|
if R_IDSTAT.is_dstpc = '0' then
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A = DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A = DDST
|
else
|
else
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC (for nn(pc))
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC (for nn(pc))
|
end if;
|
end if;
|
ndpcntl.ounit_bsel := c_ounit_bsel_vmdout;-- OUNIT B = VMDOUT
|
ndpcntl.ounit_bsel := c_ounit_bsel_vmdout;-- OUNIT B = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
nstate := s_dstw_dec1;
|
nstate := s_dstw_dec1;
|
end if;
|
end if;
|
|
|
when s_dstw_def246 =>
|
when s_dstw_def246 =>
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
do_memwrite(nstate, nvmcntl, s_dstw_def_w);
|
do_memwrite(nstate, nvmcntl, s_dstw_def_w);
|
|
|
-- destination address states -----------------------------------------------
|
-- destination address states -----------------------------------------------
|
-- flows:
|
-- flows:
|
-- 1 (r) -> do_fork_opa
|
-- 1 (r) -> do_fork_opa
|
--
|
--
|
-- 2 (r)+ s_dsta_inc r+=2
|
-- 2 (r)+ s_dsta_inc r+=2
|
-- -> do_fork_opa
|
-- -> do_fork_opa
|
--
|
--
|
-- 3 @(r)+ s_dsta_inc req (r); r+=s
|
-- 3 @(r)+ s_dsta_inc req (r); r+=s
|
-- s_dsta_incdef_w get (r)
|
-- s_dsta_incdef_w get (r)
|
-- -> do_fork_opa
|
-- -> do_fork_opa
|
--
|
--
|
-- 4 -(r) s_dsta_dec r-=s
|
-- 4 -(r) s_dsta_dec r-=s
|
-- s_dsta_dec1 ?? FIXME ?? what is done here ??
|
-- s_dsta_dec1 ?? FIXME ?? what is done here ??
|
-- -> do_fork_opa
|
-- -> do_fork_opa
|
--
|
--
|
-- 5 @-(r) s_dsta_dec r-=s
|
-- 5 @-(r) s_dsta_dec r-=s
|
-- s_dsta_dec1 req (r)
|
-- s_dsta_dec1 req (r)
|
-- s_dsta_incdef_w get (r)
|
-- s_dsta_incdef_w get (r)
|
-- -> do_fork_opa
|
-- -> do_fork_opa
|
--
|
--
|
-- 6 n(r) s_dsta_ind req n
|
-- 6 n(r) s_dsta_ind req n
|
-- s_dsta_ind_w get n; ea=r+n
|
-- s_dsta_ind_w get n; ea=r+n
|
-- s_dsta_dec1 ?? FIXME ?? what is done here ??
|
-- s_dsta_dec1 ?? FIXME ?? what is done here ??
|
-- -> do_fork_opa
|
-- -> do_fork_opa
|
--
|
--
|
-- 7 @n(r) s_dsta_ind req n
|
-- 7 @n(r) s_dsta_ind req n
|
-- s_dsta_ind_w get n; ea=r+n
|
-- s_dsta_ind_w get n; ea=r+n
|
-- s_dsta_dec1 req n(r)
|
-- s_dsta_dec1 req n(r)
|
-- s_dsta_incdef_w get n(r)
|
-- s_dsta_incdef_w get n(r)
|
-- -> do_fork_opa
|
-- -> do_fork_opa
|
|
|
when s_dsta_inc =>
|
when s_dsta_inc =>
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_const := "000000010";
|
ndpcntl.ounit_const := "000000010";
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(2)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(2)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '0';
|
nmmumoni.isdec := '0';
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES (for if)
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES (for if)
|
if R_IDSTAT.updt_dstadsrc = '1' then -- prevent stale DSRC copy
|
if R_IDSTAT.updt_dstadsrc = '1' then -- prevent stale DSRC copy
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
end if;
|
end if;
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
if DSTDEF = '0' then
|
if DSTDEF = '0' then
|
do_fork_opa(nstate, R_IDSTAT);
|
do_fork_opa(nstate, R_IDSTAT);
|
else
|
else
|
do_memread_d(nstate, nvmcntl, s_dsta_incdef_w,
|
do_memread_d(nstate, nvmcntl, s_dsta_incdef_w,
|
is_pci=>R_IDSTAT.is_dstpc);
|
is_pci=>R_IDSTAT.is_dstpc);
|
end if;
|
end if;
|
|
|
when s_dsta_incdef_w =>
|
when s_dsta_incdef_w =>
|
nstate := s_dsta_incdef_w;
|
nstate := s_dsta_incdef_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
do_fork_opa(nstate, R_IDSTAT);
|
do_fork_opa(nstate, R_IDSTAT);
|
end if;
|
end if;
|
|
|
when s_dsta_dec =>
|
when s_dsta_dec =>
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_const := "000000010";
|
ndpcntl.ounit_const := "000000010";
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const(2)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const(2)
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '1';
|
nmmumoni.isdec := '1';
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES (for if)
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES (for if)
|
if R_IDSTAT.updt_dstadsrc = '1' then -- prevent stale DSRC copy
|
if R_IDSTAT.updt_dstadsrc = '1' then -- prevent stale DSRC copy
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
end if;
|
end if;
|
nstate := s_dsta_dec1;
|
nstate := s_dsta_dec1;
|
|
|
when s_dsta_dec1 =>
|
when s_dsta_dec1 =>
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
if DSTDEF = '0' then -- check here used also by
|
if DSTDEF = '0' then -- check here used also by
|
do_fork_opa(nstate, R_IDSTAT); -- s_dsta_ind flow !!
|
do_fork_opa(nstate, R_IDSTAT); -- s_dsta_ind flow !!
|
else
|
else
|
do_memread_d(nstate, nvmcntl, s_dsta_incdef_w);
|
do_memread_d(nstate, nvmcntl, s_dsta_incdef_w);
|
end if;
|
end if;
|
|
|
when s_dsta_ind =>
|
when s_dsta_ind =>
|
do_memread_i(nstate, ndpcntl, nvmcntl, s_dsta_ind_w);
|
do_memread_i(nstate, ndpcntl, nvmcntl, s_dsta_ind_w);
|
|
|
when s_dsta_ind_w =>
|
when s_dsta_ind_w =>
|
nstate := s_dsta_ind_w;
|
nstate := s_dsta_ind_w;
|
if R_IDSTAT.is_dstpc = '0' then
|
if R_IDSTAT.is_dstpc = '0' then
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A = DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A = DDST
|
else
|
else
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC (for nn(pc))
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC (for nn(pc))
|
end if;
|
end if;
|
ndpcntl.ounit_bsel := c_ounit_bsel_vmdout;-- OUNIT B = VMDOUT
|
ndpcntl.ounit_bsel := c_ounit_bsel_vmdout;-- OUNIT B = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.ddst_we := '1'; -- update DDST
|
ndpcntl.ddst_we := '1'; -- update DDST
|
nstate := s_dsta_dec1;
|
nstate := s_dsta_dec1;
|
end if;
|
end if;
|
|
|
-- instruction operate states -----------------------------------------------
|
-- instruction operate states -----------------------------------------------
|
|
|
when s_op_halt => -- HALT
|
when s_op_halt => -- HALT
|
if is_kmode = '1' then -- if in kernel mode execute
|
if is_kmode = '1' then -- if in kernel mode execute
|
nmmumoni.idone := '1';
|
nmmumoni.idone := '1';
|
nstatus.cpugo := '0';
|
nstatus.cpugo := '0';
|
nstatus.cpuhalt := '1';
|
nstatus.cpuhalt := '1';
|
nstatus.cpurust := c_cpurust_halt;
|
nstatus.cpurust := c_cpurust_halt;
|
nstate := s_idle;
|
nstate := s_idle;
|
else -- otherwise trap
|
else -- otherwise trap
|
ncpuerr.illhlt := '1';
|
ncpuerr.illhlt := '1';
|
nstate := s_trap_4; -- trap 4 like 11/70
|
nstate := s_trap_4; -- trap 4 like 11/70
|
end if;
|
end if;
|
|
|
when s_op_wait => -- WAIT
|
when s_op_wait => -- WAIT
|
nstate := s_op_wait; -- spin here
|
nstate := s_op_wait; -- spin here
|
if is_kmode = '0' then -- but act as nop if not in kernel
|
if is_kmode = '0' then -- but act as nop if not in kernel
|
nstate := s_idle;
|
nstate := s_idle;
|
elsif int_pending = '1' or -- bail out if pending interrupt
|
elsif int_pending = '1' or -- bail out if pending interrupt
|
R_STATUS.cpustep='1' then -- or the instruction is only stepped
|
R_STATUS.cpustep='1' then -- or the instruction is only stepped
|
nstate := s_idle;
|
nstate := s_idle;
|
elsif R_STATUS.cmdbusy = '1' then -- suspend if a cp command is pending
|
elsif R_STATUS.cmdbusy = '1' then -- suspend if a cp command is pending
|
nstatus.waitsusp := '1';
|
nstatus.waitsusp := '1';
|
nstate := s_idle;
|
nstate := s_idle;
|
else
|
else
|
nstatus.cpuwait := '1'; -- if spinning here, signal with cpuwait
|
nstatus.cpuwait := '1'; -- if spinning here, signal with cpuwait
|
end if;
|
end if;
|
|
|
when s_op_trap => -- traps
|
when s_op_trap => -- traps
|
lvector := "0000" & R_IDSTAT.trap_vec; -- vector
|
lvector := "0000" & R_IDSTAT.trap_vec; -- vector
|
do_start_int(nstate, ndpcntl, lvector);
|
do_start_int(nstate, ndpcntl, lvector);
|
|
|
when s_op_reset => -- RESET
|
when s_op_reset => -- RESET
|
if is_kmode = '1' then -- if in kernel mode execute
|
if is_kmode = '1' then -- if in kernel mode execute
|
nbreset := '1';
|
nbreset := '1';
|
end if;
|
end if;
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
when s_op_rts => -- RTS
|
when s_op_rts => -- RTS
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_we := '1'; -- load PC with reg(dst)
|
ndpcntl.gpr_we := '1'; -- load PC with reg(dst)
|
nstate := s_op_rts_pop;
|
nstate := s_op_rts_pop;
|
|
|
when s_op_rts_pop =>
|
when s_op_rts_pop =>
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_op_rts_pop_w,
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_op_rts_pop_w,
|
nmmumoni, updt_sp=>'1');
|
nmmumoni, updt_sp=>'1');
|
|
|
when s_op_rts_pop_w =>
|
when s_op_rts_pop_w =>
|
nstate := s_op_rts_pop_w;
|
nstate := s_op_rts_pop_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.gpr_adst := DSTREG;
|
ndpcntl.gpr_adst := DSTREG;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.gpr_we := '1'; -- load R with (SP)+
|
ndpcntl.gpr_we := '1'; -- load R with (SP)+
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
end if;
|
end if;
|
|
|
when s_op_spl => -- SPL
|
when s_op_spl => -- SPL
|
ndpcntl.dres_sel := c_dpath_res_ireg; -- DRES = IREG
|
ndpcntl.dres_sel := c_dpath_res_ireg; -- DRES = IREG
|
ndpcntl.psr_func := c_psr_func_wspl;
|
ndpcntl.psr_func := c_psr_func_wspl;
|
if is_kmode = '1' then -- active only in kernel mode
|
if is_kmode = '1' then -- active only in kernel mode
|
ndpcntl.psr_we := '1';
|
ndpcntl.psr_we := '1';
|
nstate := s_ifetch; -- unconditionally fetch next
|
nstate := s_ifetch; -- unconditionally fetch next
|
-- instruction like a 11/70
|
-- instruction like a 11/70
|
-- no interrupt recognition !
|
-- no interrupt recognition !
|
else
|
else
|
do_fork_next(nstate, nstatus, nmmumoni); -- in non-kernel, noop
|
do_fork_next(nstate, nstatus, nmmumoni); -- in non-kernel, noop
|
end if;
|
end if;
|
|
|
when s_op_mcc => -- CLx/SEx
|
when s_op_mcc => -- CLx/SEx
|
ndpcntl.dres_sel := c_dpath_res_ireg; -- DRES = IREG
|
ndpcntl.dres_sel := c_dpath_res_ireg; -- DRES = IREG
|
ndpcntl.psr_func := c_psr_func_wcc;
|
ndpcntl.psr_func := c_psr_func_wcc;
|
ndpcntl.psr_we := '1';
|
ndpcntl.psr_we := '1';
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
|
|
when s_op_br => -- BR
|
when s_op_br => -- BR
|
nvmcntl.dspace := '0'; -- prepare do_fork_next_pref
|
nvmcntl.dspace := '0'; -- prepare do_fork_next_pref
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC
|
ndpcntl.ounit_bsel := c_ounit_bsel_ireg8;-- OUNIT B = IREG8
|
ndpcntl.ounit_bsel := c_ounit_bsel_ireg8;-- OUNIT B = IREG8
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
-- note: cc are NZVC
|
-- note: cc are NZVC
|
case brcode(3 downto 1) is
|
case brcode(3 downto 1) is
|
when "000" => -- BR
|
when "000" => -- BR
|
brcond := '1';
|
brcond := '1';
|
when "001" => -- BNE/BEQ: if Z = x
|
when "001" => -- BNE/BEQ: if Z = x
|
brcond := PSW.cc(2);
|
brcond := PSW.cc(2);
|
when "010" => -- BGE/BLT: if N xor V = x
|
when "010" => -- BGE/BLT: if N xor V = x
|
brcond := PSW.cc(3) xor PSW.cc(1);
|
brcond := PSW.cc(3) xor PSW.cc(1);
|
when "011" => -- BGT/BLE: if Z or (N xor V) = x
|
when "011" => -- BGT/BLE: if Z or (N xor V) = x
|
brcond := PSW.cc(2) or (PSW.cc(3) xor PSW.cc(1));
|
brcond := PSW.cc(2) or (PSW.cc(3) xor PSW.cc(1));
|
when "100" => -- BPL/BMI: if N = x
|
when "100" => -- BPL/BMI: if N = x
|
brcond := PSW.cc(3);
|
brcond := PSW.cc(3);
|
when "101" => -- BHI/BLOS:if C or Z = x
|
when "101" => -- BHI/BLOS:if C or Z = x
|
brcond := PSW.cc(2) or PSW.cc(0);
|
brcond := PSW.cc(2) or PSW.cc(0);
|
when "110" => -- BVC/BVS: if V = x
|
when "110" => -- BVC/BVS: if V = x
|
brcond := PSW.cc(1);
|
brcond := PSW.cc(1);
|
when "111" => -- BCC/BCS: if C = x
|
when "111" => -- BCC/BCS: if C = x
|
brcond := PSW.cc(0);
|
brcond := PSW.cc(0);
|
when others => null;
|
when others => null;
|
end case;
|
end case;
|
|
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_adst := c_gpr_pc;
|
if brcond = brcode(0) then -- this coding creates redundant code
|
if brcond = brcode(0) then -- this coding creates redundant code
|
ndpcntl.gpr_we := '1'; -- but synthesis optimizes this way !
|
ndpcntl.gpr_we := '1'; -- but synthesis optimizes this way !
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
else
|
else
|
do_fork_next_pref(nstate, nstatus, ndpcntl, nvmcntl, nmmumoni);
|
do_fork_next_pref(nstate, nstatus, ndpcntl, nvmcntl, nmmumoni);
|
end if;
|
end if;
|
|
|
when s_op_mark => -- MARK
|
when s_op_mark => -- MARK
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC
|
ndpcntl.ounit_bsel := c_ounit_bsel_ireg6;-- OUNIT B = IREG6
|
ndpcntl.ounit_bsel := c_ounit_bsel_ireg6;-- OUNIT B = IREG6
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_we := '1'; -- update DSRC (with PC+2*nn)
|
ndpcntl.dsrc_we := '1'; -- update DSRC (with PC+2*nn)
|
ndpcntl.gpr_adst := c_gpr_r5; -- fetch r5
|
ndpcntl.gpr_adst := c_gpr_r5; -- fetch r5
|
ndpcntl.ddst_sel := c_dpath_ddst_dst;
|
ndpcntl.ddst_sel := c_dpath_ddst_dst;
|
ndpcntl.ddst_we := '1';
|
ndpcntl.ddst_we := '1';
|
nstate := s_op_mark1;
|
nstate := s_op_mark1;
|
|
|
when s_op_mark1 =>
|
when s_op_mark1 =>
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A = DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A = DDST
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B = const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B = const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_we := '1'; -- load PC with r5
|
ndpcntl.gpr_we := '1'; -- load PC with r5
|
nstate := s_op_mark_pop;
|
nstate := s_op_mark_pop;
|
|
|
when s_op_mark_pop =>
|
when s_op_mark_pop =>
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_op_mark_pop_w,
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_op_mark_pop_w,
|
nmmumoni, updt_sp=>'1');
|
nmmumoni, updt_sp=>'1');
|
|
|
when s_op_mark_pop_w =>
|
when s_op_mark_pop_w =>
|
nstate := s_op_mark_pop_w;
|
nstate := s_op_mark_pop_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.gpr_adst := c_gpr_r5;
|
ndpcntl.gpr_adst := c_gpr_r5;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.gpr_we := '1'; -- load R5 with (sp)+
|
ndpcntl.gpr_we := '1'; -- load R5 with (sp)+
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
end if;
|
end if;
|
|
|
when s_op_sob => -- SOB (dec)
|
when s_op_sob => -- SOB (dec)
|
-- comment fork_next_pref out (blog 2006-10-02) due to synthesis impact
|
-- comment fork_next_pref out (blog 2006-10-02) due to synthesis impact
|
--nvmcntl.dspace := '0'; -- prepare do_fork_next_pref
|
--nvmcntl.dspace := '0'; -- prepare do_fork_next_pref
|
--ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
--ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
ndpcntl.dres_sel := R_IDSTAT.res_sel;
|
ndpcntl.dres_sel := R_IDSTAT.res_sel;
|
ndpcntl.gpr_adst := SRCREG;
|
ndpcntl.gpr_adst := SRCREG;
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
|
|
if DP_STAT.ccout_z = '0' then -- if z=0 branch, if z=1 fall thru
|
if DP_STAT.ccout_z = '0' then -- if z=0 branch, if z=1 fall thru
|
nstate := s_op_sob1;
|
nstate := s_op_sob1;
|
else
|
else
|
--do_fork_next_pref(nstate, ndpcntl, nvmcntl, nmmumoni);
|
--do_fork_next_pref(nstate, ndpcntl, nvmcntl, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
end if;
|
end if;
|
|
|
when s_op_sob1 => -- SOB (br)
|
when s_op_sob1 => -- SOB (br)
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A = PC
|
ndpcntl.ounit_bsel := c_ounit_bsel_ireg6;-- OUNIT B = IREG6
|
ndpcntl.ounit_bsel := c_ounit_bsel_ireg6;-- OUNIT B = IREG6
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A - B
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A - B
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
|
|
when s_opg_gen =>
|
when s_opg_gen =>
|
nvmcntl.dspace := '0'; -- prepare do_fork_next_pref
|
nvmcntl.dspace := '0'; -- prepare do_fork_next_pref
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
ndpcntl.gpr_bytop := R_IDSTAT.is_bytop;
|
ndpcntl.gpr_bytop := R_IDSTAT.is_bytop;
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
|
|
if R_IDSTAT.op_mov = '1' then -- in case of MOV xx,R
|
if R_IDSTAT.op_mov = '1' then -- in case of MOV xx,R
|
ndpcntl.gpr_bytop := '0'; -- no bytop, do sign extend
|
ndpcntl.gpr_bytop := '0'; -- no bytop, do sign extend
|
end if;
|
end if;
|
|
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.psr_ccwe := '1';
|
|
|
if R_IDSTAT.is_dstw_reg = '1' then
|
if R_IDSTAT.is_dstw_reg = '1' then
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
end if;
|
end if;
|
|
|
if R_IDSTAT.is_rmwop = '1' then
|
if R_IDSTAT.is_rmwop = '1' then
|
do_memwrite(nstate, nvmcntl, s_opg_gen_rmw_w, macc=>'1');
|
do_memwrite(nstate, nvmcntl, s_opg_gen_rmw_w, macc=>'1');
|
else
|
else
|
if R_STATUS.prefdone = '1' then
|
if R_STATUS.prefdone = '1' then
|
nstatus.prefdone :='0';
|
nstatus.prefdone :='0';
|
nstate := s_ifetch_w;
|
nstate := s_ifetch_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.ireg_we := '1';
|
ndpcntl.ireg_we := '1';
|
nstate := s_idecode;
|
nstate := s_idecode;
|
end if;
|
end if;
|
else
|
else
|
if R_IDSTAT.is_dstw_pc = '1' then
|
if R_IDSTAT.is_dstw_pc = '1' then
|
nstate := s_idle;
|
nstate := s_idle;
|
else
|
else
|
do_fork_next_pref(nstate, nstatus, ndpcntl, nvmcntl, nmmumoni);
|
do_fork_next_pref(nstate, nstatus, ndpcntl, nvmcntl, nmmumoni);
|
end if;
|
end if;
|
end if;
|
end if;
|
end if;
|
end if;
|
|
|
when s_opg_gen_rmw_w =>
|
when s_opg_gen_rmw_w =>
|
nstate := s_opg_gen_rmw_w;
|
nstate := s_opg_gen_rmw_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
end if;
|
end if;
|
|
|
when s_opg_mul => -- MUL (oper)
|
when s_opg_mul => -- MUL (oper)
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.gpr_adst := SRCREG; -- write high order result
|
ndpcntl.gpr_adst := SRCREG; -- write high order result
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_we := '1'; -- capture high order part
|
ndpcntl.dsrc_we := '1'; -- capture high order part
|
ndpcntl.dtmp_sel := c_dpath_dtmp_drese; -- DTMP = DRESE
|
ndpcntl.dtmp_sel := c_dpath_dtmp_drese; -- DTMP = DRESE
|
ndpcntl.dtmp_we := '1'; -- capture low order part
|
ndpcntl.dtmp_we := '1'; -- capture low order part
|
nstate := s_opg_mul1;
|
nstate := s_opg_mul1;
|
|
|
when s_opg_mul1 => -- MUL (write odd reg)
|
when s_opg_mul1 => -- MUL (write odd reg)
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A = DTMP
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A = DTMP
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B = const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B = const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := SRCREG(2 downto 1) & "1";-- write odd reg !
|
ndpcntl.gpr_adst := SRCREG(2 downto 1) & "1";-- write odd reg !
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.psr_ccwe := '1';
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
|
|
when s_opg_div => -- DIV (load dd_low)
|
when s_opg_div => -- DIV (load dd_low)
|
ndpcntl.munit_s_div := '1';
|
ndpcntl.munit_s_div := '1';
|
ndpcntl.gpr_asrc := SRCREG(2 downto 1) & "1";-- read odd reg !
|
ndpcntl.gpr_asrc := SRCREG(2 downto 1) & "1";-- read odd reg !
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dsrc;
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dsrc;
|
ndpcntl.dtmp_we := '1';
|
ndpcntl.dtmp_we := '1';
|
nstate := s_opg_div_cn;
|
nstate := s_opg_div_cn;
|
|
|
when s_opg_div_cn => -- DIV (1st...16th cycle)
|
when s_opg_div_cn => -- DIV (1st...16th cycle)
|
ndpcntl.munit_s_div_cn := '1';
|
ndpcntl.munit_s_div_cn := '1';
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dtmp_sel := c_dpath_dtmp_drese; -- DTMP = DRESE
|
ndpcntl.dtmp_sel := c_dpath_dtmp_drese; -- DTMP = DRESE
|
nstate := s_opg_div_cn;
|
nstate := s_opg_div_cn;
|
if DP_STAT.div_zero='1' or DP_STAT.div_ovfl='1' then
|
if DP_STAT.div_zero='1' or DP_STAT.div_ovfl='1' then
|
nstate := s_opg_div_zero;
|
nstate := s_opg_div_zero;
|
else
|
else
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dtmp_we := '1'; -- update DTMP
|
ndpcntl.dtmp_we := '1'; -- update DTMP
|
end if;
|
end if;
|
if DP_STAT.shc_tc = '1' then
|
if DP_STAT.shc_tc = '1' then
|
nstate := s_opg_div_cr;
|
nstate := s_opg_div_cr;
|
end if;
|
end if;
|
|
|
when s_opg_div_cr => -- DIV (reminder correction)
|
when s_opg_div_cr => -- DIV (reminder correction)
|
ndpcntl.munit_s_div_cr := '1';
|
ndpcntl.munit_s_div_cr := '1';
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_we := DP_STAT.div_cr; -- update DSRC
|
ndpcntl.dsrc_we := DP_STAT.div_cr; -- update DSRC
|
nstate := s_opg_div_sq;
|
nstate := s_opg_div_sq;
|
|
|
when s_opg_div_sq => -- DIV (store quotient)
|
when s_opg_div_sq => -- DIV (store quotient)
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A=DTMP
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A=DTMP
|
ndpcntl.ounit_const := "00000000"&DP_STAT.div_cq;-- OUNIT const = Q corr.
|
ndpcntl.ounit_const := "00000000"&DP_STAT.div_cq;-- OUNIT const = Q corr.
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (q cor)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (q cor)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := SRCREG; -- write result
|
ndpcntl.gpr_adst := SRCREG; -- write result
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dres; -- DTMP = DRES
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dres; -- DTMP = DRES
|
ndpcntl.dtmp_we := '1'; -- update DTMP (Q)
|
ndpcntl.dtmp_we := '1'; -- update DTMP (Q)
|
nstate := s_opg_div_sr;
|
nstate := s_opg_div_sr;
|
|
|
when s_opg_div_sr => -- DIV (store reminder)
|
when s_opg_div_sr => -- DIV (store reminder)
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := SRCREG(2 downto 1) & "1";-- write odd reg !
|
ndpcntl.gpr_adst := SRCREG(2 downto 1) & "1";-- write odd reg !
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.psr_ccwe := '1';
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
|
|
when s_opg_div_zero => -- DIV (/0 or 0/ abort)
|
when s_opg_div_zero => -- DIV (/0 or 0/ abort)
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.psr_ccwe := '1';
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
|
|
when s_opg_ash => -- ASH (load shc)
|
when s_opg_ash => -- ASH (load shc)
|
ndpcntl.munit_s_ash := '1';
|
ndpcntl.munit_s_ash := '1';
|
nstate := s_opg_ash_cn;
|
nstate := s_opg_ash_cn;
|
|
|
when s_opg_ash_cn => -- ASH (shift cycles)
|
when s_opg_ash_cn => -- ASH (shift cycles)
|
nvmcntl.dspace := '0'; -- prepare do_fork_next_pref
|
nvmcntl.dspace := '0'; -- prepare do_fork_next_pref
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.gpr_adst := SRCREG; -- write result
|
ndpcntl.gpr_adst := SRCREG; -- write result
|
ndpcntl.munit_s_ash_cn := '1';
|
ndpcntl.munit_s_ash_cn := '1';
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC
|
nstate := s_opg_ash_cn;
|
nstate := s_opg_ash_cn;
|
if DP_STAT.shc_tc = '0' then
|
if DP_STAT.shc_tc = '0' then
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
else
|
else
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.psr_ccwe := '1';
|
do_fork_next_pref(nstate, nstatus, ndpcntl, nvmcntl, nmmumoni);
|
do_fork_next_pref(nstate, nstatus, ndpcntl, nvmcntl, nmmumoni);
|
end if;
|
end if;
|
|
|
when s_opg_ashc => -- ASHC (load low, load shc)
|
when s_opg_ashc => -- ASHC (load low, load shc)
|
ndpcntl.gpr_asrc := SRCREG(2 downto 1) & "1";-- read odd reg !
|
ndpcntl.gpr_asrc := SRCREG(2 downto 1) & "1";-- read odd reg !
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dsrc;
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dsrc;
|
ndpcntl.dtmp_we := '1';
|
ndpcntl.dtmp_we := '1';
|
ndpcntl.munit_s_ashc := '1';
|
ndpcntl.munit_s_ashc := '1';
|
nstate := s_opg_ashc_cn;
|
nstate := s_opg_ashc_cn;
|
|
|
when s_opg_ashc_cn => -- ASHC (shift cycles)
|
when s_opg_ashc_cn => -- ASHC (shift cycles)
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dtmp_sel := c_dpath_dtmp_drese; -- DTMP = DRESE
|
ndpcntl.dtmp_sel := c_dpath_dtmp_drese; -- DTMP = DRESE
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.gpr_adst := SRCREG; -- write result
|
ndpcntl.gpr_adst := SRCREG; -- write result
|
ndpcntl.munit_s_ashc_cn := '1';
|
ndpcntl.munit_s_ashc_cn := '1';
|
nstate := s_opg_ashc_cn;
|
nstate := s_opg_ashc_cn;
|
if DP_STAT.shc_tc = '0' then
|
if DP_STAT.shc_tc = '0' then
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dtmp_we := '1'; -- update DTMP
|
ndpcntl.dtmp_we := '1'; -- update DTMP
|
else
|
else
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
ndpcntl.psr_ccwe := '1';
|
ndpcntl.psr_ccwe := '1';
|
nstate := s_opg_ashc_wl;
|
nstate := s_opg_ashc_wl;
|
end if;
|
end if;
|
|
|
when s_opg_ashc_wl => -- ASHC (write low)
|
when s_opg_ashc_wl => -- ASHC (write low)
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A = DTMP
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A = DTMP
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B = const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B = const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := SRCREG(2 downto 1) & "1";-- write odd reg !
|
ndpcntl.gpr_adst := SRCREG(2 downto 1) & "1";-- write odd reg !
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
|
|
-- dsta mode operations -----------------------------------------------------
|
-- dsta mode operations -----------------------------------------------------
|
|
|
when s_opa_jsr =>
|
when s_opa_jsr =>
|
ndpcntl.gpr_asrc := c_gpr_sp; -- (for else)
|
ndpcntl.gpr_asrc := c_gpr_sp; -- (for else)
|
ndpcntl.dsrc_sel := c_dpath_dsrc_src; -- DSRC = regfile (for else)
|
ndpcntl.dsrc_sel := c_dpath_dsrc_src; -- DSRC = regfile (for else)
|
if R_IDSTAT.is_dstmode0 = '1' then
|
if R_IDSTAT.is_dstmode0 = '1' then
|
nstate := s_trap_10; -- trap 10 like 11/70
|
nstate := s_trap_10; -- trap 10 like 11/70
|
else
|
else
|
ndpcntl.dsrc_we := '1';
|
ndpcntl.dsrc_we := '1';
|
nstate := s_opa_jsr1;
|
nstate := s_opa_jsr1;
|
end if;
|
end if;
|
|
|
when s_opa_jsr1 =>
|
when s_opa_jsr1 =>
|
ndpcntl.gpr_asrc := SRCREG;
|
ndpcntl.gpr_asrc := SRCREG;
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dsrc; -- DTMP = regfile
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dsrc; -- DTMP = regfile
|
ndpcntl.dtmp_we := '1';
|
ndpcntl.dtmp_we := '1';
|
|
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_const := "000000010";
|
ndpcntl.ounit_const := "000000010";
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(2)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(2)
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DDST = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DDST = DRES
|
ndpcntl.dsrc_we := '1'; -- update DDST
|
ndpcntl.dsrc_we := '1'; -- update DDST
|
ndpcntl.gpr_adst := c_gpr_sp;
|
ndpcntl.gpr_adst := c_gpr_sp;
|
ndpcntl.gpr_we := '1'; -- update SP
|
ndpcntl.gpr_we := '1'; -- update SP
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '1';
|
nmmumoni.isdec := '1';
|
nstate := s_opa_jsr_push;
|
nstate := s_opa_jsr_push;
|
|
|
when s_opa_jsr_push =>
|
when s_opa_jsr_push =>
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A=DTMP
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A=DTMP
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
nvmcntl.dspace := '1';
|
nvmcntl.dspace := '1';
|
nvmcntl.kstack := is_kmode;
|
nvmcntl.kstack := is_kmode;
|
nvmcntl.wacc := '1';
|
nvmcntl.wacc := '1';
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
nstate := s_opa_jsr_push_w;
|
nstate := s_opa_jsr_push_w;
|
|
|
when s_opa_jsr_push_w =>
|
when s_opa_jsr_push_w =>
|
nstate := s_opa_jsr_push_w;
|
nstate := s_opa_jsr_push_w;
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A=PC
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A=PC
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := SRCREG;
|
ndpcntl.gpr_adst := SRCREG;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.gpr_we := '1'; -- load R with PC
|
ndpcntl.gpr_we := '1'; -- load R with PC
|
nstate := s_opa_jsr2;
|
nstate := s_opa_jsr2;
|
end if;
|
end if;
|
|
|
when s_opa_jsr2 =>
|
when s_opa_jsr2 =>
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_we := '1'; -- load PC with dsta
|
ndpcntl.gpr_we := '1'; -- load PC with dsta
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
|
|
when s_opa_jmp =>
|
when s_opa_jmp =>
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_adst := c_gpr_pc;
|
if R_IDSTAT.is_dstmode0 = '1' then
|
if R_IDSTAT.is_dstmode0 = '1' then
|
nstate := s_trap_10; -- trap 10 like 11/70
|
nstate := s_trap_10; -- trap 10 like 11/70
|
else
|
else
|
ndpcntl.gpr_we := '1'; -- load PC with dsta
|
ndpcntl.gpr_we := '1'; -- load PC with dsta
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
end if;
|
end if;
|
|
|
when s_opa_mtp =>
|
when s_opa_mtp =>
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_opa_mtp_pop_w,
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_opa_mtp_pop_w,
|
nmmumoni, updt_sp=>'1');
|
nmmumoni, updt_sp=>'1');
|
|
|
when s_opa_mtp_pop_w =>
|
when s_opa_mtp_pop_w =>
|
nstate := s_opa_mtp_pop_w;
|
nstate := s_opa_mtp_pop_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dres; -- DTMP = DRES
|
ndpcntl.dtmp_sel := c_dpath_dtmp_dres; -- DTMP = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.dtmp_we := '1'; -- load DTMP
|
ndpcntl.dtmp_we := '1'; -- load DTMP
|
if R_IDSTAT.is_dstmode0 = '1' then -- handle register access
|
if R_IDSTAT.is_dstmode0 = '1' then -- handle register access
|
nstate := s_opa_mtp_reg;
|
nstate := s_opa_mtp_reg;
|
else
|
else
|
case R_IDSTAT.fork_dsta is -- 2nd dsta fork in s_idecode
|
case R_IDSTAT.fork_dsta is -- 2nd dsta fork in s_idecode
|
when c_fork_dsta_def => nstate := s_opa_mtp_mem;
|
when c_fork_dsta_def => nstate := s_opa_mtp_mem;
|
when c_fork_dsta_inc => nstate := s_dsta_inc;
|
when c_fork_dsta_inc => nstate := s_dsta_inc;
|
when c_fork_dsta_dec => nstate := s_dsta_dec;
|
when c_fork_dsta_dec => nstate := s_dsta_dec;
|
when c_fork_dsta_ind => nstate := s_dsta_ind;
|
when c_fork_dsta_ind => nstate := s_dsta_ind;
|
when others => nstate := s_cpufail;
|
when others => nstate := s_cpufail;
|
end case;
|
end case;
|
end if;
|
end if;
|
end if;
|
end if;
|
ndpcntl.ddst_sel := c_dpath_ddst_dst; -- DDST = R(DST)
|
ndpcntl.ddst_sel := c_dpath_ddst_dst; -- DDST = R(DST)
|
ndpcntl.ddst_we := '1'; -- update DDST (needed for sp)
|
ndpcntl.ddst_we := '1'; -- update DDST (needed for sp)
|
|
|
when s_opa_mtp_reg =>
|
when s_opa_mtp_reg =>
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A = DTMP
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A = DTMP
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B = const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B = const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.psr_ccwe := '1'; -- set cc (from ounit too)
|
ndpcntl.psr_ccwe := '1'; -- set cc (from ounit too)
|
ndpcntl.gpr_mode := PSW.pmode; -- load reg in pmode
|
ndpcntl.gpr_mode := PSW.pmode; -- load reg in pmode
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
|
|
when s_opa_mtp_mem =>
|
when s_opa_mtp_mem =>
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A = DTMP
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A = DTMP
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B = const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B = const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.psr_ccwe := '1'; -- set cc (from ounit too)
|
ndpcntl.psr_ccwe := '1'; -- set cc (from ounit too)
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst;-- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst;-- VA = DDST
|
nvmcntl.dspace := IREG(15); -- msb indicates I/D: 0->I, 1->D
|
nvmcntl.dspace := IREG(15); -- msb indicates I/D: 0->I, 1->D
|
nvmcntl.mode := PSW.pmode;
|
nvmcntl.mode := PSW.pmode;
|
nvmcntl.wacc := '1';
|
nvmcntl.wacc := '1';
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
nstate := s_opa_mtp_mem_w;
|
nstate := s_opa_mtp_mem_w;
|
|
|
when s_opa_mtp_mem_w =>
|
when s_opa_mtp_mem_w =>
|
nstate := s_opa_mtp_mem_w;
|
nstate := s_opa_mtp_mem_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
end if;
|
end if;
|
|
|
when s_opa_mfp_reg =>
|
when s_opa_mfp_reg =>
|
ndpcntl.gpr_mode := PSW.pmode; -- fetch reg in pmode
|
ndpcntl.gpr_mode := PSW.pmode; -- fetch reg in pmode
|
ndpcntl.ddst_sel := c_dpath_ddst_dst; -- DDST = reg(dst)
|
ndpcntl.ddst_sel := c_dpath_ddst_dst; -- DDST = reg(dst)
|
ndpcntl.ddst_we := '1';
|
ndpcntl.ddst_we := '1';
|
nstate := s_opa_mfp_dec;
|
nstate := s_opa_mfp_dec;
|
|
|
when s_opa_mfp_mem =>
|
when s_opa_mfp_mem =>
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST
|
if PSW.cmode=c_psw_umode and -- if cm=pm=user then
|
if PSW.cmode=c_psw_umode and -- if cm=pm=user then
|
PSW.cmode=c_psw_umode then -- MFPI works like it
|
PSW.cmode=c_psw_umode then -- MFPI works like it
|
nvmcntl.dspace := '1'; -- were MFPD
|
nvmcntl.dspace := '1'; -- were MFPD
|
else
|
else
|
nvmcntl.dspace := IREG(15); -- msb indicates I/D: 0->I, 1->D
|
nvmcntl.dspace := IREG(15); -- msb indicates I/D: 0->I, 1->D
|
end if;
|
end if;
|
nvmcntl.mode := PSW.pmode;
|
nvmcntl.mode := PSW.pmode;
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
nstate := s_opa_mfp_mem_w;
|
nstate := s_opa_mfp_mem_w;
|
|
|
when s_opa_mfp_mem_w =>
|
when s_opa_mfp_mem_w =>
|
nstate := s_opa_mfp_mem_w;
|
nstate := s_opa_mfp_mem_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
if imemok then
|
if imemok then
|
ndpcntl.ddst_we := '1';
|
ndpcntl.ddst_we := '1';
|
nstate := s_opa_mfp_dec;
|
nstate := s_opa_mfp_dec;
|
end if;
|
end if;
|
|
|
when s_opa_mfp_dec =>
|
when s_opa_mfp_dec =>
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_const := "000000010";
|
ndpcntl.ounit_const := "000000010";
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(2)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(2)
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.gpr_adst := c_gpr_sp;
|
ndpcntl.gpr_adst := c_gpr_sp;
|
ndpcntl.gpr_we := '1'; -- update SP
|
ndpcntl.gpr_we := '1'; -- update SP
|
nmmumoni.regmod := '1';
|
nmmumoni.regmod := '1';
|
nmmumoni.isdec := '1';
|
nmmumoni.isdec := '1';
|
nstate := s_opa_mfp_push;
|
nstate := s_opa_mfp_push;
|
|
|
when s_opa_mfp_push =>
|
when s_opa_mfp_push =>
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.psr_ccwe := '1'; -- set cc (from ounit too)
|
ndpcntl.psr_ccwe := '1'; -- set cc (from ounit too)
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
nvmcntl.dspace := '1';
|
nvmcntl.dspace := '1';
|
nvmcntl.kstack := is_kmode;
|
nvmcntl.kstack := is_kmode;
|
nvmcntl.wacc := '1';
|
nvmcntl.wacc := '1';
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
nstate := s_opa_mfp_push_w;
|
nstate := s_opa_mfp_push_w;
|
|
|
when s_opa_mfp_push_w =>
|
when s_opa_mfp_push_w =>
|
nstate := s_opa_mfp_push_w;
|
nstate := s_opa_mfp_push_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
end if;
|
end if;
|
|
|
-- trap and interrupt handling states ---------------------------------------
|
-- trap and interrupt handling states ---------------------------------------
|
|
|
when s_trap_4 =>
|
when s_trap_4 =>
|
lvector := "0000001"; -- vector (4)
|
lvector := "0000001"; -- vector (4)
|
do_start_int(nstate, ndpcntl, lvector);
|
do_start_int(nstate, ndpcntl, lvector);
|
|
|
when s_trap_10 =>
|
when s_trap_10 =>
|
lvector := "0000010"; -- vector (10)
|
lvector := "0000010"; -- vector (10)
|
do_start_int(nstate, ndpcntl, lvector);
|
do_start_int(nstate, ndpcntl, lvector);
|
|
|
when s_trap_disp =>
|
when s_trap_disp =>
|
if R_STATUS.trap_mmu = '1' then
|
if R_STATUS.trap_mmu = '1' then
|
nvmcntl.trap_done := '1'; -- mmu trap taken: set ssr0 trap bit
|
nvmcntl.trap_done := '1'; -- mmu trap taken: set ssr0 trap bit
|
lvector := "0101010"; -- mmu trap: vector (250)
|
lvector := "0101010"; -- mmu trap: vector (250)
|
elsif R_STATUS.trap_ysv = '1' then
|
elsif R_STATUS.trap_ysv = '1' then
|
lvector := "0000001"; -- ysv trap: vector (4)
|
lvector := "0000001"; -- ysv trap: vector (4)
|
ncpuerr.ysv := '1';
|
ncpuerr.ysv := '1';
|
else
|
else
|
lvector := "0000011"; -- trace trap: vector (14)
|
lvector := "0000011"; -- trace trap: vector (14)
|
end if;
|
end if;
|
nstatus.trap_mmu := '0'; -- clear pending trap flags
|
nstatus.trap_mmu := '0'; -- clear pending trap flags
|
nstatus.trap_ysv := '0'; --
|
nstatus.trap_ysv := '0'; --
|
do_start_int(nstate, ndpcntl, lvector);
|
do_start_int(nstate, ndpcntl, lvector);
|
|
|
when s_int_ext =>
|
when s_int_ext =>
|
lvector := R_STATUS.intvect; -- external vector
|
lvector := R_STATUS.intvect; -- external vector
|
do_start_int(nstate, ndpcntl, lvector);
|
do_start_int(nstate, ndpcntl, lvector);
|
|
|
when s_int_getpc =>
|
when s_int_getpc =>
|
nvmcntl.mode := c_psw_kmode; -- fetch PC from kernel D space
|
nvmcntl.mode := c_psw_kmode; -- fetch PC from kernel D space
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_int_getpc_w, nmmumoni);
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_int_getpc_w, nmmumoni);
|
|
|
when s_int_getpc_w =>
|
when s_int_getpc_w =>
|
nstate := s_int_getpc_w;
|
nstate := s_int_getpc_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if VM_STAT.err = '1' then -- in case of vm-err
|
if VM_STAT.err = '1' then -- in case of vm-err
|
nstatus.cpugo := '0'; -- non-recoverable error
|
nstatus.cpugo := '0'; -- non-recoverable error
|
nstatus.cpurust := c_cpurust_vecfet; -- halt CPU
|
nstatus.cpurust := c_cpurust_vecfet; -- halt CPU
|
nstate := s_idle;
|
nstate := s_idle;
|
end if;
|
end if;
|
if imemok then
|
if imemok then
|
ndpcntl.ddst_we := '1'; -- DDST = new PC
|
ndpcntl.ddst_we := '1'; -- DDST = new PC
|
nstate := s_int_getps;
|
nstate := s_int_getps;
|
end if;
|
end if;
|
|
|
when s_int_getps =>
|
when s_int_getps =>
|
nvmcntl.mode := c_psw_kmode; -- fetch PS from kernel D space
|
nvmcntl.mode := c_psw_kmode; -- fetch PS from kernel D space
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_int_getps_w, nmmumoni);
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_int_getps_w, nmmumoni);
|
|
|
when s_int_getps_w =>
|
when s_int_getps_w =>
|
nstate := s_int_getps_w;
|
nstate := s_int_getps_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.psr_func := c_psr_func_wint; -- interupt mode write
|
ndpcntl.psr_func := c_psr_func_wint; -- interupt mode write
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if VM_STAT.err = '1' then -- in case of vm-err
|
if VM_STAT.err = '1' then -- in case of vm-err
|
nstatus.cpugo := '0'; -- non-recoverable error
|
nstatus.cpugo := '0'; -- non-recoverable error
|
nstatus.cpurust := c_cpurust_vecfet; -- halt CPU
|
nstatus.cpurust := c_cpurust_vecfet; -- halt CPU
|
nstate := s_idle;
|
nstate := s_idle;
|
end if;
|
end if;
|
if imemok then
|
if imemok then
|
ndpcntl.psr_we := '1'; -- store new PS
|
ndpcntl.psr_we := '1'; -- store new PS
|
nstate := s_int_getsp;
|
nstate := s_int_getsp;
|
end if;
|
end if;
|
|
|
when s_int_getsp =>
|
when s_int_getsp =>
|
ndpcntl.gpr_asrc := c_gpr_sp;
|
ndpcntl.gpr_asrc := c_gpr_sp;
|
ndpcntl.dsrc_we := '1'; -- DSRC = SP (in new mode)
|
ndpcntl.dsrc_we := '1'; -- DSRC = SP (in new mode)
|
nstate := s_int_decsp;
|
nstate := s_int_decsp;
|
|
|
when s_int_decsp =>
|
when s_int_decsp =>
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_const := "000000010"; -- OUNIT const=2
|
ndpcntl.ounit_const := "000000010"; -- OUNIT const=2
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.gpr_adst := c_gpr_sp;
|
ndpcntl.gpr_adst := c_gpr_sp;
|
ndpcntl.gpr_we := '1'; -- update SP too
|
ndpcntl.gpr_we := '1'; -- update SP too
|
nstate := s_int_pushps;
|
nstate := s_int_pushps;
|
|
|
when s_int_pushps =>
|
when s_int_pushps =>
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A=DTMP (old PS)
|
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A=DTMP (old PS)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
nvmcntl.wacc := '1'; -- write mem
|
nvmcntl.wacc := '1'; -- write mem
|
nvmcntl.dspace := '1';
|
nvmcntl.dspace := '1';
|
nvmcntl.kstack := is_kmode;
|
nvmcntl.kstack := is_kmode;
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
nstate := s_int_pushps_w;
|
nstate := s_int_pushps_w;
|
|
|
when s_int_pushps_w =>
|
when s_int_pushps_w =>
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
|
ndpcntl.ounit_const := "000000010"; -- OUNIT const=2
|
ndpcntl.ounit_const := "000000010"; -- OUNIT const=2
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.ounit_opsub := '1'; -- OUNIT = A-B
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
|
ndpcntl.gpr_adst := c_gpr_sp;
|
ndpcntl.gpr_adst := c_gpr_sp;
|
|
|
nstate := s_int_pushps_w;
|
nstate := s_int_pushps_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.dsrc_we := '1'; -- update DSRC
|
ndpcntl.gpr_we := '1'; -- update SP too
|
ndpcntl.gpr_we := '1'; -- update SP too
|
nstate := s_int_pushpc;
|
nstate := s_int_pushpc;
|
end if;
|
end if;
|
|
|
when s_int_pushpc =>
|
when s_int_pushpc =>
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A=PC
|
ndpcntl.ounit_asel := c_ounit_asel_pc; -- OUNIT A=PC
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC
|
nvmcntl.wacc := '1'; -- write mem
|
nvmcntl.wacc := '1'; -- write mem
|
nvmcntl.dspace := '1';
|
nvmcntl.dspace := '1';
|
nvmcntl.kstack := is_kmode;
|
nvmcntl.kstack := is_kmode;
|
nvmcntl.req := '1';
|
nvmcntl.req := '1';
|
nstate := s_int_pushpc_w;
|
nstate := s_int_pushpc_w;
|
|
|
when s_int_pushpc_w =>
|
when s_int_pushpc_w =>
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_adst := c_gpr_pc;
|
|
|
nstate := s_int_pushpc_w;
|
nstate := s_int_pushpc_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
nstatus.do_intrsv := '0'; -- signal end of rsv
|
nstatus.do_intrsv := '0'; -- signal end of rsv
|
ndpcntl.gpr_we := '1'; -- load new PC
|
ndpcntl.gpr_we := '1'; -- load new PC
|
do_fork_next(nstate, nstatus, nmmumoni); -- ???
|
do_fork_next(nstate, nstatus, nmmumoni); -- ???
|
end if;
|
end if;
|
|
|
-- return from trap or interrupt handling states ----------------------------
|
-- return from trap or interrupt handling states ----------------------------
|
|
|
when s_rti_getpc =>
|
when s_rti_getpc =>
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_rti_getpc_w,
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_rti_getpc_w,
|
nmmumoni, updt_sp=>'1');
|
nmmumoni, updt_sp=>'1');
|
|
|
when s_rti_getpc_w =>
|
when s_rti_getpc_w =>
|
nstate := s_rti_getpc_w;
|
nstate := s_rti_getpc_w;
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
ndpcntl.ddst_sel := c_dpath_ddst_res; -- DDST = DRES
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
if imemok then
|
if imemok then
|
ndpcntl.ddst_we := '1'; -- DDST = new PC
|
ndpcntl.ddst_we := '1'; -- DDST = new PC
|
nstate := s_rti_getps;
|
nstate := s_rti_getps;
|
end if;
|
end if;
|
|
|
when s_rti_getps =>
|
when s_rti_getps =>
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_rti_getps_w,
|
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_rti_getps_w,
|
nmmumoni, updt_sp=>'1');
|
nmmumoni, updt_sp=>'1');
|
|
|
when s_rti_getps_w =>
|
when s_rti_getps_w =>
|
nstate := s_rti_getps_w;
|
nstate := s_rti_getps_w;
|
do_memcheck(nstate, nstatus, imemok);
|
do_memcheck(nstate, nstatus, imemok);
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
|
if is_kmode = '1' then -- if in kernel mode
|
if is_kmode = '1' then -- if in kernel mode
|
ndpcntl.psr_func := c_psr_func_wall; -- write all fields
|
ndpcntl.psr_func := c_psr_func_wall; -- write all fields
|
else
|
else
|
ndpcntl.psr_func := c_psr_func_wrti; -- otherwise filter
|
ndpcntl.psr_func := c_psr_func_wrti; -- otherwise filter
|
end if;
|
end if;
|
if imemok then
|
if imemok then
|
ndpcntl.psr_we := '1'; -- load new PS
|
ndpcntl.psr_we := '1'; -- load new PS
|
nstate := s_rti_newpc;
|
nstate := s_rti_newpc;
|
end if;
|
end if;
|
|
|
when s_rti_newpc =>
|
when s_rti_newpc =>
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (0)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (0)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_adst := c_gpr_pc;
|
ndpcntl.gpr_we := '1'; -- load new PC
|
ndpcntl.gpr_we := '1'; -- load new PC
|
if R_IDSTAT.op_rtt = '1' then -- if RTT instruction
|
if R_IDSTAT.op_rtt = '1' then -- if RTT instruction
|
nstate := s_ifetch; -- force fetch
|
nstate := s_ifetch; -- force fetch
|
else -- otherwise RTI
|
else -- otherwise RTI
|
do_fork_next(nstate, nstatus, nmmumoni);
|
do_fork_next(nstate, nstatus, nmmumoni);
|
end if;
|
end if;
|
|
|
-- exception abort states ---------------------------------------------------
|
-- exception abort states ---------------------------------------------------
|
|
|
when s_vmerr =>
|
when s_vmerr =>
|
nstate := s_cpufail;
|
nstate := s_cpufail;
|
|
|
-- setup for R_VMSTAT.err_rsv='1'
|
-- setup for R_VMSTAT.err_rsv='1'
|
ndpcntl.ounit_azero := '1'; -- OUNIT A = 0
|
ndpcntl.ounit_azero := '1'; -- OUNIT A = 0
|
ndpcntl.ounit_const := "000000100"; -- emergency stack pointer
|
ndpcntl.ounit_const := "000000100"; -- emergency stack pointer
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(vector)
|
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const(vector)
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
|
ndpcntl.gpr_mode := c_psw_kmode; -- set kmode SP to 4
|
ndpcntl.gpr_mode := c_psw_kmode; -- set kmode SP to 4
|
ndpcntl.gpr_adst := c_gpr_sp;
|
ndpcntl.gpr_adst := c_gpr_sp;
|
|
|
nstatus.trap_mmu :='0'; -- drop pending mmu trap
|
nstatus.trap_mmu :='0'; -- drop pending mmu trap
|
|
|
if R_VMSTAT.fail = '1' then -- vmbox failure
|
if R_VMSTAT.fail = '1' then -- vmbox failure
|
nstatus.cpugo := '0'; -- halt cpu
|
nstatus.cpugo := '0'; -- halt cpu
|
nstatus.cpurust := c_cpurust_vfail;
|
nstatus.cpurust := c_cpurust_vfail;
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
elsif R_STATUS.do_intrsv = '1' then -- double error
|
elsif R_STATUS.do_intrsv = '1' then -- double error
|
nstatus.cpugo := '0'; -- give up, HALT cpu
|
nstatus.cpugo := '0'; -- give up, HALT cpu
|
nstatus.cpurust := c_cpurust_recrsv;
|
nstatus.cpurust := c_cpurust_recrsv;
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
elsif R_VMSTAT.err = '1' then -- normal vm errors
|
elsif R_VMSTAT.err = '1' then -- normal vm errors
|
if R_VMSTAT.err_rsv = '1' then
|
if R_VMSTAT.err_rsv = '1' then
|
nstatus.do_intrsv := '1'; -- signal start of rsv
|
nstatus.do_intrsv := '1'; -- signal start of rsv
|
ndpcntl.gpr_we := '1';
|
ndpcntl.gpr_we := '1';
|
|
|
if R_VMSTAT.err_odd='1' or R_VMSTAT.err_mmu='1' then
|
if R_VMSTAT.err_odd='1' or R_VMSTAT.err_mmu='1' then
|
ncpuerr.adderr := '1';
|
ncpuerr.adderr := '1';
|
elsif R_VMSTAT.err_nxm = '1' then
|
elsif R_VMSTAT.err_nxm = '1' then
|
ncpuerr.nxm := '1';
|
ncpuerr.nxm := '1';
|
elsif R_VMSTAT.err_iobto = '1' then
|
elsif R_VMSTAT.err_iobto = '1' then
|
ncpuerr.iobto := '1';
|
ncpuerr.iobto := '1';
|
end if;
|
end if;
|
ncpuerr.rsv := '1';
|
ncpuerr.rsv := '1';
|
nstate := s_trap_4;
|
nstate := s_trap_4;
|
|
|
elsif R_VMSTAT.err_odd = '1' then
|
elsif R_VMSTAT.err_odd = '1' then
|
ncpuerr.adderr := '1';
|
ncpuerr.adderr := '1';
|
nstate := s_trap_4;
|
nstate := s_trap_4;
|
elsif R_VMSTAT.err_nxm = '1' then
|
elsif R_VMSTAT.err_nxm = '1' then
|
ncpuerr.nxm := '1';
|
ncpuerr.nxm := '1';
|
nstate := s_trap_4;
|
nstate := s_trap_4;
|
elsif R_VMSTAT.err_iobto = '1' then
|
elsif R_VMSTAT.err_iobto = '1' then
|
ncpuerr.iobto := '1';
|
ncpuerr.iobto := '1';
|
nstate := s_trap_4;
|
nstate := s_trap_4;
|
|
|
elsif R_VMSTAT.err_mmu = '1' then
|
elsif R_VMSTAT.err_mmu = '1' then
|
lvector := "0101010"; -- vector (250)
|
lvector := "0101010"; -- vector (250)
|
do_start_int(nstate, ndpcntl, lvector);
|
do_start_int(nstate, ndpcntl, lvector);
|
end if;
|
end if;
|
end if;
|
end if;
|
|
|
when s_cpufail =>
|
when s_cpufail =>
|
nstatus.cpugo := '0';
|
nstatus.cpugo := '0';
|
nstatus.cpurust := c_cpurust_sfail;
|
nstatus.cpurust := c_cpurust_sfail;
|
nstate := s_idle;
|
nstate := s_idle;
|
|
|
when others =>
|
when others =>
|
nstate := s_cpufail; --!!! catch undefined states !!!
|
nstate := s_cpufail; --!!! catch undefined states !!!
|
|
|
end case;
|
end case;
|
|
|
if nstatus.cmdack = '1' then -- cmdack in next cycle ? Yes we test
|
if nstatus.cmdack = '1' then -- cmdack in next cycle ? Yes we test
|
-- nstatus here !!
|
-- nstatus here !!
|
nstatus.cmdbusy := '0';
|
nstatus.cmdbusy := '0';
|
ndpcntl.cpdout_we := '1';
|
ndpcntl.cpdout_we := '1';
|
end if;
|
end if;
|
|
|
N_STATE <= nstate;
|
N_STATE <= nstate;
|
N_STATUS <= nstatus;
|
N_STATUS <= nstatus;
|
N_CPUERR <= ncpuerr;
|
N_CPUERR <= ncpuerr;
|
N_IDSTAT <= nidstat;
|
N_IDSTAT <= nidstat;
|
|
|
CRESET <= ncreset;
|
CRESET <= ncreset;
|
BRESET <= nbreset;
|
BRESET <= nbreset;
|
INT_ACK <= nintack;
|
INT_ACK <= nintack;
|
|
|
DP_CNTL <= ndpcntl;
|
DP_CNTL <= ndpcntl;
|
VM_CNTL <= nvmcntl;
|
VM_CNTL <= nvmcntl;
|
|
|
nmmumoni.regnum := ndpcntl.gpr_adst;
|
nmmumoni.regnum := ndpcntl.gpr_adst;
|
nmmumoni.delta := ndpcntl.ounit_const(3 downto 0);
|
nmmumoni.delta := ndpcntl.ounit_const(3 downto 0);
|
MMU_MONI <= nmmumoni;
|
MMU_MONI <= nmmumoni;
|
|
|
end process proc_next;
|
end process proc_next;
|
|
|
proc_cpstat : process (R_STATUS)
|
proc_cpstat : process (R_STATUS)
|
begin
|
begin
|
CP_STAT <= cp_stat_init;
|
CP_STAT <= cp_stat_init;
|
CP_STAT.cmdbusy <= R_STATUS.cmdbusy;
|
CP_STAT.cmdbusy <= R_STATUS.cmdbusy;
|
CP_STAT.cmdack <= R_STATUS.cmdack;
|
CP_STAT.cmdack <= R_STATUS.cmdack;
|
CP_STAT.cmderr <= R_STATUS.cmderr;
|
CP_STAT.cmderr <= R_STATUS.cmderr;
|
CP_STAT.cmdmerr <= R_STATUS.cmdmerr;
|
CP_STAT.cmdmerr <= R_STATUS.cmdmerr;
|
CP_STAT.cpugo <= R_STATUS.cpugo;
|
CP_STAT.cpugo <= R_STATUS.cpugo;
|
CP_STAT.cpustep <= R_STATUS.cpustep;
|
CP_STAT.cpustep <= R_STATUS.cpustep;
|
CP_STAT.cpuhalt <= R_STATUS.cpuhalt;
|
CP_STAT.cpuhalt <= R_STATUS.cpuhalt;
|
CP_STAT.cpuwait <= R_STATUS.cpuwait;
|
CP_STAT.cpuwait <= R_STATUS.cpuwait;
|
CP_STAT.cpurust <= R_STATUS.cpurust;
|
CP_STAT.cpurust <= R_STATUS.cpurust;
|
end process proc_cpstat;
|
end process proc_cpstat;
|
|
|
end syn;
|
end syn;
|
|
|
|
|