#!/usr/bin/perl -w
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#!/usr/bin/perl -w
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# $Id: vbomconv 558 2014-06-01 22:20:51Z mueller $
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# $Id: vbomconv 558 2014-06-01 22:20:51Z mueller $
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#
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#
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# Copyright 2007-2013 by Walter F.J. Mueller
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# Copyright 2007-2013 by Walter F.J. Mueller
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#
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#
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# This program is free software; you may redistribute and/or modify it under
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# This program is free software; you may redistribute and/or modify it under
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# the terms of the GNU General Public License as published by the Free
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# the terms of the GNU General Public License as published by the Free
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# Software Foundation, either version 2, or at your option any later version.
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# Software Foundation, either version 2, or at your option any later version.
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#
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#
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# This program is distributed in the hope that it will be useful, but
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# This program is distributed in the hope that it will be useful, but
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# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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# for complete details.
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# for complete details.
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#
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#
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# Revision History:
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# Revision History:
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# Date Rev Version Comment
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# Date Rev Version Comment
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# 2013-10-20 543 1.10 add --viv_vhdl
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# 2013-10-20 543 1.10 add --viv_vhdl
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# 2012-02-05 456 1.9.4 redo filename substitution (= and :); add --get_top
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# 2012-02-05 456 1.9.4 redo filename substitution (= and :); add --get_top
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# 2012-01-02 448 1.9.3 use in ghdl_m -fexplicit also when simprim used
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# 2012-01-02 448 1.9.3 use in ghdl_m -fexplicit also when simprim used
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# 2011-11-27 433 1.9.2 use in ghdl_m -fexplicit when unisim used
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# 2011-11-27 433 1.9.2 use in ghdl_m -fexplicit when unisim used
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# 2011-08-13 405 1.9.1 always write 'vhdl' into xst prj files again; for
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# 2011-08-13 405 1.9.1 always write 'vhdl' into xst prj files again; for
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# -xst_export: remove opt file export, add ucf_cpp
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# -xst_export: remove opt file export, add ucf_cpp
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# handling
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# handling
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# 2011-06-26 385 1.9 add --ise_path, pass it to vbomconv --xst_prj
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# 2011-06-26 385 1.9 add --ise_path, pass it to vbomconv --xst_prj
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# 2011-06-09 383 1.8.6 fix xst_vhdl.opt logic (use rtl/vlib now)
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# 2011-06-09 383 1.8.6 fix xst_vhdl.opt logic (use rtl/vlib now)
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# 2010-07-03 312 1.8.5 add --flist action
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# 2010-07-03 312 1.8.5 add --flist action
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# 2010-06-03 299 1.8.4 generate ucf->ncd dependencies in dep_xst
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# 2010-06-03 299 1.8.4 generate ucf->ncd dependencies in dep_xst
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# 2010-04-26 284 1.8.3 add _[sft]sim support for ISim
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# 2010-04-26 284 1.8.3 add _[sft]sim support for ISim
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# 2009-11-28 253 1.8.2 fixup print_help...;
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# 2009-11-28 253 1.8.2 fixup print_help...;
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# 2009-11-22 252 1.8.1 add (export|dep)_isim, full ISim support;
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# 2009-11-22 252 1.8.1 add (export|dep)_isim, full ISim support;
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# add [isim] [sim], allow tag lists like [ghdl,isim];
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# add [isim] [sim], allow tag lists like [ghdl,isim];
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# --trace and messages to STDERR;
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# --trace and messages to STDERR;
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# 2009-11-20 251 1.8 add isim_prj, first ISim support
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# 2009-11-20 251 1.8 add isim_prj, first ISim support
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# 2008-03-09 124 1.7.3 add in .dep_(ghdl|xst) all dep on vbom dependencies
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# 2008-03-09 124 1.7.3 add in .dep_(ghdl|xst) all dep on vbom dependencies
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# target now also dependant on .dep_ file
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# target now also dependant on .dep_ file
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# 2008-03-02 122 1.7.2 add @lib: directive to include UNISIM
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# 2008-03-02 122 1.7.2 add @lib: directive to include UNISIM
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# 2007-12-17 102 1.7.1 fix @ucf_cpp logic.
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# 2007-12-17 102 1.7.1 fix @ucf_cpp logic.
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# 2007-12-16 101 1.7 add @ucf_cpp pseudo tag (handle cpp'ed ucf files)
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# 2007-12-16 101 1.7 add @ucf_cpp pseudo tag (handle cpp'ed ucf files)
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# 2007-11-25 98 1.6.1 drop trailing blanks on input lines
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# 2007-11-25 98 1.6.1 drop trailing blanks on input lines
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# 2007-11-02 94 1.6 added (xst|ghdl)_export
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# 2007-11-02 94 1.6 added (xst|ghdl)_export
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# 2007-10-26 92 1.5.1 emit '--no-vital-checks' for --ghdl_m for _[sft]sim
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# 2007-10-26 92 1.5.1 emit '--no-vital-checks' for --ghdl_m for _[sft]sim
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# 2007-10-14 98 1.5 handle .exe files under cycwin properly
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# 2007-10-14 98 1.5 handle .exe files under cycwin properly
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# 2007-09-15 82 1.4 handle C source objects properly
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# 2007-09-15 82 1.4 handle C source objects properly
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# 2007-08-10 72 1.3 add [xst], [ghdl] prefix support
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# 2007-08-10 72 1.3 add [xst], [ghdl] prefix support
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# 2007-07-22 68 1.2 add "tag = val"; list files in 'ready to analyse'
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# 2007-07-22 68 1.2 add "tag = val"; list files in 'ready to analyse'
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# order; add --ghdl_a option
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# order; add --ghdl_a option
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# 2007-07-08 65 1.1 add "tag : names"; inferral of _[ft]sim vboms
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# 2007-07-08 65 1.1 add "tag : names"; inferral of _[ft]sim vboms
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# 2007-07-06 64 1.0 Initial version
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# 2007-07-06 64 1.0 Initial version
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use 5.005; # require Perl 5.005 or higher
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use 5.005; # require Perl 5.005 or higher
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use strict; # require strict checking
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use strict; # require strict checking
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use FileHandle;
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use FileHandle;
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use Getopt::Long;
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use Getopt::Long;
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my %opts = ();
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my %opts = ();
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GetOptions(\%opts, "help", "trace", "ise_path=s",
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GetOptions(\%opts, "help", "trace", "ise_path=s",
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"dep_xst", "dep_ghdl", "dep_isim",
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"dep_xst", "dep_ghdl", "dep_isim",
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"xst_prj", "isim_prj",
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"xst_prj", "isim_prj",
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"viv_vhdl",
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"viv_vhdl",
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"ghdl_a", "ghdl_a_cmd",
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"ghdl_a", "ghdl_a_cmd",
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"ghdl_i", "ghdl_i_cmd",
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"ghdl_i", "ghdl_i_cmd",
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"ghdl_m", "ghdl_m_cmd",
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"ghdl_m", "ghdl_m_cmd",
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"xst_export=s",
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"xst_export=s",
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"ghdl_export=s",
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"ghdl_export=s",
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"isim_export=s",
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"isim_export=s",
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"get_top",
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"get_top",
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"flist") || exit 1;
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"flist") || exit 1;
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sub print_help;
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sub print_help;
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sub read_vbom;
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sub read_vbom;
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sub scan_vbom;
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sub scan_vbom;
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sub copy_edir;
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sub copy_edir;
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sub write_vbomdep;
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sub write_vbomdep;
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sub canon_fname;
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sub canon_fname;
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my @vbom_list;
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my @vbom_list;
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my @file_list;
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my @file_list;
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my %vbom_tbl;
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my %vbom_tbl;
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my %file_tbl;
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my %file_tbl;
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my %read_tbl;
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my %read_tbl;
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my %para_tbl;
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my %para_tbl;
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my @ucf_cpp_list;
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my @ucf_cpp_list;
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my $is_xst = 0; # XST synthesis target
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my $is_xst = 0; # XST synthesis target
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my $is_ghdl = 0; # ghdl simulation target
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my $is_ghdl = 0; # ghdl simulation target
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my $is_isim = 0; # ISim simulation target
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my $is_isim = 0; # ISim simulation target
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my $is_sim = 0; # simulation target (generic)
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my $is_sim = 0; # simulation target (generic)
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my $is_any = 0;
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my $is_any = 0;
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my $nactions = 0;
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my $nactions = 0;
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my $top_vbom;
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my $top_vbom;
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my $stem;
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my $stem;
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my $top;
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my $top;
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my $top_done = 0;
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my $top_done = 0;
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my $has_unisim;
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my $has_unisim;
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my $has_simprim;
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my $has_simprim;
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my $is_ssim;
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my $is_ssim;
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my $is_fsim;
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my $is_fsim;
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my $is_tsim;
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my $is_tsim;
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my $do_trace = exists $opts{trace};
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my $do_trace = exists $opts{trace};
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my $level;
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my $level;
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my $xst_writevhdl = 1;
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my $xst_writevhdl = 1;
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# now using '-ifmt mixed', so language always needed (2011-08-13)
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# now using '-ifmt mixed', so language always needed (2011-08-13)
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#if (defined $opts{ise_path}) {
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#if (defined $opts{ise_path}) {
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# if ($opts{ise_path} =~ /^xc6s/) {
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# if ($opts{ise_path} =~ /^xc6s/) {
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# $xst_writevhdl = 0;
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# $xst_writevhdl = 0;
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# }
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# }
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#}
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#}
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autoflush STDOUT 1; # autoflush, so noting lost on exec later
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autoflush STDOUT 1; # autoflush, so noting lost on exec later
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if (exists $opts{help}) {
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if (exists $opts{help}) {
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print_help;
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print_help;
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exit 0;
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exit 0;
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}
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}
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# ensure that one and only one vbom is specified
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# ensure that one and only one vbom is specified
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if (scalar(@ARGV) != 1) {
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if (scalar(@ARGV) != 1) {
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print STDERR "%vbomconv-E: only one vbom file name allowed\n\n";
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print STDERR "%vbomconv-E: only one vbom file name allowed\n\n";
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print_help;
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print_help;
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exit 1;
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exit 1;
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}
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}
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# check that only one action is defined, mark xst, gdhl, or isim class
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# check that only one action is defined, mark xst, gdhl, or isim class
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foreach (keys %opts) {
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foreach (keys %opts) {
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$nactions += 1 unless ($_ eq "trace" || $_ eq "ise_path");
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$nactions += 1 unless ($_ eq "trace" || $_ eq "ise_path");
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$is_xst = 1 if ($_ eq "dep_xst");
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$is_xst = 1 if ($_ eq "dep_xst");
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$is_ghdl = 1 if ($_ eq "dep_ghdl");
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$is_ghdl = 1 if ($_ eq "dep_ghdl");
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$is_isim = 1 if ($_ eq "dep_isim");
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$is_isim = 1 if ($_ eq "dep_isim");
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$is_xst = 1 if ($_ =~ /^xst_/);
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$is_xst = 1 if ($_ =~ /^xst_/);
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$is_ghdl = 1 if ($_ =~ /^ghdl_/);
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$is_ghdl = 1 if ($_ =~ /^ghdl_/);
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$is_isim = 1 if ($_ =~ /^isim_/);
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$is_isim = 1 if ($_ =~ /^isim_/);
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$is_any = 1 if ($_ eq "flist");
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$is_any = 1 if ($_ eq "flist");
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}
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}
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$is_sim = $is_ghdl | $is_isim;
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$is_sim = $is_ghdl | $is_isim;
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print STDERR "-- [xst] active\n" if $do_trace && $is_xst;
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print STDERR "-- [xst] active\n" if $do_trace && $is_xst;
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print STDERR "-- [ghdl] active\n" if $do_trace && $is_ghdl;
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print STDERR "-- [ghdl] active\n" if $do_trace && $is_ghdl;
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print STDERR "-- [isim] active\n" if $do_trace && $is_isim;
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print STDERR "-- [isim] active\n" if $do_trace && $is_isim;
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print STDERR "-- [sim] active\n" if $do_trace && $is_sim;
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print STDERR "-- [sim] active\n" if $do_trace && $is_sim;
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if ($nactions > 1) {
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if ($nactions > 1) {
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print STDERR "%vbomconv-E: only one action qualifier allowed\n\n";
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print STDERR "%vbomconv-E: only one action qualifier allowed\n\n";
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print_help;
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print_help;
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exit 1;
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exit 1;
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}
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}
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$top_vbom = $ARGV[0];
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$top_vbom = $ARGV[0];
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$top_vbom .= ".vbom" unless $top_vbom =~ m{\.vbom$};
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$top_vbom .= ".vbom" unless $top_vbom =~ m{\.vbom$};
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$stem = $top_vbom;
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$stem = $top_vbom;
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$stem =~ s{\..*$}{};
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$stem =~ s{\..*$}{};
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$top = $stem;
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$top = $stem;
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$top =~ s{^.*/}{};
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$top =~ s{^.*/}{};
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# now prepare virtual _fsim and _tsim vbom's
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# now prepare virtual _fsim and _tsim vbom's
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# they are inferred from the _ssim vbom's
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# they are inferred from the _ssim vbom's
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if ($top_vbom =~ m{_ssim\.vbom$}) { # detect _ssim
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if ($top_vbom =~ m{_ssim\.vbom$}) { # detect _ssim
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$is_ssim = 1;
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$is_ssim = 1;
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}
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}
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if ($top_vbom =~ m{_fsim\.vbom$}) { # map _fsim -> _ssim
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if ($top_vbom =~ m{_fsim\.vbom$}) { # map _fsim -> _ssim
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$is_fsim = 1;
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$is_fsim = 1;
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$top_vbom =~ s{_fsim\.vbom$}{_ssim.vbom};
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$top_vbom =~ s{_fsim\.vbom$}{_ssim.vbom};
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}
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}
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if ($top_vbom =~ m{_tsim\.vbom$}) { # map _tsim -> _ssim
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if ($top_vbom =~ m{_tsim\.vbom$}) { # map _tsim -> _ssim
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$is_tsim = 1;
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$is_tsim = 1;
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$top_vbom =~ s{_tsim\.vbom$}{_ssim.vbom};
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$top_vbom =~ s{_tsim\.vbom$}{_ssim.vbom};
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}
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}
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# traverse all vbom's start with command line argument
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# traverse all vbom's start with command line argument
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push @vbom_list, $top_vbom;
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push @vbom_list, $top_vbom;
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while (@vbom_list) {
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while (@vbom_list) {
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my $cur_vbom = shift @vbom_list;
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my $cur_vbom = shift @vbom_list;
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read_vbom($cur_vbom);
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read_vbom($cur_vbom);
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}
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}
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# traverse internal vbom representation to build file table
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# traverse internal vbom representation to build file table
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scan_vbom($top_vbom);
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scan_vbom($top_vbom);
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# sort file table, build file list (decreasing rank)
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# sort file table, build file list (decreasing rank)
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my @pair_list;
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my @pair_list;
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foreach (keys %file_tbl) {
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foreach (keys %file_tbl) {
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push @pair_list, [$file_tbl{$_}, $_];
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push @pair_list, [$file_tbl{$_}, $_];
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}
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}
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@file_list = map {$_->[1]} sort {$b->[0] <=> $a->[0]} @pair_list;
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@file_list = map {$_->[1]} sort {$b->[0] <=> $a->[0]} @pair_list;
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# now generate output and actions, depending on options given
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# now generate output and actions, depending on options given
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# --trace ------------------------------------------------------------
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# --trace ------------------------------------------------------------
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if ($do_trace) {
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if ($do_trace) {
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print STDERR "\n";
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print STDERR "\n";
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print STDERR "filename substitution table:\n";
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print STDERR "filename substitution table:\n";
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foreach (sort keys %para_tbl) {
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foreach (sort keys %para_tbl) {
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print STDERR " $_ = $para_tbl{$_}\n";
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print STDERR " $_ = $para_tbl{$_}\n";
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}
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}
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print STDERR "final file_list:\n";
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print STDERR "final file_list:\n";
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foreach (@file_list) {
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foreach (@file_list) {
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print STDERR " $_\n";
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print STDERR " $_\n";
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}
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}
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print STDERR "properties:\n";
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print STDERR "properties:\n";
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print STDERR " \@top: $top\n";
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print STDERR " \@top: $top\n";
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}
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}
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# --ghdh_a -- ghdl analysis command ----------------------------------
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# --ghdh_a -- ghdl analysis command ----------------------------------
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if (exists $opts{ghdl_a} || exists $opts{ghdl_a_cmd}) {
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if (exists $opts{ghdl_a} || exists $opts{ghdl_a_cmd}) {
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foreach (@file_list) {
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foreach (@file_list) {
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my $file = $_;
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my $file = $_;
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my $cmd = "ghdl -a";
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my $cmd = "ghdl -a";
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$cmd .= ' -P$XILINX/ghdl/unisim' if $has_unisim;
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$cmd .= ' -P$XILINX/ghdl/unisim' if $has_unisim;
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$cmd .= ' -P$XILINX/ghdl/simprim' if $has_simprim;
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$cmd .= ' -P$XILINX/ghdl/simprim' if $has_simprim;
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$cmd .= " --ieee=synopsys";
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$cmd .= " --ieee=synopsys";
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$cmd .= " $file";
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$cmd .= " $file";
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print "$cmd\n";
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print "$cmd\n";
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if (exists $opts{ghdl_a}) {
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if (exists $opts{ghdl_a}) {
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my $wrc = system "/bin/sh", "-c", $cmd;
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my $wrc = system "/bin/sh", "-c", $cmd;
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if ($wrc != 0) {
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if ($wrc != 0) {
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my $rc = int($wrc/256);
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my $rc = int($wrc/256);
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if ($rc == 0) {
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if ($rc == 0) {
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my $sig = $wrc % 256;
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my $sig = $wrc % 256;
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print STDERR "%vbomconv-I: compilation aborted by signal $sig\n";
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print STDERR "%vbomconv-I: compilation aborted by signal $sig\n";
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exit(1);
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exit(1);
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} else {
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} else {
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print STDERR "%vbomconv-I: compilation failed (rc=$rc) $?\n";
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print STDERR "%vbomconv-I: compilation failed (rc=$rc) $?\n";
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exit($rc);
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exit($rc);
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}
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}
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}
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}
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}
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}
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}
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}
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}
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}
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# --ghdh_i -- ghdl inspection command --------------------------------
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# --ghdh_i -- ghdl inspection command --------------------------------
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if (exists $opts{ghdl_i} || exists $opts{ghdl_i_cmd}) {
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if (exists $opts{ghdl_i} || exists $opts{ghdl_i_cmd}) {
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my %ghdl_work;
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my %ghdl_work;
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# read ghdl "work-obj93.cf" file. It has the format
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# read ghdl "work-obj93.cf" file. It has the format
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# file . "" "" "ghdl -i or -a date>":
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# file . "" "" "ghdl -i or -a date>":
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# entity at nn( nn) + nn on nn;
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# entity at nn( nn) + nn on nn;
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# architecture of at nn( nn) + nn on nn;
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# architecture of at nn( nn) + nn on nn;
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|
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if (-r "work-obj93.cf") {
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if (-r "work-obj93.cf") {
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open (WFILE, "work-obj93.cf") or
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open (WFILE, "work-obj93.cf") or
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die "can't open for read work-obj93.cf: $!";
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die "can't open for read work-obj93.cf: $!";
|
while () {
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while () {
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if (m{^file \. \"(.*?)\"}) {
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if (m{^file \. \"(.*?)\"}) {
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$ghdl_work{$1} = 1;
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$ghdl_work{$1} = 1;
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}
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}
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}
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}
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close (WFILE);
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close (WFILE);
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}
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}
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|
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my $cmd = "ghdl -i";
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my $cmd = "ghdl -i";
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my $nfile = 0;
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my $nfile = 0;
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|
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foreach (@file_list) {
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foreach (@file_list) {
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next if /\.c$/; # skip C sources, only vhd handled
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next if /\.c$/; # skip C sources, only vhd handled
|
if (not exists $ghdl_work{$_}) {
|
if (not exists $ghdl_work{$_}) {
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$cmd .= " \\\n $_";
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$cmd .= " \\\n $_";
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$nfile += 1;
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$nfile += 1;
|
}
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}
|
}
|
}
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|
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if ($nfile) {
|
if ($nfile) {
|
print "$cmd\n";
|
print "$cmd\n";
|
if (exists $opts{ghdl_i}) {
|
if (exists $opts{ghdl_i}) {
|
exec "/bin/sh", "-c", $cmd;
|
exec "/bin/sh", "-c", $cmd;
|
die "failed to exec /bin/sh -c $cmd: $!";
|
die "failed to exec /bin/sh -c $cmd: $!";
|
}
|
}
|
} else {
|
} else {
|
print "# $cmd ## all files already inspected\n";
|
print "# $cmd ## all files already inspected\n";
|
}
|
}
|
}
|
}
|
|
|
# --ghdh_m -- ghdl make command --------------------------------------
|
# --ghdh_m -- ghdl make command --------------------------------------
|
# Note: the 'buildin' make used by the -m option of ghdl does not
|
# Note: the 'buildin' make used by the -m option of ghdl does not
|
# check for object files linked with -Wl, e.g. vhpi objects.
|
# check for object files linked with -Wl, e.g. vhpi objects.
|
# To force a re-elaboration the old executable is deleted first.
|
# To force a re-elaboration the old executable is deleted first.
|
# If used from make with proper dependencies, this will just do
|
# If used from make with proper dependencies, this will just do
|
# the right thing.
|
# the right thing.
|
|
|
if (exists $opts{ghdl_m} || exists $opts{ghdl_m_cmd} ) {
|
if (exists $opts{ghdl_m} || exists $opts{ghdl_m_cmd} ) {
|
my $cmd = "";
|
my $cmd = "";
|
|
|
if (-r "$stem.exe") { # check for .exe, in case we are in cygwin
|
if (-r "$stem.exe") { # check for .exe, in case we are in cygwin
|
$cmd .= "rm $stem.exe\n"; # rm old executable to force elaboration
|
$cmd .= "rm $stem.exe\n"; # rm old executable to force elaboration
|
} elsif (-r $stem) { # otherwise
|
} elsif (-r $stem) { # otherwise
|
$cmd .= "rm $stem\n" ; # rm old executable to force elaboration
|
$cmd .= "rm $stem\n" ; # rm old executable to force elaboration
|
}
|
}
|
|
|
$cmd .= "ghdl -m";
|
$cmd .= "ghdl -m";
|
$cmd .= " -o $stem";
|
$cmd .= " -o $stem";
|
# -fexplicit needed for ISE 13.1,13.3
|
# -fexplicit needed for ISE 13.1,13.3
|
$cmd .= ' -fexplicit' if $has_unisim or $has_simprim;
|
$cmd .= ' -fexplicit' if $has_unisim or $has_simprim;
|
$cmd .= ' -P$XILINX/ghdl/unisim' if $has_unisim;
|
$cmd .= ' -P$XILINX/ghdl/unisim' if $has_unisim;
|
$cmd .= ' -P$XILINX/ghdl/simprim' if $has_simprim;
|
$cmd .= ' -P$XILINX/ghdl/simprim' if $has_simprim;
|
$cmd .= " --ieee=synopsys";
|
$cmd .= " --ieee=synopsys";
|
$cmd .= " --no-vital-checks" if $is_ssim or $is_fsim or $is_tsim;
|
$cmd .= " --no-vital-checks" if $is_ssim or $is_fsim or $is_tsim;
|
|
|
foreach (@file_list) {
|
foreach (@file_list) {
|
next unless /\.c$/; # C source ?
|
next unless /\.c$/; # C source ?
|
my $ofile = $_; # copy to break alias for following s///
|
my $ofile = $_; # copy to break alias for following s///
|
$ofile =~ s{^.*/}{}; # remove directory path
|
$ofile =~ s{^.*/}{}; # remove directory path
|
$ofile =~ s/\.c$/.o/; # add clause to link C source object file
|
$ofile =~ s/\.c$/.o/; # add clause to link C source object file
|
$cmd .= " -Wl,$ofile";
|
$cmd .= " -Wl,$ofile";
|
}
|
}
|
$cmd .= " $top";
|
$cmd .= " $top";
|
print "$cmd\n";
|
print "$cmd\n";
|
if (exists $opts{ghdl_m}) {
|
if (exists $opts{ghdl_m}) {
|
exec "/bin/sh", "-c", $cmd;
|
exec "/bin/sh", "-c", $cmd;
|
die "failed to exec /bin/sh -c $cmd: $!";
|
die "failed to exec /bin/sh -c $cmd: $!";
|
}
|
}
|
}
|
}
|
|
|
# --xst_prj ----------------------------------------------------------
|
# --xst_prj ----------------------------------------------------------
|
|
|
if (exists $opts{xst_prj}) {
|
if (exists $opts{xst_prj}) {
|
foreach (@file_list) {
|
foreach (@file_list) {
|
if ($xst_writevhdl) {
|
if ($xst_writevhdl) {
|
print "vhdl work $_\n";
|
print "vhdl work $_\n";
|
} else {
|
} else {
|
print "work $_\n"; # for ISE S-6/V-6 compilations with '-ifmt VHDL'
|
print "work $_\n"; # for ISE S-6/V-6 compilations with '-ifmt VHDL'
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
# --isim_prj ---------------------------------------------------------
|
# --isim_prj ---------------------------------------------------------
|
|
|
if (exists $opts{isim_prj}) {
|
if (exists $opts{isim_prj}) {
|
foreach (@file_list) {
|
foreach (@file_list) {
|
print "vhdl work $_\n";
|
print "vhdl work $_\n";
|
}
|
}
|
}
|
}
|
|
|
# --viv_vhdl ---------------------------------------------------------
|
# --viv_vhdl ---------------------------------------------------------
|
|
|
if (exists $opts{viv_vhdl}) {
|
if (exists $opts{viv_vhdl}) {
|
print "read_vhdl {\n";
|
print "read_vhdl {\n";
|
foreach (@file_list) {
|
foreach (@file_list) {
|
print " $_\n";
|
print " $_\n";
|
}
|
}
|
print "}\n";
|
print "}\n";
|
}
|
}
|
|
|
# --dep_xst ----------------------------------------------------------
|
# --dep_xst ----------------------------------------------------------
|
|
|
if (exists $opts{dep_xst}) {
|
if (exists $opts{dep_xst}) {
|
print "#\n";
|
print "#\n";
|
print "$stem.ngc : $stem.dep_xst\n";
|
print "$stem.ngc : $stem.dep_xst\n";
|
print "#\n";
|
print "#\n";
|
foreach (@file_list) {
|
foreach (@file_list) {
|
print "$stem.ngc : $_\n";
|
print "$stem.ngc : $_\n";
|
}
|
}
|
# handle cpp preprocessed ucf's
|
# handle cpp preprocessed ucf's
|
foreach (@ucf_cpp_list) {
|
foreach (@ucf_cpp_list) {
|
my $file = $_;
|
my $file = $_;
|
$file =~ s/\.ucf$//;
|
$file =~ s/\.ucf$//;
|
print "#\n";
|
print "#\n";
|
print "$file.ncd : $file.ucf\n";
|
print "$file.ncd : $file.ucf\n";
|
print "include $file.dep_ucf_cpp\n";
|
print "include $file.dep_ucf_cpp\n";
|
}
|
}
|
# handle plain ucf's
|
# handle plain ucf's
|
if (scalar(@ucf_cpp_list)==0 && -r "$stem.ucf") {
|
if (scalar(@ucf_cpp_list)==0 && -r "$stem.ucf") {
|
print "#\n";
|
print "#\n";
|
print "$stem.ncd : $stem.ucf\n";
|
print "$stem.ncd : $stem.ucf\n";
|
}
|
}
|
write_vbomdep("$stem.dep_xst");
|
write_vbomdep("$stem.dep_xst");
|
}
|
}
|
|
|
# --dep_ghdl ---------------------------------------------------------
|
# --dep_ghdl ---------------------------------------------------------
|
|
|
if (exists $opts{dep_ghdl}) {
|
if (exists $opts{dep_ghdl}) {
|
|
|
my $stem_fsim = $stem;
|
my $stem_fsim = $stem;
|
my $stem_tsim = $stem;
|
my $stem_tsim = $stem;
|
$stem_fsim =~ s/_ssim$/_fsim/;
|
$stem_fsim =~ s/_ssim$/_fsim/;
|
$stem_tsim =~ s/_ssim$/_tsim/;
|
$stem_tsim =~ s/_ssim$/_tsim/;
|
|
|
print "#\n";
|
print "#\n";
|
print "$stem : $stem.dep_ghdl\n";
|
print "$stem : $stem.dep_ghdl\n";
|
if ($is_ssim) {
|
if ($is_ssim) {
|
print "$stem_fsim : $stem.dep_ghdl\n";
|
print "$stem_fsim : $stem.dep_ghdl\n";
|
print "$stem_tsim : $stem.dep_ghdl\n";
|
print "$stem_tsim : $stem.dep_ghdl\n";
|
}
|
}
|
print "#\n";
|
print "#\n";
|
|
|
foreach (@file_list) {
|
foreach (@file_list) {
|
if (/\.c$/) {
|
if (/\.c$/) {
|
my $ofile = $_; # copy to break alias for following s///
|
my $ofile = $_; # copy to break alias for following s///
|
$ofile =~ s{^.*/}{}; # remove directory path
|
$ofile =~ s{^.*/}{}; # remove directory path
|
$ofile =~ s/\.c$/.o/; # object file name
|
$ofile =~ s/\.c$/.o/; # object file name
|
print "$stem : $ofile\n"; # depend on C source object file
|
print "$stem : $ofile\n"; # depend on C source object file
|
# C source object compilation dependence
|
# C source object compilation dependence
|
open (ODEPFILE, ">$ofile.dep_ghdl") or
|
open (ODEPFILE, ">$ofile.dep_ghdl") or
|
die "can't write $ofile.dep_ghdl: $!";
|
die "can't write $ofile.dep_ghdl: $!";
|
print ODEPFILE "$ofile : $_\n";
|
print ODEPFILE "$ofile : $_\n";
|
print ODEPFILE "\t\$(COMPILE.c) \$(OUTPUT_OPTION) \$<\n";
|
print ODEPFILE "\t\$(COMPILE.c) \$(OUTPUT_OPTION) \$<\n";
|
close ODEPFILE;
|
close ODEPFILE;
|
} else {
|
} else {
|
print "$stem : $_\n";
|
print "$stem : $_\n";
|
}
|
}
|
}
|
}
|
|
|
if ($is_ssim) {
|
if ($is_ssim) {
|
|
|
foreach (@file_list) {
|
foreach (@file_list) {
|
my $file = $_; # copy to break alias for following s///
|
my $file = $_; # copy to break alias for following s///
|
if (/\.c$/) {
|
if (/\.c$/) {
|
$file =~ s{^.*/}{}; # remove directory path
|
$file =~ s{^.*/}{}; # remove directory path
|
$file =~ s/\.c$/.o/; # depend on object file for C sources
|
$file =~ s/\.c$/.o/; # depend on object file for C sources
|
} else {
|
} else {
|
$file =~ s/_ssim\.vhd$/_fsim.vhd/;
|
$file =~ s/_ssim\.vhd$/_fsim.vhd/;
|
}
|
}
|
print "$stem_fsim : $file\n";
|
print "$stem_fsim : $file\n";
|
}
|
}
|
|
|
foreach (@file_list) {
|
foreach (@file_list) {
|
my $file = $_; # copy to break alias for following s///
|
my $file = $_; # copy to break alias for following s///
|
if (/\.c$/) {
|
if (/\.c$/) {
|
$file =~ s{^.*/}{}; # remove directory path
|
$file =~ s{^.*/}{}; # remove directory path
|
$file =~ s/\.c$/.o/; # depend on object file for C sources
|
$file =~ s/\.c$/.o/; # depend on object file for C sources
|
} else {
|
} else {
|
$file =~ s/_ssim\.vhd$/_tsim.vhd/;
|
$file =~ s/_ssim\.vhd$/_tsim.vhd/;
|
}
|
}
|
print "$stem_tsim : $file\n";
|
print "$stem_tsim : $file\n";
|
}
|
}
|
|
|
}
|
}
|
|
|
write_vbomdep("$stem.dep_ghdl");
|
write_vbomdep("$stem.dep_ghdl");
|
|
|
}
|
}
|
|
|
# --dep_isim ---------------------------------------------------------
|
# --dep_isim ---------------------------------------------------------
|
|
|
if (exists $opts{dep_isim}) {
|
if (exists $opts{dep_isim}) {
|
my $stem_isim = $stem . "_ISim";
|
my $stem_isim = $stem . "_ISim";
|
|
|
$stem_isim =~ s/_ssim_ISim$/_ISim_ssim/ if ($is_ssim);
|
$stem_isim =~ s/_ssim_ISim$/_ISim_ssim/ if ($is_ssim);
|
|
|
my $stem_fsim_isim = $stem_isim;
|
my $stem_fsim_isim = $stem_isim;
|
my $stem_tsim_isim = $stem_isim;
|
my $stem_tsim_isim = $stem_isim;
|
$stem_fsim_isim =~ s/_ssim$/_fsim/;
|
$stem_fsim_isim =~ s/_ssim$/_fsim/;
|
$stem_tsim_isim =~ s/_ssim$/_tsim/;
|
$stem_tsim_isim =~ s/_ssim$/_tsim/;
|
|
|
print "#\n";
|
print "#\n";
|
print "$stem_isim : $stem.dep_isim\n";
|
print "$stem_isim : $stem.dep_isim\n";
|
if ($is_ssim) {
|
if ($is_ssim) {
|
print "$stem_fsim_isim : $stem.dep_isim\n";
|
print "$stem_fsim_isim : $stem.dep_isim\n";
|
print "$stem_tsim_isim : $stem.dep_isim\n";
|
print "$stem_tsim_isim : $stem.dep_isim\n";
|
}
|
}
|
print "#\n";
|
print "#\n";
|
|
|
foreach (@file_list) {
|
foreach (@file_list) {
|
print "$stem_isim : $_\n";
|
print "$stem_isim : $_\n";
|
}
|
}
|
|
|
if ($is_ssim) {
|
if ($is_ssim) {
|
|
|
foreach (@file_list) {
|
foreach (@file_list) {
|
my $file = $_; # copy to break alias for following s///
|
my $file = $_; # copy to break alias for following s///
|
$file =~ s/_ssim\.vhd$/_fsim.vhd/;
|
$file =~ s/_ssim\.vhd$/_fsim.vhd/;
|
print "$stem_fsim_isim : $file\n";
|
print "$stem_fsim_isim : $file\n";
|
}
|
}
|
|
|
foreach (@file_list) {
|
foreach (@file_list) {
|
my $file = $_; # copy to break alias for following s///
|
my $file = $_; # copy to break alias for following s///
|
$file =~ s/_ssim\.vhd$/_tsim.vhd/;
|
$file =~ s/_ssim\.vhd$/_tsim.vhd/;
|
print "$stem_tsim_isim : $file\n";
|
print "$stem_tsim_isim : $file\n";
|
}
|
}
|
|
|
}
|
}
|
|
|
write_vbomdep("$stem.dep_isim");
|
write_vbomdep("$stem.dep_isim");
|
}
|
}
|
|
|
# --xst_export or ghdl_export or isim_export -------------------------
|
# --xst_export or ghdl_export or isim_export -------------------------
|
|
|
if (exists $opts{xst_export} or
|
if (exists $opts{xst_export} or
|
exists $opts{ghdl_export} or
|
exists $opts{ghdl_export} or
|
exists $opts{isim_export}) {
|
exists $opts{isim_export}) {
|
my $edir;
|
my $edir;
|
$edir = $opts{xst_export} if exists $opts{xst_export};
|
$edir = $opts{xst_export} if exists $opts{xst_export};
|
$edir = $opts{ghdl_export} if exists $opts{ghdl_export};
|
$edir = $opts{ghdl_export} if exists $opts{ghdl_export};
|
$edir = $opts{isim_export} if exists $opts{isim_export};
|
$edir = $opts{isim_export} if exists $opts{isim_export};
|
|
|
if (not -d $edir) {
|
if (not -d $edir) {
|
print STDERR "%vbomconv-I: create target directory $edir\n";
|
print STDERR "%vbomconv-I: create target directory $edir\n";
|
system("mkdir -p $edir") == 0 or die "mkdir failed: $?";
|
system("mkdir -p $edir") == 0 or die "mkdir failed: $?";
|
} else {
|
} else {
|
print STDERR "%vbomconv-I: target directory $edir already exists\n";
|
print STDERR "%vbomconv-I: target directory $edir already exists\n";
|
}
|
}
|
|
|
open(PFILE, ">$edir/$stem.prj") or die "can't write open $edir/$stem.prj: $!";
|
open(PFILE, ">$edir/$stem.prj") or die "can't write open $edir/$stem.prj: $!";
|
|
|
foreach (@file_list) {
|
foreach (@file_list) {
|
my $fname = $_;
|
my $fname = $_;
|
my $fdpath = ".";
|
my $fdpath = ".";
|
if (m{(.*)/(.*)}) {
|
if (m{(.*)/(.*)}) {
|
$fname = $2;
|
$fname = $2;
|
$fdpath = $1;
|
$fdpath = $1;
|
}
|
}
|
copy_edir($_, $edir);
|
copy_edir($_, $edir);
|
print PFILE "vhdl work $fname\n";
|
print PFILE "vhdl work $fname\n";
|
}
|
}
|
|
|
close(PFILE);
|
close(PFILE);
|
|
|
# Note: currently no xflow opt files exported !!
|
# Note: currently no xflow opt files exported !!
|
if (exists $opts{xst_export}) {
|
if (exists $opts{xst_export}) {
|
open(XFILE, ">$edir/$stem.xcf") or
|
open(XFILE, ">$edir/$stem.xcf") or
|
die "can't write open $edir/$stem.xcf: $!";
|
die "can't write open $edir/$stem.xcf: $!";
|
close(XFILE);
|
close(XFILE);
|
|
|
foreach(glob("*.xcf")) { copy_edir($_, $edir); }
|
foreach(glob("*.xcf")) { copy_edir($_, $edir); }
|
|
|
if (-r "$stem.ucf_cpp") {
|
if (-r "$stem.ucf_cpp") {
|
system "/bin/sh", "-c", "make $stem.ucf";
|
system "/bin/sh", "-c", "make $stem.ucf";
|
}
|
}
|
|
|
foreach(glob("*.ucf")) { copy_edir($_, $edir); }
|
foreach(glob("*.ucf")) { copy_edir($_, $edir); }
|
}
|
}
|
|
|
}
|
}
|
|
|
# --get_top ----------------------------------------------------------
|
# --get_top ----------------------------------------------------------
|
|
|
if (exists $opts{get_top}) {
|
if (exists $opts{get_top}) {
|
print "$top\n";
|
print "$top\n";
|
}
|
}
|
|
|
# --flist ------------------------------------------------------------
|
# --flist ------------------------------------------------------------
|
|
|
if (exists $opts{flist}) {
|
if (exists $opts{flist}) {
|
|
|
my @flist;
|
my @flist;
|
|
|
push @flist, @file_list;
|
push @flist, @file_list;
|
push @flist, sort keys %read_tbl;
|
push @flist, sort keys %read_tbl;
|
|
|
if (scalar(@ucf_cpp_list)) {
|
if (scalar(@ucf_cpp_list)) {
|
foreach (@ucf_cpp_list) {
|
foreach (@ucf_cpp_list) {
|
push @flist, $_."_cpp";
|
push @flist, $_."_cpp";
|
}
|
}
|
} else {
|
} else {
|
if (-r "$stem.ucf") {
|
if (-r "$stem.ucf") {
|
push @flist, "$stem.ucf";
|
push @flist, "$stem.ucf";
|
}
|
}
|
}
|
}
|
|
|
foreach (sort @flist) {
|
foreach (sort @flist) {
|
my $fname = $_;
|
my $fname = $_;
|
my $fdpath = ".";
|
my $fdpath = ".";
|
if (m{(.*)/(.*)}) {
|
if (m{(.*)/(.*)}) {
|
$fname = $2;
|
$fname = $2;
|
$fdpath = $1;
|
$fdpath = $1;
|
}
|
}
|
print "$fdpath/$fname\n";
|
print "$fdpath/$fname\n";
|
}
|
}
|
|
|
}
|
}
|
|
|
#-------------------------------------------------------------------------------
|
#-------------------------------------------------------------------------------
|
|
|
sub read_vbom {
|
sub read_vbom {
|
my ($vbom) = @_;
|
my ($vbom) = @_;
|
|
|
print STDERR "-- open $vbom\n" if $do_trace;
|
print STDERR "-- open $vbom\n" if $do_trace;
|
|
|
open (IFILE, $vbom) or die "can't open for read $vbom: $!";
|
open (IFILE, $vbom) or die "can't open for read $vbom: $!";
|
|
|
my $vbom_path = "";
|
my $vbom_path = "";
|
my $vbom_file = $vbom;
|
my $vbom_file = $vbom;
|
if ($vbom =~ m{^(.*)/([a-zA-Z0-9_.]*)$}) {
|
if ($vbom =~ m{^(.*)/([a-zA-Z0-9_.]*)$}) {
|
$vbom_path = $1;
|
$vbom_path = $1;
|
$vbom_file = $2;
|
$vbom_file = $2;
|
}
|
}
|
|
|
$read_tbl{$vbom} += 1; # mark this vbom already read
|
$read_tbl{$vbom} += 1; # mark this vbom already read
|
|
|
while () {
|
while () {
|
chomp;
|
chomp;
|
next if /^\s*#/; # drop comments
|
next if /^\s*#/; # drop comments
|
next if /^\s*$/; # drop empty lines
|
next if /^\s*$/; # drop empty lines
|
|
|
s/\s*$//; # drop trailing blanks
|
s/\s*$//; # drop trailing blanks
|
|
|
# process parameter definitions
|
# process parameter definitions
|
if (m{([\w]+)\s*=\s*(.*)}) {
|
if (m{([\w]+)\s*=\s*(.*)}) {
|
my $para = $1;
|
my $para = $1;
|
my $val = $2;
|
my $val = $2;
|
if ($val eq "") {
|
if ($val eq "") {
|
print STDERR "%vbomconv-E: invalid \'$_\' in $vbom_file\n";
|
print STDERR "%vbomconv-E: invalid \'$_\' in $vbom_file\n";
|
exit 1;
|
exit 1;
|
}
|
}
|
if (not exists $para_tbl{$para}) {
|
if (not exists $para_tbl{$para}) {
|
$para_tbl{$para} = canon_fname($vbom_path, $val);
|
$para_tbl{$para} = canon_fname($vbom_path, $val);
|
print STDERR "--- define \${$para} = $val\n" if $do_trace;
|
print STDERR "--- define \${$para} = $val\n" if $do_trace;
|
} else {
|
} else {
|
print STDERR "--- ignore \${$para} = $val\n" if $do_trace;
|
print STDERR "--- ignore \${$para} = $val\n" if $do_trace;
|
}
|
}
|
next;
|
next;
|
}
|
}
|
|
|
# process parameter substitutions
|
# process parameter substitutions
|
while (m{\$\{([\w]+)\s*(:=)?\s*(.*?)\}}) {
|
while (m{\$\{([\w]+)\s*(:=)?\s*(.*?)\}}) {
|
my $para = $1;
|
my $para = $1;
|
my $del = $2;
|
my $del = $2;
|
my $val = $3;
|
my $val = $3;
|
my $pre = $`;
|
my $pre = $`;
|
my $post = $';
|
my $post = $';
|
if (defined $del && $del eq ":=") {
|
if (defined $del && $del eq ":=") {
|
if (not exists $para_tbl{$para}) {
|
if (not exists $para_tbl{$para}) {
|
$para_tbl{$para} = canon_fname($vbom_path, $val);
|
$para_tbl{$para} = canon_fname($vbom_path, $val);
|
print STDERR "--- define \${$para := $val}\n" if $do_trace;
|
print STDERR "--- define \${$para := $val}\n" if $do_trace;
|
} else {
|
} else {
|
print STDERR "--- ignore \${$para := $val}\n" if $do_trace;
|
print STDERR "--- ignore \${$para := $val}\n" if $do_trace;
|
}
|
}
|
}
|
}
|
if (defined $para_tbl{$para}) {
|
if (defined $para_tbl{$para}) {
|
if ($do_trace) {
|
if ($do_trace) {
|
print STDERR "--- use \${$para} -> $para_tbl{$para}\n";
|
print STDERR "--- use \${$para} -> $para_tbl{$para}\n";
|
} else {
|
} else {
|
## print STDERR "%vbomconv-I: \${$para} -> $para_tbl{$para}\n";
|
## print STDERR "%vbomconv-I: \${$para} -> $para_tbl{$para}\n";
|
}
|
}
|
$_ = $pre . "!" . $para_tbl{$para} . $post;
|
$_ = $pre . "!" . $para_tbl{$para} . $post;
|
} else {
|
} else {
|
print STDERR "%vbomconv-E: undefined \${$para} in $vbom_file\n";
|
print STDERR "%vbomconv-E: undefined \${$para} in $vbom_file\n";
|
exit 1;
|
exit 1;
|
}
|
}
|
}
|
}
|
|
|
if (/^\[([a-z,]+)\]\s*(.+)$/) { # [xxx,yyy] tag seen
|
if (/^\[([a-z,]+)\]\s*(.+)$/) { # [xxx,yyy] tag seen
|
my $qual = $1;
|
my $qual = $1;
|
my $name = $2;
|
my $name = $2;
|
my $keep = $is_any;
|
my $keep = $is_any;
|
## print STDERR "+++1 |$qual|$name|$vbom|\n";
|
## print STDERR "+++1 |$qual|$name|$vbom|\n";
|
foreach my $pref (split /,/,$qual) {
|
foreach my $pref (split /,/,$qual) {
|
if ($pref =~ /^(xst|ghdl|isim|sim)$/) {
|
if ($pref =~ /^(xst|ghdl|isim|sim)$/) {
|
$keep = 1 if ($pref eq "xst" && $is_xst);
|
$keep = 1 if ($pref eq "xst" && $is_xst);
|
$keep = 1 if ($pref eq "ghdl" && $is_ghdl);
|
$keep = 1 if ($pref eq "ghdl" && $is_ghdl);
|
$keep = 1 if ($pref eq "isim" && $is_isim);
|
$keep = 1 if ($pref eq "isim" && $is_isim);
|
$keep = 1 if ($pref eq "sim" && $is_sim);
|
$keep = 1 if ($pref eq "sim" && $is_sim);
|
} else {
|
} else {
|
print STDERR "%vbomconv-W: unknown tag [$pref] in $vbom_file\n";
|
print STDERR "%vbomconv-W: unknown tag [$pref] in $vbom_file\n";
|
}
|
}
|
}
|
}
|
if (not $keep) {
|
if (not $keep) {
|
print STDERR "--- drop \"$_\"\n" if $do_trace;
|
print STDERR "--- drop \"$_\"\n" if $do_trace;
|
next;
|
next;
|
}
|
}
|
$_ = $name; # remove [xxx] tag
|
$_ = $name; # remove [xxx] tag
|
}
|
}
|
|
|
my $tag;
|
my $tag;
|
my $val = $_;
|
my $val = $_;
|
|
|
# detect tag:val lines
|
# detect tag:val lines
|
if (m{^\s*(.*?)\s*:\s*(.*?)\s*$}) {
|
if (m{^\s*(.*?)\s*:\s*(.*?)\s*$}) {
|
$tag = $1;
|
$tag = $1;
|
$val = $2;
|
$val = $2;
|
|
|
# process @top: lines
|
# process @top: lines
|
if ($tag eq '@top') {
|
if ($tag eq '@top') {
|
$top = $val unless $top_done;
|
$top = $val unless $top_done;
|
|
|
# process @ucf_cpp: lines
|
# process @ucf_cpp: lines
|
} elsif ($tag eq '@ucf_cpp') {
|
} elsif ($tag eq '@ucf_cpp') {
|
push @ucf_cpp_list, $val;
|
push @ucf_cpp_list, $val;
|
|
|
# process @lib: lines
|
# process @lib: lines
|
} elsif ($tag eq '@lib') {
|
} elsif ($tag eq '@lib') {
|
if ($val eq 'unisim') {
|
if ($val eq 'unisim') {
|
$has_unisim = 1;
|
$has_unisim = 1;
|
} elsif ($val eq 'simprim') {
|
} elsif ($val eq 'simprim') {
|
$has_simprim = 1;
|
$has_simprim = 1;
|
} else {
|
} else {
|
print STDERR "%vbomconv-E: invalid lib type \'$tag\' in $vbom_file\n";
|
print STDERR "%vbomconv-E: invalid lib type \'$tag\' in $vbom_file\n";
|
exit 1;
|
exit 1;
|
}
|
}
|
} else {
|
} else {
|
print STDERR "%vbomconv-E: invalid \'$tag:\' line in $vbom_file\n";
|
print STDERR "%vbomconv-E: invalid \'$tag:\' line in $vbom_file\n";
|
exit 1;
|
exit 1;
|
}
|
}
|
next;
|
next;
|
}
|
}
|
|
|
# now do _fsim, _tsim mapping
|
# now do _fsim, _tsim mapping
|
$val =~ s{_ssim\.vhd$}{_fsim.vhd} if $is_fsim;
|
$val =~ s{_ssim\.vhd$}{_fsim.vhd} if $is_fsim;
|
$val =~ s{_ssim\.vhd$}{_tsim.vhd} if $is_tsim;
|
$val =~ s{_ssim\.vhd$}{_tsim.vhd} if $is_tsim;
|
|
|
# process normal .vhd or .vbom file lines
|
# process normal .vhd or .vbom file lines
|
# canonize file name unless not already done by filename substitution
|
# canonize file name unless not already done by filename substitution
|
my $fullname;
|
my $fullname;
|
if ($val =~ m{^!(.*)$}) {
|
if ($val =~ m{^!(.*)$}) {
|
$fullname = $1;
|
$fullname = $1;
|
} else {
|
} else {
|
$fullname = canon_fname($vbom_path, $val);
|
$fullname = canon_fname($vbom_path, $val);
|
}
|
}
|
|
|
# determine whether additional libs needed
|
# determine whether additional libs needed
|
if ($fullname =~ m{_ssim\.vhd$}) { # ends in _ssim.vhd
|
if ($fullname =~ m{_ssim\.vhd$}) { # ends in _ssim.vhd
|
$has_unisim = 1;
|
$has_unisim = 1;
|
}
|
}
|
if ($fullname =~ m{_[ft]sim\.vhd$}) { # ends in _fsim.vhd or _tsim.vhd
|
if ($fullname =~ m{_[ft]sim\.vhd$}) { # ends in _fsim.vhd or _tsim.vhd
|
$has_simprim = 1;
|
$has_simprim = 1;
|
}
|
}
|
|
|
|
|
# build vbom table
|
# build vbom table
|
push @{$vbom_tbl{$vbom}}, $fullname;
|
push @{$vbom_tbl{$vbom}}, $fullname;
|
print STDERR "--- add $fullname\n" if $do_trace;
|
print STDERR "--- add $fullname\n" if $do_trace;
|
|
|
# if a vbom, queue if not not already read
|
# if a vbom, queue if not not already read
|
if ($fullname =~ m{\.vbom$} && not exists $read_tbl{$fullname} ) {
|
if ($fullname =~ m{\.vbom$} && not exists $read_tbl{$fullname} ) {
|
push @vbom_list, $fullname;
|
push @vbom_list, $fullname;
|
print STDERR "--- queue $fullname\n" if $do_trace;
|
print STDERR "--- queue $fullname\n" if $do_trace;
|
}
|
}
|
|
|
}
|
}
|
|
|
$top_done = 1;
|
$top_done = 1;
|
|
|
close (IFILE);
|
close (IFILE);
|
}
|
}
|
|
|
#-------------------------------------------------------------------------------
|
#-------------------------------------------------------------------------------
|
|
|
sub scan_vbom {
|
sub scan_vbom {
|
my ($vbom) = @_;
|
my ($vbom) = @_;
|
|
|
$level += 1;
|
$level += 1;
|
my $rank = 1000*$level + scalar(@{$vbom_tbl{$vbom}});
|
my $rank = 1000*$level + scalar(@{$vbom_tbl{$vbom}});
|
print STDERR "--> $level: $vbom\n" if $do_trace;
|
print STDERR "--> $level: $vbom\n" if $do_trace;
|
|
|
die "%vbomcov-E excessive vbom stack depth \n" if $level>=1000;
|
die "%vbomcov-E excessive vbom stack depth \n" if $level>=1000;
|
|
|
foreach (@{$vbom_tbl{$vbom}}) {
|
foreach (@{$vbom_tbl{$vbom}}) {
|
my $file = $_;
|
my $file = $_;
|
$rank -= 1;
|
$rank -= 1;
|
if (m{\.vbom$}) {
|
if (m{\.vbom$}) {
|
scan_vbom($file);
|
scan_vbom($file);
|
} else {
|
} else {
|
if (exists $file_tbl{$file}) {
|
if (exists $file_tbl{$file}) {
|
if ($rank > $file_tbl{$file}) {
|
if ($rank > $file_tbl{$file}) {
|
print STDERR " $file $file_tbl{$file} -> $rank\n" if $do_trace;
|
print STDERR " $file $file_tbl{$file} -> $rank\n" if $do_trace;
|
$file_tbl{$file} = $rank;
|
$file_tbl{$file} = $rank;
|
} else {
|
} else {
|
print STDERR " $file $file_tbl{$file} (keep)\n" if $do_trace;
|
print STDERR " $file $file_tbl{$file} (keep)\n" if $do_trace;
|
}
|
}
|
} else {
|
} else {
|
$file_tbl{$file} = $rank;
|
$file_tbl{$file} = $rank;
|
print STDERR " $file $file_tbl{$file} (new)\n" if $do_trace;
|
print STDERR " $file $file_tbl{$file} (new)\n" if $do_trace;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
print STDERR "<-- $level: $vbom\n" if $do_trace;
|
print STDERR "<-- $level: $vbom\n" if $do_trace;
|
$level -= 1;
|
$level -= 1;
|
|
|
}
|
}
|
|
|
#-------------------------------------------------------------------------------
|
#-------------------------------------------------------------------------------
|
|
|
sub copy_edir {
|
sub copy_edir {
|
my ($file, $edir) = @_;
|
my ($file, $edir) = @_;
|
print "cp -p $file $edir\n";
|
print "cp -p $file $edir\n";
|
system("cp -p $file $edir")==0 or die "cp -p failed: $?";
|
system("cp -p $file $edir")==0 or die "cp -p failed: $?";
|
}
|
}
|
|
|
#-------------------------------------------------------------------------------
|
#-------------------------------------------------------------------------------
|
|
|
sub write_vbomdep {
|
sub write_vbomdep {
|
my ($target) = @_;
|
my ($target) = @_;
|
print "#\n";
|
print "#\n";
|
print "# .dep_ on .vbom dependencies\n";
|
print "# .dep_ on .vbom dependencies\n";
|
print "#\n";
|
print "#\n";
|
foreach (sort keys %read_tbl) {
|
foreach (sort keys %read_tbl) {
|
print "$target : $_\n";
|
print "$target : $_\n";
|
}
|
}
|
}
|
}
|
|
|
#-------------------------------------------------------------------------------
|
#-------------------------------------------------------------------------------
|
sub canon_fname {
|
sub canon_fname {
|
my ($vpath,$fname) = @_;
|
my ($vpath,$fname) = @_;
|
# get full relative file name (relative to cwd)
|
# get full relative file name (relative to cwd)
|
$fname = "$vpath/$fname" if $vpath ne "";
|
$fname = "$vpath/$fname" if $vpath ne "";
|
|
|
# remove 'inner' .., e.g. ../x/../y --> ../y
|
# remove 'inner' .., e.g. ../x/../y --> ../y
|
# this will also canonize the file names, thus same file same name
|
# this will also canonize the file names, thus same file same name
|
|
|
my @flist;
|
my @flist;
|
foreach (split "/",$fname) {
|
foreach (split "/",$fname) {
|
if (scalar(@flist) && $flist[$#flist] ne ".." && $_ eq "..") {
|
if (scalar(@flist) && $flist[$#flist] ne ".." && $_ eq "..") {
|
pop @flist;
|
pop @flist;
|
} else {
|
} else {
|
push @flist, $_;
|
push @flist, $_;
|
}
|
}
|
}
|
}
|
|
|
return join "/", @flist;
|
return join "/", @flist;
|
}
|
}
|
|
|
#-------------------------------------------------------------------------------
|
#-------------------------------------------------------------------------------
|
|
|
sub print_help {
|
sub print_help {
|
print "usage: vbomconf file.vbom\n";
|
print "usage: vbomconf file.vbom\n";
|
print " --help this message\n";
|
print " --help this message\n";
|
print " --trace trace recursive processing of vbom's\n";
|
print " --trace trace recursive processing of vbom's\n";
|
print " --dep_xst generate xst dependencies for make (on stdout)\n";
|
print " --dep_xst generate xst dependencies for make (on stdout)\n";
|
print " --dep_ghdl generate ghdl dependencies for make (on stdout)\n";
|
print " --dep_ghdl generate ghdl dependencies for make (on stdout)\n";
|
print " --dep_isim generate isim dependencies for make (on stdout)\n";
|
print " --dep_isim generate isim dependencies for make (on stdout)\n";
|
print " --xst_prj generate xst project file (on stdout)\n";
|
print " --xst_prj generate xst project file (on stdout)\n";
|
print " --isim_prj generate isim project file (on stdout)\n";
|
print " --isim_prj generate isim project file (on stdout)\n";
|
print " --viv_vhdl generate vivado read_vhdl command (on stdout)\n";
|
print " --viv_vhdl generate vivado read_vhdl command (on stdout)\n";
|
print " --ghdl_a generate and execute ghdl -a (analyse)\n";
|
print " --ghdl_a generate and execute ghdl -a (analyse)\n";
|
print " --ghdl_a_cmd like ghdl_a, but only print command, no exec\n";
|
print " --ghdl_a_cmd like ghdl_a, but only print command, no exec\n";
|
print " --ghdl_i generate and execute ghdl -i (inspect)\n";
|
print " --ghdl_i generate and execute ghdl -i (inspect)\n";
|
print " --ghdl_i_cmd like ghdl_i, but only print command, no exec\n";
|
print " --ghdl_i_cmd like ghdl_i, but only print command, no exec\n";
|
print " --ghdl_m generate and execute ghdl -m (make)\n";
|
print " --ghdl_m generate and execute ghdl -m (make)\n";
|
print " --ghdl_m_cmd like ghdl_m, but only print command, no exec\n";
|
print " --ghdl_m_cmd like ghdl_m, but only print command, no exec\n";
|
print " --xst_export=s export all xst source files into directory s\n";
|
print " --xst_export=s export all xst source files into directory s\n";
|
print " --ghdl_export=s export all ghdl source files into directory s\n";
|
print " --ghdl_export=s export all ghdl source files into directory s\n";
|
print " --isim_export=s export all isim source files into directory s\n";
|
print " --isim_export=s export all isim source files into directory s\n";
|
print " --get_top return top level entity name\n";
|
print " --get_top return top level entity name\n";
|
print " --flist list all files touched by vbom for all tags\n";
|
print " --flist list all files touched by vbom for all tags\n";
|
}
|
}
|
|
|