-- $Id: pdp11_dpath.vhd 569 2014-07-13 14:36:32Z mueller $
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-- $Id: pdp11_dpath.vhd 569 2014-07-13 14:36:32Z mueller $
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--
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--
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-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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-- Software Foundation, either version 2, or at your option any later version.
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--
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--
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-- This program is distributed in the hope that it will be useful, but
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-- This program is distributed in the hope that it will be useful, but
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for complete details.
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-- for complete details.
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--
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--
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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-- Module Name: pdp11_dpath - syn
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-- Module Name: pdp11_dpath - syn
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-- Description: pdp11: CPU datapath
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-- Description: pdp11: CPU datapath
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--
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--
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-- Dependencies: pdp11_gpr
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-- Dependencies: pdp11_gpr
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-- pdp11_psr
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-- pdp11_psr
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-- pdp11_ounit
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-- pdp11_ounit
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-- pdp11_aunit
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-- pdp11_aunit
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-- pdp11_lunit
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-- pdp11_lunit
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-- pdp11_munit
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-- pdp11_munit
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--
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--
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-- Test bench: tb/tb_pdp11_core (implicit)
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-- Test bench: tb/tb_pdp11_core (implicit)
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-- Target Devices: generic
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-- Target Devices: generic
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-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31
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-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31
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--
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--
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-- Revision History:
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-- Revision History:
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-- Date Rev Version Comment
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-- Date Rev Version Comment
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-- 2014-07-12 569 1.2.3 use DIV_QUIT and S_DIV_SR for pdp11_munit
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-- 2014-07-12 569 1.2.3 use DIV_QUIT and S_DIV_SR for pdp11_munit
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-- 2011-11-18 427 1.2.2 now numeric_std clean
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-- 2011-11-18 427 1.2.2 now numeric_std clean
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-- 2010-09-18 300 1.2.1 rename (adlm)box->(oalm)unit
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-- 2010-09-18 300 1.2.1 rename (adlm)box->(oalm)unit
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-- 2010-06-13 305 1.2 rename CPDIN -> CP_DIN; add CP_DOUT out port;
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-- 2010-06-13 305 1.2 rename CPDIN -> CP_DIN; add CP_DOUT out port;
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-- remove CPADDR out port; drop R_CPADDR, proc_cpaddr;
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-- remove CPADDR out port; drop R_CPADDR, proc_cpaddr;
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-- added R_CPDOUT, proc_cpdout
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-- added R_CPDOUT, proc_cpdout
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-- 2009-05-30 220 1.1.6 final removal of snoopers (were already commented)
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-- 2009-05-30 220 1.1.6 final removal of snoopers (were already commented)
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-- 2008-12-14 177 1.1.5 fill gpr_* fields in DM_STAT_DP
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-- 2008-12-14 177 1.1.5 fill gpr_* fields in DM_STAT_DP
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-- 2008-08-22 161 1.1.4 rename ubf_ -> ibf_; use iblib
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-- 2008-08-22 161 1.1.4 rename ubf_ -> ibf_; use iblib
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-- 2008-04-19 137 1.1.3 add DM_STAT_DP port
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-- 2008-04-19 137 1.1.3 add DM_STAT_DP port
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-- 2008-03-02 121 1.1.2 remove snoopers
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-- 2008-03-02 121 1.1.2 remove snoopers
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-- 2008-02-24 119 1.1.1 add CPADDR register, remove R_MDIN (not needed)
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-- 2008-02-24 119 1.1.1 add CPADDR register, remove R_MDIN (not needed)
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-- 2007-12-30 107 1.1 use IB_MREQ/IB_SRES interface now (for psr access)
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-- 2007-12-30 107 1.1 use IB_MREQ/IB_SRES interface now (for psr access)
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-- 2007-06-14 56 1.0.1 Use slvtypes.all
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-- 2007-06-14 56 1.0.1 Use slvtypes.all
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-- 2007-05-12 26 1.0 Initial version
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-- 2007-05-12 26 1.0 Initial version
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use ieee.numeric_std.all;
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use work.slvtypes.all;
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use work.slvtypes.all;
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use work.iblib.all;
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use work.iblib.all;
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use work.pdp11.all;
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use work.pdp11.all;
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-- ----------------------------------------------------------------------------
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-- ----------------------------------------------------------------------------
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entity pdp11_dpath is -- CPU datapath
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entity pdp11_dpath is -- CPU datapath
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port (
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port (
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CLK : in slbit; -- clock
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CLK : in slbit; -- clock
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CRESET : in slbit; -- console reset
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CRESET : in slbit; -- console reset
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CNTL : in dpath_cntl_type; -- control interface
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CNTL : in dpath_cntl_type; -- control interface
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STAT : out dpath_stat_type; -- status interface
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STAT : out dpath_stat_type; -- status interface
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CP_DIN : in slv16; -- console port data in
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CP_DIN : in slv16; -- console port data in
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CP_DOUT : out slv16; -- console port data out
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CP_DOUT : out slv16; -- console port data out
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PSWOUT : out psw_type; -- current psw
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PSWOUT : out psw_type; -- current psw
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PCOUT : out slv16; -- current pc
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PCOUT : out slv16; -- current pc
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IREG : out slv16; -- ireg out
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IREG : out slv16; -- ireg out
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VM_ADDR : out slv16; -- virt. memory address
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VM_ADDR : out slv16; -- virt. memory address
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VM_DOUT : in slv16; -- virt. memory data out
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VM_DOUT : in slv16; -- virt. memory data out
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VM_DIN : out slv16; -- virt. memory data in
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VM_DIN : out slv16; -- virt. memory data in
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_SRES : out ib_sres_type; -- ibus response
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IB_SRES : out ib_sres_type; -- ibus response
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DM_STAT_DP : out dm_stat_dp_type -- debug and monitor status
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DM_STAT_DP : out dm_stat_dp_type -- debug and monitor status
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);
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);
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end pdp11_dpath;
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end pdp11_dpath;
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architecture syn of pdp11_dpath is
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architecture syn of pdp11_dpath is
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signal R_DSRC : slv16 := (others=>'0'); -- SRC register
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signal R_DSRC : slv16 := (others=>'0'); -- SRC register
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signal R_DDST : slv16 := (others=>'0'); -- DST register
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signal R_DDST : slv16 := (others=>'0'); -- DST register
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signal R_DTMP : slv16 := (others=>'0'); -- TMP register
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signal R_DTMP : slv16 := (others=>'0'); -- TMP register
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signal R_IREG : slv16 := (others=>'0'); -- IREG register
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signal R_IREG : slv16 := (others=>'0'); -- IREG register
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signal R_CPDOUT : slv16 := (others=>'0'); -- cp dout buffer
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signal R_CPDOUT : slv16 := (others=>'0'); -- cp dout buffer
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signal GPR_DSRC : slv16 := (others=>'0'); --
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signal GPR_DSRC : slv16 := (others=>'0'); --
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signal GPR_DDST : slv16 := (others=>'0'); --
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signal GPR_DDST : slv16 := (others=>'0'); --
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signal GPR_PC : slv16 := (others=>'0'); --
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signal GPR_PC : slv16 := (others=>'0'); --
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signal PSW : psw_type := psw_init; --
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signal PSW : psw_type := psw_init; --
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signal CCIN : slv4 := (others=>'0'); -- cc input to xbox's
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signal CCIN : slv4 := (others=>'0'); -- cc input to xbox's
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signal CCOUT : slv4 := (others=>'0'); -- cc output from xbox's
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signal CCOUT : slv4 := (others=>'0'); -- cc output from xbox's
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signal DRES : slv16 := (others=>'0'); -- result bus
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signal DRES : slv16 := (others=>'0'); -- result bus
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signal DRESE : slv16 := (others=>'0'); -- result bus extra
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signal DRESE : slv16 := (others=>'0'); -- result bus extra
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signal OUNIT_DOUT : slv16 := (others=>'0'); -- result ounit
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signal OUNIT_DOUT : slv16 := (others=>'0'); -- result ounit
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signal AUNIT_DOUT : slv16 := (others=>'0'); -- result aunit
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signal AUNIT_DOUT : slv16 := (others=>'0'); -- result aunit
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signal LUNIT_DOUT : slv16 := (others=>'0'); -- result lunit
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signal LUNIT_DOUT : slv16 := (others=>'0'); -- result lunit
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signal MUNIT_DOUT : slv16 := (others=>'0'); -- result munit
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signal MUNIT_DOUT : slv16 := (others=>'0'); -- result munit
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signal OUNIT_NZOUT : slv2 := (others=>'0'); -- nz flags ounit
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signal OUNIT_NZOUT : slv2 := (others=>'0'); -- nz flags ounit
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signal OUNIT_CCOUT : slv4 := (others=>'0'); -- cc flags ounit
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signal OUNIT_CCOUT : slv4 := (others=>'0'); -- cc flags ounit
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signal AUNIT_CCOUT : slv4 := (others=>'0'); -- cc flags aunit
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signal AUNIT_CCOUT : slv4 := (others=>'0'); -- cc flags aunit
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signal LUNIT_CCOUT : slv4 := (others=>'0'); -- cc flags lunit
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signal LUNIT_CCOUT : slv4 := (others=>'0'); -- cc flags lunit
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signal MUNIT_CCOUT : slv4 := (others=>'0'); -- cc flags munit
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signal MUNIT_CCOUT : slv4 := (others=>'0'); -- cc flags munit
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subtype lal_ibf_addr is integer range 15 downto 1;
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subtype lal_ibf_addr is integer range 15 downto 1;
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subtype lah_ibf_addr is integer range 5 downto 0;
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subtype lah_ibf_addr is integer range 5 downto 0;
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constant lah_ibf_ena_22bit: integer := 6;
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constant lah_ibf_ena_22bit: integer := 6;
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constant lah_ibf_ena_ubmap: integer := 7;
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constant lah_ibf_ena_ubmap: integer := 7;
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begin
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begin
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GPR : pdp11_gpr port map (
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GPR : pdp11_gpr port map (
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CLK => CLK,
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CLK => CLK,
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DIN => DRES,
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DIN => DRES,
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ASRC => CNTL.gpr_asrc,
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ASRC => CNTL.gpr_asrc,
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ADST => CNTL.gpr_adst,
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ADST => CNTL.gpr_adst,
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MODE => CNTL.gpr_mode,
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MODE => CNTL.gpr_mode,
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RSET => CNTL.gpr_rset,
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RSET => CNTL.gpr_rset,
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WE => CNTL.gpr_we,
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WE => CNTL.gpr_we,
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BYTOP => CNTL.gpr_bytop,
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BYTOP => CNTL.gpr_bytop,
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PCINC => CNTL.gpr_pcinc,
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PCINC => CNTL.gpr_pcinc,
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DSRC => GPR_DSRC,
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DSRC => GPR_DSRC,
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DDST => GPR_DDST,
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DDST => GPR_DDST,
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PC => GPR_PC
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PC => GPR_PC
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);
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);
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PSR : pdp11_psr port map(
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PSR : pdp11_psr port map(
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CLK => CLK,
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CLK => CLK,
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CRESET => CRESET,
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CRESET => CRESET,
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DIN => DRES,
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DIN => DRES,
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CCIN => CCOUT,
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CCIN => CCOUT,
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CCWE => CNTL.psr_ccwe,
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CCWE => CNTL.psr_ccwe,
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WE => CNTL.psr_we,
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WE => CNTL.psr_we,
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FUNC => CNTL.psr_func,
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FUNC => CNTL.psr_func,
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PSW => PSW,
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PSW => PSW,
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IB_MREQ => IB_MREQ,
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IB_MREQ => IB_MREQ,
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IB_SRES => IB_SRES
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IB_SRES => IB_SRES
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);
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);
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OUNIT : pdp11_ounit port map (
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OUNIT : pdp11_ounit port map (
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DSRC => R_DSRC,
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DSRC => R_DSRC,
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DDST => R_DDST,
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DDST => R_DDST,
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DTMP => R_DTMP,
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DTMP => R_DTMP,
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PC => GPR_PC,
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PC => GPR_PC,
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ASEL => CNTL.ounit_asel,
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ASEL => CNTL.ounit_asel,
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AZERO => CNTL.ounit_azero,
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AZERO => CNTL.ounit_azero,
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IREG8 => R_IREG(7 downto 0),
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IREG8 => R_IREG(7 downto 0),
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VMDOUT => VM_DOUT,
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VMDOUT => VM_DOUT,
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CONST => CNTL.ounit_const,
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CONST => CNTL.ounit_const,
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BSEL => CNTL.ounit_bsel,
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BSEL => CNTL.ounit_bsel,
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OPSUB => CNTL.ounit_opsub,
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OPSUB => CNTL.ounit_opsub,
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DOUT => OUNIT_DOUT,
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DOUT => OUNIT_DOUT,
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NZOUT => OUNIT_NZOUT
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NZOUT => OUNIT_NZOUT
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);
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);
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AUNIT : pdp11_aunit port map (
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AUNIT : pdp11_aunit port map (
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DSRC => R_DSRC,
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DSRC => R_DSRC,
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DDST => R_DDST,
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DDST => R_DDST,
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CI => CCIN(0),
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CI => CCIN(0),
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SRCMOD => CNTL.aunit_srcmod,
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SRCMOD => CNTL.aunit_srcmod,
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DSTMOD => CNTL.aunit_dstmod,
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DSTMOD => CNTL.aunit_dstmod,
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CIMOD => CNTL.aunit_cimod,
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CIMOD => CNTL.aunit_cimod,
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CC1OP => CNTL.aunit_cc1op,
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CC1OP => CNTL.aunit_cc1op,
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CCMODE => CNTL.aunit_ccmode,
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CCMODE => CNTL.aunit_ccmode,
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BYTOP => CNTL.aunit_bytop,
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BYTOP => CNTL.aunit_bytop,
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DOUT => AUNIT_DOUT,
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DOUT => AUNIT_DOUT,
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CCOUT => AUNIT_CCOUT
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CCOUT => AUNIT_CCOUT
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);
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);
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LUNIT : pdp11_lunit port map (
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LUNIT : pdp11_lunit port map (
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DSRC => R_DSRC,
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DSRC => R_DSRC,
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DDST => R_DDST,
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DDST => R_DDST,
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CCIN => CCIN,
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CCIN => CCIN,
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FUNC => CNTL.lunit_func,
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FUNC => CNTL.lunit_func,
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BYTOP => CNTL.lunit_bytop,
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BYTOP => CNTL.lunit_bytop,
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DOUT => LUNIT_DOUT,
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DOUT => LUNIT_DOUT,
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CCOUT => LUNIT_CCOUT
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CCOUT => LUNIT_CCOUT
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);
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);
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MUNIT : pdp11_munit port map (
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MUNIT : pdp11_munit port map (
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CLK => CLK,
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CLK => CLK,
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DSRC => R_DSRC,
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DSRC => R_DSRC,
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DDST => R_DDST,
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DDST => R_DDST,
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DTMP => R_DTMP,
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DTMP => R_DTMP,
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GPR_DSRC => GPR_DSRC,
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GPR_DSRC => GPR_DSRC,
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FUNC => CNTL.munit_func,
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FUNC => CNTL.munit_func,
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S_DIV => CNTL.munit_s_div,
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S_DIV => CNTL.munit_s_div,
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S_DIV_CN => CNTL.munit_s_div_cn,
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S_DIV_CN => CNTL.munit_s_div_cn,
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S_DIV_CR => CNTL.munit_s_div_cr,
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S_DIV_CR => CNTL.munit_s_div_cr,
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S_DIV_SR => CNTL.munit_s_div_sr,
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S_DIV_SR => CNTL.munit_s_div_sr,
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S_ASH => CNTL.munit_s_ash,
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S_ASH => CNTL.munit_s_ash,
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S_ASH_CN => CNTL.munit_s_ash_cn,
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S_ASH_CN => CNTL.munit_s_ash_cn,
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S_ASHC => CNTL.munit_s_ashc,
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S_ASHC => CNTL.munit_s_ashc,
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S_ASHC_CN => CNTL.munit_s_ashc_cn,
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S_ASHC_CN => CNTL.munit_s_ashc_cn,
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SHC_TC => STAT.shc_tc,
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SHC_TC => STAT.shc_tc,
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DIV_CR => STAT.div_cr,
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DIV_CR => STAT.div_cr,
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DIV_CQ => STAT.div_cq,
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DIV_CQ => STAT.div_cq,
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DIV_QUIT => STAT.div_quit,
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DIV_QUIT => STAT.div_quit,
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DOUT => MUNIT_DOUT,
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DOUT => MUNIT_DOUT,
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DOUTE => DRESE,
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DOUTE => DRESE,
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CCOUT => MUNIT_CCOUT
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CCOUT => MUNIT_CCOUT
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);
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);
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CCIN <= PSW.cc;
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CCIN <= PSW.cc;
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OUNIT_CCOUT <= OUNIT_NZOUT & "0" & CCIN(0); -- clear v, keep c
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OUNIT_CCOUT <= OUNIT_NZOUT & "0" & CCIN(0); -- clear v, keep c
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proc_dres_sel: process (OUNIT_DOUT, AUNIT_DOUT, LUNIT_DOUT, MUNIT_DOUT,
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proc_dres_sel: process (OUNIT_DOUT, AUNIT_DOUT, LUNIT_DOUT, MUNIT_DOUT,
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VM_DOUT, R_IREG, CP_DIN, CNTL)
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VM_DOUT, R_IREG, CP_DIN, CNTL)
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begin
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begin
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case CNTL.dres_sel is
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case CNTL.dres_sel is
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when c_dpath_res_ounit => DRES <= OUNIT_DOUT;
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when c_dpath_res_ounit => DRES <= OUNIT_DOUT;
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when c_dpath_res_aunit => DRES <= AUNIT_DOUT;
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when c_dpath_res_aunit => DRES <= AUNIT_DOUT;
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when c_dpath_res_lunit => DRES <= LUNIT_DOUT;
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when c_dpath_res_lunit => DRES <= LUNIT_DOUT;
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when c_dpath_res_munit => DRES <= MUNIT_DOUT;
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when c_dpath_res_munit => DRES <= MUNIT_DOUT;
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when c_dpath_res_vmdout => DRES <= VM_DOUT;
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when c_dpath_res_vmdout => DRES <= VM_DOUT;
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when c_dpath_res_fpdout => DRES <= (others=>'0');
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when c_dpath_res_fpdout => DRES <= (others=>'0');
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when c_dpath_res_ireg => DRES <= R_IREG;
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when c_dpath_res_ireg => DRES <= R_IREG;
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when c_dpath_res_cpdin => DRES <= CP_DIN;
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when c_dpath_res_cpdin => DRES <= CP_DIN;
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when others => null;
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when others => null;
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end case;
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end case;
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end process proc_dres_sel;
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end process proc_dres_sel;
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proc_cres_sel: process (OUNIT_CCOUT, AUNIT_CCOUT, LUNIT_CCOUT, MUNIT_CCOUT,
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proc_cres_sel: process (OUNIT_CCOUT, AUNIT_CCOUT, LUNIT_CCOUT, MUNIT_CCOUT,
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CCIN, CNTL)
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CCIN, CNTL)
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begin
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begin
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case CNTL.cres_sel is
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case CNTL.cres_sel is
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when c_dpath_res_ounit => CCOUT <= OUNIT_CCOUT;
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when c_dpath_res_ounit => CCOUT <= OUNIT_CCOUT;
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when c_dpath_res_aunit => CCOUT <= AUNIT_CCOUT;
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when c_dpath_res_aunit => CCOUT <= AUNIT_CCOUT;
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when c_dpath_res_lunit => CCOUT <= LUNIT_CCOUT;
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when c_dpath_res_lunit => CCOUT <= LUNIT_CCOUT;
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when c_dpath_res_munit => CCOUT <= MUNIT_CCOUT;
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when c_dpath_res_munit => CCOUT <= MUNIT_CCOUT;
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when c_dpath_res_vmdout => CCOUT <= CCIN;
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when c_dpath_res_vmdout => CCOUT <= CCIN;
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when c_dpath_res_fpdout => CCOUT <= "0000";
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when c_dpath_res_fpdout => CCOUT <= "0000";
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when c_dpath_res_ireg => CCOUT <= CCIN;
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when c_dpath_res_ireg => CCOUT <= CCIN;
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when c_dpath_res_cpdin => CCOUT <= CCIN;
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when c_dpath_res_cpdin => CCOUT <= CCIN;
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when others => null;
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when others => null;
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end case;
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end case;
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end process proc_cres_sel;
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end process proc_cres_sel;
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|
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proc_dregs: process (CLK)
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proc_dregs: process (CLK)
|
begin
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begin
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|
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if rising_edge(CLK) then
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if rising_edge(CLK) then
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|
|
if CNTL.dsrc_we = '1' then
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if CNTL.dsrc_we = '1' then
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if CNTL.dsrc_sel = '0' then
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if CNTL.dsrc_sel = '0' then
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R_DSRC <= GPR_DSRC;
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R_DSRC <= GPR_DSRC;
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else
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else
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R_DSRC <= DRES;
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R_DSRC <= DRES;
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end if;
|
end if;
|
end if;
|
end if;
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|
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if CNTL.ddst_we = '1' then
|
if CNTL.ddst_we = '1' then
|
if CNTL.ddst_sel = '0' then
|
if CNTL.ddst_sel = '0' then
|
R_DDST <= GPR_DDST;
|
R_DDST <= GPR_DDST;
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else
|
else
|
R_DDST <= DRES;
|
R_DDST <= DRES;
|
end if;
|
end if;
|
end if;
|
end if;
|
|
|
if CNTL.dtmp_we = '1' then
|
if CNTL.dtmp_we = '1' then
|
case CNTL.dtmp_sel is
|
case CNTL.dtmp_sel is
|
when c_dpath_dtmp_dsrc => R_DTMP <= GPR_DSRC;
|
when c_dpath_dtmp_dsrc => R_DTMP <= GPR_DSRC;
|
when c_dpath_dtmp_psw =>
|
when c_dpath_dtmp_psw =>
|
R_DTMP <= (others=>'0');
|
R_DTMP <= (others=>'0');
|
R_DTMP(psw_ibf_cmode) <= PSW.cmode;
|
R_DTMP(psw_ibf_cmode) <= PSW.cmode;
|
R_DTMP(psw_ibf_pmode) <= PSW.pmode;
|
R_DTMP(psw_ibf_pmode) <= PSW.pmode;
|
R_DTMP(psw_ibf_rset) <= PSW.rset;
|
R_DTMP(psw_ibf_rset) <= PSW.rset;
|
R_DTMP(psw_ibf_pri) <= PSW.pri;
|
R_DTMP(psw_ibf_pri) <= PSW.pri;
|
R_DTMP(psw_ibf_tflag) <= PSW.tflag;
|
R_DTMP(psw_ibf_tflag) <= PSW.tflag;
|
R_DTMP(psw_ibf_cc) <= PSW.cc;
|
R_DTMP(psw_ibf_cc) <= PSW.cc;
|
when c_dpath_dtmp_dres => R_DTMP <= DRES;
|
when c_dpath_dtmp_dres => R_DTMP <= DRES;
|
when c_dpath_dtmp_drese => R_DTMP <= DRESE;
|
when c_dpath_dtmp_drese => R_DTMP <= DRESE;
|
when others => null;
|
when others => null;
|
end case;
|
end case;
|
end if;
|
end if;
|
|
|
end if;
|
end if;
|
|
|
end process proc_dregs;
|
end process proc_dregs;
|
|
|
proc_mregs: process (CLK)
|
proc_mregs: process (CLK)
|
begin
|
begin
|
|
|
if rising_edge(CLK) then
|
if rising_edge(CLK) then
|
|
|
if CNTL.ireg_we = '1' then
|
if CNTL.ireg_we = '1' then
|
R_IREG <= VM_DOUT;
|
R_IREG <= VM_DOUT;
|
end if;
|
end if;
|
|
|
end if;
|
end if;
|
end process proc_mregs;
|
end process proc_mregs;
|
|
|
proc_cpdout: process (CLK)
|
proc_cpdout: process (CLK)
|
begin
|
begin
|
if rising_edge(CLK) then
|
if rising_edge(CLK) then
|
if CRESET = '1' then
|
if CRESET = '1' then
|
R_CPDOUT <= (others=>'0');
|
R_CPDOUT <= (others=>'0');
|
else
|
else
|
if CNTL.cpdout_we = '1' then
|
if CNTL.cpdout_we = '1' then
|
R_CPDOUT <= DRES;
|
R_CPDOUT <= DRES;
|
end if;
|
end if;
|
end if;
|
end if;
|
end if;
|
end if;
|
end process proc_cpdout;
|
end process proc_cpdout;
|
|
|
proc_vmaddr_sel: process (R_DSRC, R_DDST, R_DTMP, GPR_PC, CNTL)
|
proc_vmaddr_sel: process (R_DSRC, R_DDST, R_DTMP, GPR_PC, CNTL)
|
begin
|
begin
|
case CNTL.vmaddr_sel is
|
case CNTL.vmaddr_sel is
|
when c_dpath_vmaddr_dsrc => VM_ADDR <= R_DSRC;
|
when c_dpath_vmaddr_dsrc => VM_ADDR <= R_DSRC;
|
when c_dpath_vmaddr_ddst => VM_ADDR <= R_DDST;
|
when c_dpath_vmaddr_ddst => VM_ADDR <= R_DDST;
|
when c_dpath_vmaddr_dtmp => VM_ADDR <= R_DTMP;
|
when c_dpath_vmaddr_dtmp => VM_ADDR <= R_DTMP;
|
when c_dpath_vmaddr_pc => VM_ADDR <= GPR_PC;
|
when c_dpath_vmaddr_pc => VM_ADDR <= GPR_PC;
|
when others => null;
|
when others => null;
|
end case;
|
end case;
|
end process proc_vmaddr_sel;
|
end process proc_vmaddr_sel;
|
|
|
STAT.ccout_z <= CCOUT(2); -- current Z cc flag
|
STAT.ccout_z <= CCOUT(2); -- current Z cc flag
|
|
|
PSWOUT <= PSW;
|
PSWOUT <= PSW;
|
PCOUT <= GPR_PC;
|
PCOUT <= GPR_PC;
|
IREG <= R_IREG;
|
IREG <= R_IREG;
|
VM_DIN <= DRES;
|
VM_DIN <= DRES;
|
CP_DOUT <= R_CPDOUT;
|
CP_DOUT <= R_CPDOUT;
|
|
|
DM_STAT_DP.pc <= GPR_PC;
|
DM_STAT_DP.pc <= GPR_PC;
|
DM_STAT_DP.psw <= PSW;
|
DM_STAT_DP.psw <= PSW;
|
DM_STAT_DP.ireg <= R_IREG;
|
DM_STAT_DP.ireg <= R_IREG;
|
DM_STAT_DP.ireg_we <= CNTL.ireg_we;
|
DM_STAT_DP.ireg_we <= CNTL.ireg_we;
|
DM_STAT_DP.dsrc <= R_DSRC;
|
DM_STAT_DP.dsrc <= R_DSRC;
|
DM_STAT_DP.ddst <= R_DDST;
|
DM_STAT_DP.ddst <= R_DDST;
|
DM_STAT_DP.dtmp <= R_DTMP;
|
DM_STAT_DP.dtmp <= R_DTMP;
|
DM_STAT_DP.dres <= DRES;
|
DM_STAT_DP.dres <= DRES;
|
DM_STAT_DP.gpr_adst <= CNTL.gpr_adst;
|
DM_STAT_DP.gpr_adst <= CNTL.gpr_adst;
|
DM_STAT_DP.gpr_mode <= CNTL.gpr_mode;
|
DM_STAT_DP.gpr_mode <= CNTL.gpr_mode;
|
DM_STAT_DP.gpr_bytop <= CNTL.gpr_bytop;
|
DM_STAT_DP.gpr_bytop <= CNTL.gpr_bytop;
|
DM_STAT_DP.gpr_we <= CNTL.gpr_we;
|
DM_STAT_DP.gpr_we <= CNTL.gpr_we;
|
|
|
end syn;
|
end syn;
|
|
|