$Id: README_iso_jtag.txt 525 2013-07-06 12:19:39Z mueller $
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$Id: README_iso_jtag.txt 525 2013-07-06 12:19:39Z mueller $
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usb_jtag using Cypress FX2 chip
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usb_jtag using Cypress FX2 chip
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===============================
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===============================
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== General information ==
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== General information ==
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The code in this directory is for Cypress FX2 (e.g. CY7C68013A) and can be
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The code in this directory is for Cypress FX2 (e.g. CY7C68013A) and can be
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compiled with the SDCC compiler (I tried version 2.6 as shipped with Ubuntu
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compiled with the SDCC compiler (I tried version 2.6 as shipped with Ubuntu
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6.10). Once I had a version that could be compiled with Keil tools (until early
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6.10). Once I had a version that could be compiled with Keil tools (until early
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2007), but switched to SDCC because I usually develop on a Linux host.
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2007), but switched to SDCC because I usually develop on a Linux host.
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No logic beside the FX2 itself and only a few external components are required
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No logic beside the FX2 itself and only a few external components are required
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for a basic JTAG adapter. I don't have detailed schematics available; my test
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for a basic JTAG adapter. I don't have detailed schematics available; my test
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setup consists of a FX2 on a custom board where it's directly connected to a
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setup consists of a FX2 on a custom board where it's directly connected to a
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Cyclone FPGA.
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Cyclone FPGA.
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____________
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____________
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| Cypress |
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| Cypress |
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USB__| EZ-USB FX2 |__JTAG(TDI,TDO,TCK,TMS)
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USB__| EZ-USB FX2 |__JTAG(TDI,TDO,TCK,TMS)
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| CY7C68013A |
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| CY7C68013A |
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|____________|
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|____________|
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__|__________
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__|__________
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| 24 MHz XTAL |
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| 24 MHz XTAL |
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|_____________|
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|_____________|
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Similar boards are available from fpga4fun.com - the boards named "Saxo-L" and
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Similar boards are available from fpga4fun.com - the boards named "Saxo-L" and
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"Xylo-EM" are pre-wired for use with an adapted version of my code, while
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"Xylo-EM" are pre-wired for use with an adapted version of my code, while
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"Saxo" and "Xylo" can be used after soldering 4 extra wires:
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"Saxo" and "Xylo" can be used after soldering 4 extra wires:
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http://www.fpga4fun.com/board_Xylo.html
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http://www.fpga4fun.com/board_Xylo.html
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There's a discussion thread in the fpga4fun forum about this firmware:
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There's a discussion thread in the fpga4fun forum about this firmware:
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http://www.fpga4fun.com/forum/viewtopic.php?t=483
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http://www.fpga4fun.com/forum/viewtopic.php?t=483
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== Use with Nexys 1 / 2 Boards ==
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== Use with Nexys 1 / 2 Boards ==
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Through a contribution by Sune Mai, this code can be used with the Digilent
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Through a contribution by Sune Mai, this code can be used with the Digilent
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Nexys / Nexys2 boards.
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Nexys / Nexys2 boards.
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http://www.digilentinc.com/nexys/
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http://www.digilentinc.com/nexys/
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http://www.digilentinc.com/nexys2/
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http://www.digilentinc.com/nexys2/
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The hardware-specific code file is hw_nexys.c, just change the line
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The hardware-specific code file is hw_nexys.c, just change the line
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"HARDWARE=hw_basic" to "HARDWARE=hw_nexys" in the file "Makefile" to use it.
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"HARDWARE=hw_basic" to "HARDWARE=hw_nexys" in the file "Makefile" to use it.
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Also, you may use the "nexys2prog" script by Andy Ross, available from the
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Also, you may use the "nexys2prog" script by Andy Ross, available from the
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same place this code is available from:
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same place this code is available from:
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http://ixo-jtag.sourceforge.net/
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http://ixo-jtag.sourceforge.net/
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== Adapting the code to your hardware ==
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== Adapting the code to your hardware ==
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As is, the code assumes the following pin assignment:
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As is, the code assumes the following pin assignment:
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Port C.0: TDI
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Port C.0: TDI
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Port C.1: TDO
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Port C.1: TDO
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Port C.2: TCK
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Port C.2: TCK
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Port C.3: TMS
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Port C.3: TMS
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Other assignments are possible. If you have your signals connected to
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Other assignments are possible. If you have your signals connected to
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bit-addressable I/O pins (port A,B,C or D), I suggest you make a copy of
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bit-addressable I/O pins (port A,B,C or D), I suggest you make a copy of
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hw_basic.c and adapt the definitions and ProgIO_Init() in it to your needs.
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hw_basic.c and adapt the definitions and ProgIO_Init() in it to your needs.
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The file hw_saxo_l is even simpler to adapt if you want only JTAG and no AS/PS
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The file hw_saxo_l is even simpler to adapt if you want only JTAG and no AS/PS
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mode. If your signals are not on bit-addressable I/Os (that is, you're using
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mode. If your signals are not on bit-addressable I/Os (that is, you're using
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port E), you could base your adaptation on the slower hw_xpcu_i.c. You may
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port E), you could base your adaptation on the slower hw_xpcu_i.c. You may
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specify the name of your adapted hardware-specific file when "make"ing, e.g.:
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specify the name of your adapted hardware-specific file when "make"ing, e.g.:
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make HARDWARE=hw_saxo_l
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make HARDWARE=hw_saxo_l
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The USB identification data (vendor/product ID, strings, ...) can be modified
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The USB identification data (vendor/product ID, strings, ...) can be modified
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in dscr.a51. The firmware emulates the 128 byte EEPROM that usually holds
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in dscr.a51. The firmware emulates the 128 byte EEPROM that usually holds
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configuration data for the FT245 and which can be read from the host; its
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configuration data for the FT245 and which can be read from the host; its
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content (including checksum) is computed from the data in dscr.a51 as well.
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content (including checksum) is computed from the data in dscr.a51 as well.
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The WAKEUP pin should be high for the re-numeration to work reliably (thanks
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The WAKEUP pin should be high for the re-numeration to work reliably (thanks
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Jean/fpga4fun!).
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Jean/fpga4fun!).
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== Using it with Xilinx JTAG cable ==
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== Using it with Xilinx JTAG cable ==
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There is code to support running in the "Xilinx Platform Cable USB". If you
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There is code to support running in the "Xilinx Platform Cable USB". If you
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select HARDWARE=hw_xpcu_i or hw_xpcu_x at the top of the Makefile, a firmware
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select HARDWARE=hw_xpcu_i or hw_xpcu_x at the top of the Makefile, a firmware
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for the XPCU will be built. I've tested this only with unmodified CPLD version
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for the XPCU will be built. I've tested this only with unmodified CPLD version
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18 (0x12) on a Spartan-3E starter kit, as it was programmed by my WebPack 8.2i.
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18 (0x12) on a Spartan-3E starter kit, as it was programmed by my WebPack 8.2i.
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The code needs optimization; yet it is merely a proof of concept.
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The code needs optimization; yet it is merely a proof of concept.
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Compile for the XPCU with e.g. "make HARDWARE=hw_xpcu_x".
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Compile for the XPCU with e.g. "make HARDWARE=hw_xpcu_x".
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hw_xpcu_i: Access "internal" chain (the XPCU CPLD, IC3, itself)
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hw_xpcu_i: Access "internal" chain (the XPCU CPLD, IC3, itself)
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hw_xpcu_x: Access "external" chain (the Spartan 3E, PROM, etc.)
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hw_xpcu_x: Access "external" chain (the Spartan 3E, PROM, etc.)
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== History ==
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== History ==
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Changes since previous release 2008-07-05:
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Changes since previous release 2008-07-05:
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- Imported to SourceForge, please see the project page:
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- Imported to SourceForge, please see the project page:
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http://ixo-jtag.sourceforge.net/
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http://ixo-jtag.sourceforge.net/
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Changes since previous release on 2007-02-15:
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Changes since previous release on 2007-02-15:
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- Jean Nicolle contributed hw_saxo_l.c for the FX2 boards from fpga4fun.com
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- Jean Nicolle contributed hw_saxo_l.c for the FX2 boards from fpga4fun.com
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- fx2/Makefile fixed to build correct libfx2.lib even under Windows.
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- fx2/Makefile fixed to build correct libfx2.lib even under Windows.
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Changes since previous release on 2007-01-28:
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Changes since previous release on 2007-01-28:
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- Initial suppport for running on Xilinx XPCU.
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- Initial suppport for running on Xilinx XPCU.
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- New FX2 code, based on USRP2 from the GNU Radio Project;
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- New FX2 code, based on USRP2 from the GNU Radio Project;
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- Firmware can now be compiled using SDCC 2.6. No more Keil support.
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- Firmware can now be compiled using SDCC 2.6. No more Keil support.
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- EEPROM content is automatically computed from dscr.a51, including checksum.
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- EEPROM content is automatically computed from dscr.a51, including checksum.
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Changes since initial release on 2006-04-23:
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Changes since initial release on 2006-04-23:
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- added this readme.txt
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- added this readme.txt
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- reorganized my project folder: diff now created from Subversion repository
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- reorganized my project folder: diff now created from Subversion repository
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- stripped *.dist extension from eeprom.c and dscr.a51
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- stripped *.dist extension from eeprom.c and dscr.a51
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- added unique proper product and vendor ID (thanks to Antti Lukats!)
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- added unique proper product and vendor ID (thanks to Antti Lukats!)
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- fixed checksum in eeprom.c
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- fixed checksum in eeprom.c
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- added comments about AS/PS mode pins in usbjtag.c
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- added comments about AS/PS mode pins in usbjtag.c
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