/* $Id: main.c 472 2013-01-06 14:39:10Z mueller $ */
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/* $Id: main.c 472 2013-01-06 14:39:10Z mueller $ */
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/*
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/*
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* Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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* Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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* Code was forked from ixo-jtag.svn.sourceforge.net on 2011-07-17
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* Code was forked from ixo-jtag.svn.sourceforge.net on 2011-07-17
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*
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*
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* - original copyright and licence disclaimer --------------------------------
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* - original copyright and licence disclaimer --------------------------------
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* - Code that turns a Cypress FX2 USB Controller into an USB JTAG adapter
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* - Code that turns a Cypress FX2 USB Controller into an USB JTAG adapter
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* - Copyright (C) 2005..2007 Kolja Waschk, ixo.de
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* - Copyright (C) 2005..2007 Kolja Waschk, ixo.de
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* - This code is part of usbjtag. usbjtag is free software;
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* - This code is part of usbjtag. usbjtag is free software;
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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*
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*
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* This program is free software; you may redistribute and/or modify it under
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* This program is free software; you may redistribute and/or modify it under
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* the terms of the GNU General Public License as published by the Free
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* the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 2, or at your option any later version.
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* Software Foundation, either version 2, or at your option any later version.
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*
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*
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* This program is distributed in the hope that it will be useful, but
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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* WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for complete details.
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* for complete details.
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*
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*
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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*
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*
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* EZ-USB FX2 controller main program
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* EZ-USB FX2 controller main program
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*
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*
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* Revision History:
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* Revision History:
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*
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*
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* Date Rev Version Comment
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* Date Rev Version Comment
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* 2013-01-05 472 1.1.1 BUGFIX: explicitly set FIFOPINPOLAR=0
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* 2013-01-05 472 1.1.1 BUGFIX: explicitly set FIFOPINPOLAR=0
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* 2011-07-23 397 1.1 factor out usb_fifo_init() code
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* 2011-07-23 397 1.1 factor out usb_fifo_init() code
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* 2011-07-17 394 1.0 Initial version (from ixo-jtag/usb_jtag Rev 204)
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* 2011-07-17 394 1.0 Initial version (from ixo-jtag/usb_jtag Rev 204)
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*
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*
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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*/
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*/
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#include "isr.h"
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#include "isr.h"
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#include "timer.h"
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#include "timer.h"
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#include "delay.h"
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#include "delay.h"
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#include "fx2regs.h"
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#include "fx2regs.h"
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#include "fx2utils.h"
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#include "fx2utils.h"
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#include "usb_common.h"
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#include "usb_common.h"
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#include "usb_descriptors.h"
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#include "usb_descriptors.h"
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#include "usb_requests.h"
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#include "usb_requests.h"
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#include "syncdelay.h"
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#include "syncdelay.h"
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#include "eeprom.h"
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#include "eeprom.h"
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#include "hardware.h"
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#include "hardware.h"
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Define USE_MOD256_OUTBUFFER:
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// Define USE_MOD256_OUTBUFFER:
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// Saves about 256 bytes in code size, improves speed a little.
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// Saves about 256 bytes in code size, improves speed a little.
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// A further optimization could be not to use an extra output buffer at
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// A further optimization could be not to use an extra output buffer at
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// all, but to write directly into EP1INBUF. Not implemented yet. When
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// all, but to write directly into EP1INBUF. Not implemented yet. When
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// downloading large amounts of data _to_ the target, there is no output
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// downloading large amounts of data _to_ the target, there is no output
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// and thus the output buffer isn't used at all and doesn't slow down things.
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// and thus the output buffer isn't used at all and doesn't slow down things.
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#define USE_MOD256_OUTBUFFER 1
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#define USE_MOD256_OUTBUFFER 1
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Global data
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// Global data
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typedef bit BOOL;
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typedef bit BOOL;
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#define FALSE 0
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#define FALSE 0
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#define TRUE 1
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#define TRUE 1
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static BOOL Running;
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static BOOL Running;
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static BOOL WriteOnly;
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static BOOL WriteOnly;
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static BYTE ClockBytes;
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static BYTE ClockBytes;
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static WORD Pending;
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static WORD Pending;
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#ifdef USE_MOD256_OUTBUFFER
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#ifdef USE_MOD256_OUTBUFFER
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static BYTE FirstDataInOutBuffer;
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static BYTE FirstDataInOutBuffer;
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static BYTE FirstFreeInOutBuffer;
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static BYTE FirstFreeInOutBuffer;
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#else
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#else
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static WORD FirstDataInOutBuffer;
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static WORD FirstDataInOutBuffer;
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static WORD FirstFreeInOutBuffer;
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static WORD FirstFreeInOutBuffer;
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#endif
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#endif
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#ifdef USE_MOD256_OUTBUFFER
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#ifdef USE_MOD256_OUTBUFFER
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/* Size of output buffer must be exactly 256 */
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/* Size of output buffer must be exactly 256 */
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#define OUTBUFFER_LEN 0x100
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#define OUTBUFFER_LEN 0x100
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/* Output buffer must begin at some address with lower 8 bits all zero */
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/* Output buffer must begin at some address with lower 8 bits all zero */
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xdata at 0xE000 BYTE OutBuffer[OUTBUFFER_LEN];
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xdata at 0xE000 BYTE OutBuffer[OUTBUFFER_LEN];
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#else
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#else
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#define OUTBUFFER_LEN 0x200
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#define OUTBUFFER_LEN 0x200
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static xdata BYTE OutBuffer[OUTBUFFER_LEN];
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static xdata BYTE OutBuffer[OUTBUFFER_LEN];
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#endif
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#endif
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void usb_jtag_init(void) // Called once at startup
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void usb_jtag_init(void) // Called once at startup
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{
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{
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WORD tmp;
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WORD tmp;
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Running = FALSE;
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Running = FALSE;
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ClockBytes = 0;
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ClockBytes = 0;
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Pending = 0;
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Pending = 0;
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WriteOnly = TRUE;
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WriteOnly = TRUE;
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FirstDataInOutBuffer = 0;
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FirstDataInOutBuffer = 0;
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FirstFreeInOutBuffer = 0;
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FirstFreeInOutBuffer = 0;
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ProgIO_Init();
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ProgIO_Init();
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ProgIO_Enable();
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ProgIO_Enable();
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// Make Timer2 reload at 100 Hz to trigger Keepalive packets
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// Make Timer2 reload at 100 Hz to trigger Keepalive packets
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tmp = 65536 - ( 48000000 / 12 / 100 );
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tmp = 65536 - ( 48000000 / 12 / 100 );
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RCAP2H = tmp >> 8;
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RCAP2H = tmp >> 8;
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RCAP2L = tmp & 0xFF;
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RCAP2L = tmp & 0xFF;
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CKCON = 0; // Default Clock
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CKCON = 0; // Default Clock
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T2CON = 0x04; // Auto-reload mode using internal clock, no baud clock.
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T2CON = 0x04; // Auto-reload mode using internal clock, no baud clock.
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// Enable Autopointer
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// Enable Autopointer
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EXTACC = 1; // Enable
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EXTACC = 1; // Enable
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APTR1FZ = 1; // Don't freeze
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APTR1FZ = 1; // Don't freeze
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APTR2FZ = 1; // Don't freeze
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APTR2FZ = 1; // Don't freeze
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}
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}
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void OutputByte(BYTE d)
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void OutputByte(BYTE d)
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{
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{
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#ifdef USE_MOD256_OUTBUFFER
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#ifdef USE_MOD256_OUTBUFFER
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OutBuffer[FirstFreeInOutBuffer] = d;
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OutBuffer[FirstFreeInOutBuffer] = d;
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FirstFreeInOutBuffer = ( FirstFreeInOutBuffer + 1 ) & 0xFF;
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FirstFreeInOutBuffer = ( FirstFreeInOutBuffer + 1 ) & 0xFF;
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#else
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#else
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OutBuffer[FirstFreeInOutBuffer++] = d;
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OutBuffer[FirstFreeInOutBuffer++] = d;
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if(FirstFreeInOutBuffer >= OUTBUFFER_LEN) FirstFreeInOutBuffer = 0;
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if(FirstFreeInOutBuffer >= OUTBUFFER_LEN) FirstFreeInOutBuffer = 0;
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#endif
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#endif
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Pending++;
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Pending++;
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// usb_jtag_activity does most of the work. It now happens to behave just like
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// usb_jtag_activity does most of the work. It now happens to behave just like
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// the combination of FT245BM and Altera-programmed EPM7064 CPLD in Altera's
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// the combination of FT245BM and Altera-programmed EPM7064 CPLD in Altera's
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// USB-Blaster. The CPLD knows two major modes: Bit banging mode and Byte
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// USB-Blaster. The CPLD knows two major modes: Bit banging mode and Byte
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// shift mode. It starts in Bit banging mode. While bytes are received
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// shift mode. It starts in Bit banging mode. While bytes are received
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// from the host on EP2OUT, each byte B of them is processed as follows:
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// from the host on EP2OUT, each byte B of them is processed as follows:
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//
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//
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// Please note: nCE, nCS, LED pins and DATAOUT actually aren't supported here.
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// Please note: nCE, nCS, LED pins and DATAOUT actually aren't supported here.
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// Support for these would be required for AS/PS mode and isn't too complicated,
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// Support for these would be required for AS/PS mode and isn't too complicated,
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// but I haven't had the time yet.
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// but I haven't had the time yet.
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//
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//
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// Bit banging mode:
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// Bit banging mode:
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//
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//
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// 1. Remember bit 6 (0x40) in B as the "Read bit".
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// 1. Remember bit 6 (0x40) in B as the "Read bit".
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//
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//
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// 2. If bit 7 (0x40) is set, switch to Byte shift mode for the coming
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// 2. If bit 7 (0x40) is set, switch to Byte shift mode for the coming
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// X bytes ( X := B & 0x3F ), and don't do anything else now.
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// X bytes ( X := B & 0x3F ), and don't do anything else now.
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//
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//
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// 3. Otherwise, set the JTAG signals as follows:
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// 3. Otherwise, set the JTAG signals as follows:
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// TCK/DCLK high if bit 0 was set (0x01), otherwise low
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// TCK/DCLK high if bit 0 was set (0x01), otherwise low
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// TMS/nCONFIG high if bit 1 was set (0x02), otherwise low
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// TMS/nCONFIG high if bit 1 was set (0x02), otherwise low
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// nCE high if bit 2 was set (0x04), otherwise low
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// nCE high if bit 2 was set (0x04), otherwise low
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// nCS high if bit 3 was set (0x08), otherwise low
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// nCS high if bit 3 was set (0x08), otherwise low
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// TDI/ASDI/DATA0 high if bit 4 was set (0x10), otherwise low
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// TDI/ASDI/DATA0 high if bit 4 was set (0x10), otherwise low
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// Output Enable/LED active if bit 5 was set (0x20), otherwise low
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// Output Enable/LED active if bit 5 was set (0x20), otherwise low
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//
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//
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// 4. If "Read bit" (0x40) was set, record the state of TDO(CONF_DONE) and
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// 4. If "Read bit" (0x40) was set, record the state of TDO(CONF_DONE) and
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// DATAOUT(nSTATUS) pins and put it as a byte ((DATAOUT<<1)|TDO) in the
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// DATAOUT(nSTATUS) pins and put it as a byte ((DATAOUT<<1)|TDO) in the
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// output FIFO _to_ the host (the code here reads TDO only and assumes
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// output FIFO _to_ the host (the code here reads TDO only and assumes
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// DATAOUT=1)
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// DATAOUT=1)
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//
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//
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// Byte shift mode:
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// Byte shift mode:
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//
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//
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// 1. Load shift register with byte from host
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// 1. Load shift register with byte from host
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//
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//
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// 2. Do 8 times (i.e. for each bit of the byte; implemented in shift.a51)
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// 2. Do 8 times (i.e. for each bit of the byte; implemented in shift.a51)
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// 2a) if nCS=1, set carry bit from TDO, else set carry bit from DATAOUT
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// 2a) if nCS=1, set carry bit from TDO, else set carry bit from DATAOUT
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// 2b) Rotate shift register through carry bit
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// 2b) Rotate shift register through carry bit
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// 2c) TDI := Carry bit
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// 2c) TDI := Carry bit
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// 2d) Raise TCK, then lower TCK.
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// 2d) Raise TCK, then lower TCK.
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//
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//
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// 3. If "Read bit" was set when switching into byte shift mode,
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// 3. If "Read bit" was set when switching into byte shift mode,
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// record the shift register content and put it into the FIFO
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// record the shift register content and put it into the FIFO
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// _to_ the host.
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// _to_ the host.
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//
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//
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// Some more (minor) things to consider to emulate the FT245BM:
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// Some more (minor) things to consider to emulate the FT245BM:
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//
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//
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// a) The FT245BM seems to transmit just packets of no more than 64 bytes
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// a) The FT245BM seems to transmit just packets of no more than 64 bytes
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// (which perfectly matches the USB spec). Each packet starts with
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// (which perfectly matches the USB spec). Each packet starts with
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// two non-data bytes (I use 0x31,0x60 here). A USB sniffer on Windows
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// two non-data bytes (I use 0x31,0x60 here). A USB sniffer on Windows
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// might show a number of packets to you as if it was a large transfer
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// might show a number of packets to you as if it was a large transfer
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// because of the way that Windows understands it: it _is_ a large
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// because of the way that Windows understands it: it _is_ a large
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// transfer until terminated with an USB packet smaller than 64 byte.
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// transfer until terminated with an USB packet smaller than 64 byte.
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//
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//
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// b) The Windows driver expects to get some data packets (with at least
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// b) The Windows driver expects to get some data packets (with at least
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// the two leading bytes 0x31,0x60) immediately after "resetting" the
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// the two leading bytes 0x31,0x60) immediately after "resetting" the
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// FT chip and then in regular intervals. Otherwise a blue screen may
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// FT chip and then in regular intervals. Otherwise a blue screen may
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// appear... In the code below, I make sure that every 10ms there is
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// appear... In the code below, I make sure that every 10ms there is
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// some packet.
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// some packet.
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//
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//
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// c) Vendor specific commands to configure the FT245 are mostly ignored
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// c) Vendor specific commands to configure the FT245 are mostly ignored
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// in my code. Only those for reading the EEPROM are processed. See
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// in my code. Only those for reading the EEPROM are processed. See
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// DR_GetStatus and DR_VendorCmd below for my implementation.
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// DR_GetStatus and DR_VendorCmd below for my implementation.
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//
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//
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// All other TD_ and DR_ functions remain as provided with CY3681.
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// All other TD_ and DR_ functions remain as provided with CY3681.
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//
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//
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void usb_jtag_activity(void) // Called repeatedly while the device is idle
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void usb_jtag_activity(void) // Called repeatedly while the device is idle
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{
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{
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if(!Running) return;
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if(!Running) return;
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ProgIO_Poll();
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ProgIO_Poll();
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if(!(EP1INCS & bmEPBUSY)) {
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if(!(EP1INCS & bmEPBUSY)) {
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if(Pending > 0) {
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if(Pending > 0) {
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BYTE o, n;
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BYTE o, n;
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|
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AUTOPTRH2 = MSB( EP1INBUF );
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AUTOPTRH2 = MSB( EP1INBUF );
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AUTOPTRL2 = LSB( EP1INBUF );
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AUTOPTRL2 = LSB( EP1INBUF );
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XAUTODAT2 = 0x31;
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XAUTODAT2 = 0x31;
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XAUTODAT2 = 0x60;
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XAUTODAT2 = 0x60;
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if(Pending > 0x3E) { n = 0x3E; Pending -= n; }
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if(Pending > 0x3E) { n = 0x3E; Pending -= n; }
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else { n = Pending; Pending = 0; };
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else { n = Pending; Pending = 0; };
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o = n;
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o = n;
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#ifdef USE_MOD256_OUTBUFFER
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#ifdef USE_MOD256_OUTBUFFER
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APTR1H = MSB( OutBuffer );
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APTR1H = MSB( OutBuffer );
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APTR1L = FirstDataInOutBuffer;
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APTR1L = FirstDataInOutBuffer;
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while(n--) {
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while(n--) {
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XAUTODAT2 = XAUTODAT1;
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XAUTODAT2 = XAUTODAT1;
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APTR1H = MSB( OutBuffer ); // Stay within 256-Byte-Buffer
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APTR1H = MSB( OutBuffer ); // Stay within 256-Byte-Buffer
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}
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}
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FirstDataInOutBuffer = APTR1L;
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FirstDataInOutBuffer = APTR1L;
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#else
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#else
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APTR1H = MSB( &(OutBuffer[FirstDataInOutBuffer]) );
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APTR1H = MSB( &(OutBuffer[FirstDataInOutBuffer]) );
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APTR1L = LSB( &(OutBuffer[FirstDataInOutBuffer]) );
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APTR1L = LSB( &(OutBuffer[FirstDataInOutBuffer]) );
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while(n--) {
|
while(n--) {
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XAUTODAT2 = XAUTODAT1;
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XAUTODAT2 = XAUTODAT1;
|
|
|
if(++FirstDataInOutBuffer >= OUTBUFFER_LEN) {
|
if(++FirstDataInOutBuffer >= OUTBUFFER_LEN) {
|
FirstDataInOutBuffer = 0;
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FirstDataInOutBuffer = 0;
|
APTR1H = MSB( OutBuffer );
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APTR1H = MSB( OutBuffer );
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APTR1L = LSB( OutBuffer );
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APTR1L = LSB( OutBuffer );
|
}
|
}
|
}
|
}
|
#endif
|
#endif
|
SYNCDELAY;
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SYNCDELAY;
|
EP1INBC = 2 + o;
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EP1INBC = 2 + o;
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TF2 = 1; // Make sure there will be a short transfer soon
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TF2 = 1; // Make sure there will be a short transfer soon
|
} else if(TF2) {
|
} else if(TF2) {
|
EP1INBUF[0] = 0x31;
|
EP1INBUF[0] = 0x31;
|
EP1INBUF[1] = 0x60;
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EP1INBUF[1] = 0x60;
|
SYNCDELAY;
|
SYNCDELAY;
|
EP1INBC = 2;
|
EP1INBC = 2;
|
TF2 = 0;
|
TF2 = 0;
|
}
|
}
|
}
|
}
|
|
|
if(!(EP2468STAT & bmEP2EMPTY) && (Pending < OUTBUFFER_LEN-0x3F)) {
|
if(!(EP2468STAT & bmEP2EMPTY) && (Pending < OUTBUFFER_LEN-0x3F)) {
|
//BYTE i, n = EP2BCL; // bugfix by Sune Mai (Oct 2008,
|
//BYTE i, n = EP2BCL; // bugfix by Sune Mai (Oct 2008,
|
// https://sourceforge.net/projects/urjtag/forums/forum/682993/topic/2312452)
|
// https://sourceforge.net/projects/urjtag/forums/forum/682993/topic/2312452)
|
WORD i, n = EP2BCL|EP2BCH<<8;
|
WORD i, n = EP2BCL|EP2BCH<<8;
|
|
|
APTR1H = MSB( EP2FIFOBUF );
|
APTR1H = MSB( EP2FIFOBUF );
|
APTR1L = LSB( EP2FIFOBUF );
|
APTR1L = LSB( EP2FIFOBUF );
|
|
|
for(i=0;i<n;) {
|
for(i=0;i<n;) {
|
if(ClockBytes > 0) {
|
if(ClockBytes > 0) {
|
//BYTE m; // bugfix by Sune Mai, see above
|
//BYTE m; // bugfix by Sune Mai, see above
|
WORD m;
|
WORD m;
|
|
|
m = n-i;
|
m = n-i;
|
if(ClockBytes < m) m = ClockBytes;
|
if(ClockBytes < m) m = ClockBytes;
|
ClockBytes -= m;
|
ClockBytes -= m;
|
i += m;
|
i += m;
|
|
|
/* Shift out 8 bits from d */
|
/* Shift out 8 bits from d */
|
|
|
if(WriteOnly) { /* Shift out 8 bits from d */
|
if(WriteOnly) { /* Shift out 8 bits from d */
|
while(m--) ProgIO_ShiftOut(XAUTODAT1);
|
while(m--) ProgIO_ShiftOut(XAUTODAT1);
|
} else { /* Shift in 8 bits at the other end */
|
} else { /* Shift in 8 bits at the other end */
|
while(m--) OutputByte(ProgIO_ShiftInOut(XAUTODAT1));
|
while(m--) OutputByte(ProgIO_ShiftInOut(XAUTODAT1));
|
}
|
}
|
} else {
|
} else {
|
BYTE d = XAUTODAT1;
|
BYTE d = XAUTODAT1;
|
WriteOnly = (d & bmBIT6) ? FALSE : TRUE;
|
WriteOnly = (d & bmBIT6) ? FALSE : TRUE;
|
|
|
if(d & bmBIT7) {
|
if(d & bmBIT7) {
|
/* Prepare byte transfer, do nothing else yet */
|
/* Prepare byte transfer, do nothing else yet */
|
|
|
ClockBytes = d & 0x3F;
|
ClockBytes = d & 0x3F;
|
} else {
|
} else {
|
if(WriteOnly)
|
if(WriteOnly)
|
ProgIO_Set_State(d);
|
ProgIO_Set_State(d);
|
else
|
else
|
OutputByte(ProgIO_Set_Get_State(d));
|
OutputByte(ProgIO_Set_Get_State(d));
|
}
|
}
|
i++;
|
i++;
|
}
|
}
|
}
|
}
|
|
|
SYNCDELAY;
|
SYNCDELAY;
|
EP2BCL = 0x80; // Re-arm endpoint 2
|
EP2BCL = 0x80; // Re-arm endpoint 2
|
};
|
};
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
// Handler for Vendor Requests (
|
// Handler for Vendor Requests (
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
unsigned char app_vendor_cmd(void)
|
unsigned char app_vendor_cmd(void)
|
{
|
{
|
// OUT requests. Pretend we handle them all...
|
// OUT requests. Pretend we handle them all...
|
|
|
if ((bRequestType & bmRT_DIR_MASK) == bmRT_DIR_OUT) {
|
if ((bRequestType & bmRT_DIR_MASK) == bmRT_DIR_OUT) {
|
if(bRequest == RQ_GET_STATUS) {
|
if(bRequest == RQ_GET_STATUS) {
|
Running = 1;
|
Running = 1;
|
}
|
}
|
return 1;
|
return 1;
|
}
|
}
|
|
|
// IN requests.
|
// IN requests.
|
|
|
if(bRequest == 0x90) {
|
if(bRequest == 0x90) {
|
BYTE addr = (wIndexL<<1) & 0x7F;
|
BYTE addr = (wIndexL<<1) & 0x7F;
|
EP0BUF[0] = eeprom[addr];
|
EP0BUF[0] = eeprom[addr];
|
EP0BUF[1] = eeprom[addr+1];
|
EP0BUF[1] = eeprom[addr+1];
|
} else {
|
} else {
|
// dummy data
|
// dummy data
|
EP0BUF[0] = 0x36;
|
EP0BUF[0] = 0x36;
|
EP0BUF[1] = 0x83;
|
EP0BUF[1] = 0x83;
|
}
|
}
|
|
|
EP0BCH = 0;
|
EP0BCH = 0;
|
EP0BCL = (wLengthL<2) ? wLengthL : 2; // Arm endpoint with # bytes to transfer
|
EP0BCL = (wLengthL<2) ? wLengthL : 2; // Arm endpoint with # bytes to transfer
|
|
|
return 1;
|
return 1;
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
static void main_loop(void)
|
static void main_loop(void)
|
{
|
{
|
while(1) {
|
while(1) {
|
if(usb_setup_packet_avail()) usb_handle_setup_packet();
|
if(usb_setup_packet_avail()) usb_handle_setup_packet();
|
usb_jtag_activity();
|
usb_jtag_activity();
|
}
|
}
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
extern void usb_fifo_init(void);
|
extern void usb_fifo_init(void);
|
|
|
void main(void)
|
void main(void)
|
{
|
{
|
EA = 0; // disable all interrupts
|
EA = 0; // disable all interrupts
|
|
|
// Digilent nexys3 and atlys boards change FIFOPINPOLAR such that
|
// Digilent nexys3 and atlys boards change FIFOPINPOLAR such that
|
// EE and FF are active high. In nexys2 boards they are active low
|
// EE and FF are active high. In nexys2 boards they are active low
|
// All config regs should be set (even when power on defaults are
|
// All config regs should be set (even when power on defaults are
|
// use, but this one especially....
|
// use, but this one especially....
|
FIFOPINPOLAR = 0;
|
FIFOPINPOLAR = 0;
|
|
|
usb_jtag_init();
|
usb_jtag_init();
|
usb_fifo_init();
|
usb_fifo_init();
|
eeprom_init();
|
eeprom_init();
|
setup_autovectors ();
|
setup_autovectors ();
|
usb_install_handlers ();
|
usb_install_handlers ();
|
|
|
|
|
EA = 1; // enable interrupts
|
EA = 1; // enable interrupts
|
|
|
fx2_renumerate(); // simulates disconnect / reconnect
|
fx2_renumerate(); // simulates disconnect / reconnect
|
|
|
main_loop();
|
main_loop();
|
}
|
}
|
|
|
|
|
|
|
|
|
|
|