# $Id: test_w11a_dstw_word_flow.tcl 575 2014-07-27 20:55:41Z mueller $
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# $Id: test_w11a_dstw_word_flow.tcl 575 2014-07-27 20:55:41Z mueller $
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#
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#
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# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
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# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
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#
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#
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# Revision History:
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# Revision History:
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# Date Rev Version Comment
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# Date Rev Version Comment
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# 2014-07-27 575 1.0.2 drop tout value from asmwait, reply on asmwait_tout
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# 2014-07-27 575 1.0.2 drop tout value from asmwait, reply on asmwait_tout
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# 2014-03-01 552 1.0.1 check that unused regs stay 0
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# 2014-03-01 552 1.0.1 check that unused regs stay 0
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# 2013-03-31 502 1.0 Initial version
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# 2013-03-31 502 1.0 Initial version
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#
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#
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# Test dstw flow with mov #nnn,... instructions for word access
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# Test dstw flow with mov #nnn,... instructions for word access
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#
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#
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# ----------------------------------------------------------------------------
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# ----------------------------------------------------------------------------
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rlc log "test_w11a_dstw_word_flow: test dstw flow for word with mov #nnn,..."
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rlc log "test_w11a_dstw_word_flow: test dstw flow for word with mov #nnn,..."
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rlc log " r0,(r0),(r0)+,@(r0)+,-(r0),@-(r0) (mode=0,1,2,3,4,5)"
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rlc log " r0,(r0),(r0)+,@(r0)+,-(r0),@-(r0) (mode=0,1,2,3,4,5)"
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# code register pre/post conditions beyond defaults
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# code register pre/post conditions beyond defaults
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# r0 -> 0100
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# r0 -> 0100
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# r1 #data1 -> ..same
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# r1 #data1 -> ..same
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# r2 #data2 -> #data2+4
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# r2 #data2 -> #data2+4
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# r3 #pdata3 -> #pdata3+4
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# r3 #pdata3 -> #pdata3+4
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# r4 #data4e -> #data4e-4
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# r4 #data4e -> #data4e-4
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# r5 #pdat5e -> #pdat5e-4
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# r5 #pdat5e -> #pdat5e-4
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$cpu ldasm -lst lst -sym sym {
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$cpu ldasm -lst lst -sym sym {
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. = 1000
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. = 1000
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start: mov #100,r0
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start: mov #100,r0
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mov #110,(r1)
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mov #110,(r1)
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mov #120,(r2)+
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mov #120,(r2)+
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mov #121,(r2)+
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mov #121,(r2)+
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mov #130,@(r3)+
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mov #130,@(r3)+
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mov #131,@(r3)+
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mov #131,@(r3)+
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mov #141,-(r4)
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mov #141,-(r4)
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mov #140,-(r4)
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mov #140,-(r4)
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mov #151,@-(r5)
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mov #151,@-(r5)
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mov #150,@-(r5)
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mov #150,@-(r5)
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halt
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halt
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stop:
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stop:
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;
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;
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data1: .word 0
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data1: .word 0
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data2: .word 0,0
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data2: .word 0,0
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data3: .word 0,0
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data3: .word 0,0
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data4: .word 0,0
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data4: .word 0,0
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data4e:
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data4e:
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data5: .word 0,0
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data5: .word 0,0
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data5e:
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data5e:
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pdata3: .word data3,data3+2
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pdata3: .word data3,data3+2
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pdata5: .word data5,data5+2
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pdata5: .word data5,data5+2
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pdat5e:
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pdat5e:
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}
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}
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rw11::asmrun $cpu sym [list r1 $sym(data1) \
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rw11::asmrun $cpu sym [list r1 $sym(data1) \
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r2 $sym(data2) \
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r2 $sym(data2) \
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r3 $sym(pdata3) \
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r3 $sym(pdata3) \
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r4 $sym(data4e) \
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r4 $sym(data4e) \
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r5 $sym(pdat5e) ]
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r5 $sym(pdat5e) ]
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rw11::asmwait $cpu sym
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rw11::asmwait $cpu sym
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rw11::asmtreg $cpu [list r0 0100 \
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rw11::asmtreg $cpu [list r0 0100 \
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r1 $sym(data1) \
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r1 $sym(data1) \
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r2 [expr {$sym(data2) + 4}] \
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r2 [expr {$sym(data2) + 4}] \
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r3 [expr {$sym(pdata3) + 4}] \
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r3 [expr {$sym(pdata3) + 4}] \
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r4 [expr {$sym(data4e) - 4}] \
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r4 [expr {$sym(data4e) - 4}] \
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r5 [expr {$sym(pdat5e) - 4}] ]
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r5 [expr {$sym(pdat5e) - 4}] ]
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rw11::asmtmem $cpu $sym(data1) {0110 0120 0121 0130 0131 0140 0141 0150 0151}
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rw11::asmtmem $cpu $sym(data1) {0110 0120 0121 0130 0131 0140 0141 0150 0151}
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# ----------------------------------------------------------------------------
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# ----------------------------------------------------------------------------
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rlc log " nn(r0),@nn(r0),var,@var,@#var (mode=6,7,67,77,37)"
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rlc log " nn(r0),@nn(r0),var,@var,@#var (mode=6,7,67,77,37)"
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# code register pre/post conditions beyond defaults
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# code register pre/post conditions beyond defaults
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# r0 #data0-020 -> ..same
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# r0 #data0-020 -> ..same
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# r1 #pdata0-040 -> ..same
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# r1 #pdata0-040 -> ..same
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$cpu ldasm -lst lst -sym sym {
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$cpu ldasm -lst lst -sym sym {
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. = 1000
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. = 1000
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start: mov #200,20(r0)
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start: mov #200,20(r0)
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mov #210,@40(r1)
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mov #210,@40(r1)
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mov #220,data2
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mov #220,data2
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mov #230,@pdata3
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mov #230,@pdata3
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mov #240,@#data4
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mov #240,@#data4
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halt
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halt
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stop:
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stop:
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;
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;
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data0: .word 0
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data0: .word 0
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data1: .word 0
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data1: .word 0
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data2: .word 0
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data2: .word 0
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data3: .word 0
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data3: .word 0
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data4: .word 0
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data4: .word 0
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data4e:
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data4e:
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pdata1: .word data1
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pdata1: .word data1
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pdata3: .word data3
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pdata3: .word data3
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}
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}
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rw11::asmrun $cpu sym [list r0 [expr {$sym(data0)-020}] \
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rw11::asmrun $cpu sym [list r0 [expr {$sym(data0)-020}] \
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r1 [expr {$sym(pdata1)-040}] ]
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r1 [expr {$sym(pdata1)-040}] ]
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rw11::asmwait $cpu sym
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rw11::asmwait $cpu sym
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rw11::asmtreg $cpu [list r0 [expr {$sym(data0)-020}] \
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rw11::asmtreg $cpu [list r0 [expr {$sym(data0)-020}] \
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r1 [expr {$sym(pdata1)-040}] \
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r1 [expr {$sym(pdata1)-040}] \
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r2 0 \
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r2 0 \
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r3 0 \
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r3 0 \
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r4 0 \
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r4 0 \
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r5 0 ]
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r5 0 ]
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rw11::asmtmem $cpu $sym(data0) {0200 0210 0220 0230 0240}
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rw11::asmtmem $cpu $sym(data0) {0200 0210 0220 0230 0240}
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