-- $Id: ibdr_tm11.vhd 690 2015-06-07 18:23:51Z mueller $
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-- $Id: ibdr_tm11.vhd 690 2015-06-07 18:23:51Z mueller $
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--
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--
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-- Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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-- Software Foundation, either version 2, or at your option any later version.
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--
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--
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-- This program is distributed in the hope that it will be useful, but
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-- This program is distributed in the hope that it will be useful, but
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for complete details.
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-- for complete details.
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--
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--
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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-- Module Name: ibdr_tm11 - syn
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-- Module Name: ibdr_tm11 - syn
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-- Description: ibus dev(rem): TM11
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-- Description: ibus dev(rem): TM11
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--
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--
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-- Dependencies: -
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-- Dependencies: -
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-- Test bench: -
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-- Test bench: -
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-- Target Devices: generic
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-- Target Devices: generic
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-- Tool versions: ise 14.7; viv 2014.4; ghdl 0.31
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-- Tool versions: ise 14.7; viv 2014.4; ghdl 0.31
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--
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--
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-- Synthesized (xst):
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-- Synthesized (xst):
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-- Date Rev ise Target flop lutl lutm slic t peri
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-- Date Rev ise Target flop lutl lutm slic t peri
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-- 2015-06-04 686 14.7 131013 xc6slx16-2 79 144 0 53 s 4.4
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-- 2015-06-04 686 14.7 131013 xc6slx16-2 79 144 0 53 s 4.4
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-- 2015-05-15 682 14.7 131013 xc6slx16-2 117 209 0 76 s 3.7
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-- 2015-05-15 682 14.7 131013 xc6slx16-2 117 209 0 76 s 3.7
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--
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--
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-- Revision History:
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-- Revision History:
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-- Date Rev Version Comment
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-- Date Rev Version Comment
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-- 2015-06-04 686 1.0 Initial version
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-- 2015-06-04 686 1.0 Initial version
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-- 2015-05-15 682 0.1 First draft
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-- 2015-05-15 682 0.1 First draft
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use ieee.numeric_std.all;
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use work.slvtypes.all;
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use work.slvtypes.all;
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use work.iblib.all;
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use work.iblib.all;
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-- ----------------------------------------------------------------------------
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-- ----------------------------------------------------------------------------
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entity ibdr_tm11 is -- ibus dev(rem): TM11
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entity ibdr_tm11 is -- ibus dev(rem): TM11
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-- fixed address: 172520
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-- fixed address: 172520
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port (
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port (
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CLK : in slbit; -- clock
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CLK : in slbit; -- clock
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BRESET : in slbit; -- ibus reset
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BRESET : in slbit; -- ibus reset
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RB_LAM : out slbit; -- remote attention
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RB_LAM : out slbit; -- remote attention
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_SRES : out ib_sres_type; -- ibus response
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IB_SRES : out ib_sres_type; -- ibus response
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EI_REQ : out slbit; -- interrupt request
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EI_REQ : out slbit; -- interrupt request
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EI_ACK : in slbit -- interrupt acknowledge
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EI_ACK : in slbit -- interrupt acknowledge
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);
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);
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end ibdr_tm11;
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end ibdr_tm11;
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architecture syn of ibdr_tm11 is
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architecture syn of ibdr_tm11 is
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constant ibaddr_tm11 : slv16 := slv(to_unsigned(8#172520#,16));
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constant ibaddr_tm11 : slv16 := slv(to_unsigned(8#172520#,16));
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constant ibaddr_sr : slv3 := "000"; -- sr address offset
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constant ibaddr_sr : slv3 := "000"; -- sr address offset
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constant ibaddr_cr : slv3 := "001"; -- cr address offset
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constant ibaddr_cr : slv3 := "001"; -- cr address offset
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constant ibaddr_bc : slv3 := "010"; -- bc address offset
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constant ibaddr_bc : slv3 := "010"; -- bc address offset
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constant ibaddr_ba : slv3 := "011"; -- ba address offset
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constant ibaddr_ba : slv3 := "011"; -- ba address offset
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constant ibaddr_db : slv3 := "100"; -- db address offset
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constant ibaddr_db : slv3 := "100"; -- db address offset
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constant ibaddr_rl : slv3 := "101"; -- rl address offset
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constant ibaddr_rl : slv3 := "101"; -- rl address offset
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constant sr_ibf_icmd : integer := 15;
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constant sr_ibf_icmd : integer := 15;
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constant sr_ibf_eof : integer := 14;
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constant sr_ibf_eof : integer := 14;
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constant sr_ibf_pae : integer := 12;
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constant sr_ibf_pae : integer := 12;
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constant sr_ibf_eot : integer := 10;
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constant sr_ibf_eot : integer := 10;
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constant sr_ibf_rle : integer := 9;
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constant sr_ibf_rle : integer := 9;
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constant sr_ibf_bte : integer := 8;
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constant sr_ibf_bte : integer := 8;
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constant sr_ibf_nxm : integer := 7;
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constant sr_ibf_nxm : integer := 7;
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constant sr_ibf_onl : integer := 6;
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constant sr_ibf_onl : integer := 6;
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constant sr_ibf_bot : integer := 5;
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constant sr_ibf_bot : integer := 5;
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constant sr_ibf_wrl : integer := 2;
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constant sr_ibf_wrl : integer := 2;
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constant sr_ibf_rew : integer := 1;
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constant sr_ibf_rew : integer := 1;
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constant sr_ibf_tur : integer := 0;
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constant sr_ibf_tur : integer := 0;
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constant cr_ibf_err : integer := 15;
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constant cr_ibf_err : integer := 15;
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subtype cr_ibf_den is integer range 14 downto 13;
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subtype cr_ibf_den is integer range 14 downto 13;
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constant cr_ibf_ini : integer := 12;
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constant cr_ibf_ini : integer := 12;
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constant cr_ibf_pevn : integer := 11;
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constant cr_ibf_pevn : integer := 11;
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constant cr_ibf_unit2 : integer := 10;
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constant cr_ibf_unit2 : integer := 10;
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subtype cr_ibf_unit is integer range 9 downto 8;
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subtype cr_ibf_unit is integer range 9 downto 8;
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constant cr_ibf_rdy : integer := 7;
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constant cr_ibf_rdy : integer := 7;
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constant cr_ibf_ie : integer := 6;
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constant cr_ibf_ie : integer := 6;
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subtype cr_ibf_ea is integer range 5 downto 4;
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subtype cr_ibf_ea is integer range 5 downto 4;
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subtype cr_ibf_func is integer range 3 downto 1;
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subtype cr_ibf_func is integer range 3 downto 1;
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constant cr_ibf_go : integer := 0;
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constant cr_ibf_go : integer := 0;
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subtype ba_ibf_ba is integer range 15 downto 1;
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subtype ba_ibf_ba is integer range 15 downto 1;
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subtype db_ibf_db is integer range 7 downto 0;
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subtype db_ibf_db is integer range 7 downto 0;
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constant rl_ibf_reof : integer := 10;
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constant rl_ibf_reof : integer := 10;
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constant rl_ibf_reot : integer := 9;
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constant rl_ibf_reot : integer := 9;
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constant rl_ibf_ronl : integer := 8;
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constant rl_ibf_ronl : integer := 8;
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constant rl_ibf_rbot : integer := 7;
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constant rl_ibf_rbot : integer := 7;
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constant rl_ibf_rwrl : integer := 6;
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constant rl_ibf_rwrl : integer := 6;
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constant rl_ibf_rrew : integer := 5;
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constant rl_ibf_rrew : integer := 5;
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subtype rl_ibf_runit is integer range 2 downto 1;
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subtype rl_ibf_runit is integer range 2 downto 1;
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constant func_unload : slv3 := "000"; -- func: unload
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constant func_unload : slv3 := "000"; -- func: unload
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constant func_read : slv3 := "001"; -- func: read
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constant func_read : slv3 := "001"; -- func: read
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constant func_write : slv3 := "010"; -- func: write
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constant func_write : slv3 := "010"; -- func: write
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constant func_weof : slv3 := "011"; -- func: write eof
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constant func_weof : slv3 := "011"; -- func: write eof
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constant func_sforw : slv3 := "100"; -- func: space forward
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constant func_sforw : slv3 := "100"; -- func: space forward
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constant func_sback : slv3 := "101"; -- func: space backward
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constant func_sback : slv3 := "101"; -- func: space backward
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constant func_wrteg : slv3 := "110"; -- func: write extend interrec gap
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constant func_wrteg : slv3 := "110"; -- func: write extend interrec gap
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constant func_rewind : slv3 := "111"; -- func: rewind
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constant func_rewind : slv3 := "111"; -- func: rewind
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constant rfunc_wunit : slv3 := "001"; -- rem func: write runit
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constant rfunc_wunit : slv3 := "001"; -- rem func: write runit
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constant rfunc_done : slv3 := "010"; -- rem func: done (set rdy)
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constant rfunc_done : slv3 := "010"; -- rem func: done (set rdy)
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-- cs1 usage for rem functions
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-- cs1 usage for rem functions
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subtype cr_ibf_runit is integer range 5 downto 4; -- new runit (_wunit)
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subtype cr_ibf_runit is integer range 5 downto 4; -- new runit (_wunit)
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constant cr_ibf_ricmd : integer := 15; -- new icmd (_done)
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constant cr_ibf_ricmd : integer := 15; -- new icmd (_done)
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constant cr_ibf_rpae : integer := 12; -- new pae (_done)
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constant cr_ibf_rpae : integer := 12; -- new pae (_done)
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constant cr_ibf_rrle : integer := 9; -- new rle (_done)
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constant cr_ibf_rrle : integer := 9; -- new rle (_done)
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constant cr_ibf_rbte : integer := 8; -- new bte (_done)
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constant cr_ibf_rbte : integer := 8; -- new bte (_done)
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constant cr_ibf_rnxm : integer := 7; -- new nxm (_done)
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constant cr_ibf_rnxm : integer := 7; -- new nxm (_done)
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constant cr_ibf_reaena : integer := 6; -- ena ea (_done)
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constant cr_ibf_reaena : integer := 6; -- ena ea (_done)
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subtype cr_ibf_rea is integer range 5 downto 4; -- new ea (_done)
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subtype cr_ibf_rea is integer range 5 downto 4; -- new ea (_done)
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type regs_type is record -- state registers
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type regs_type is record -- state registers
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ibsel : slbit; -- ibus select
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ibsel : slbit; -- ibus select
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sricmd : slbit; -- sr: invalid command
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sricmd : slbit; -- sr: invalid command
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srpae: slbit; -- sr: parity error
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srpae: slbit; -- sr: parity error
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srrle: slbit; -- sr: record length error
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srrle: slbit; -- sr: record length error
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srbte: slbit; -- sr: bad tape error
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srbte: slbit; -- sr: bad tape error
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srnxm: slbit; -- sr: non-existent memory
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srnxm: slbit; -- sr: non-existent memory
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sreof: slv4; -- sr: eof-of-file
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sreof: slv4; -- sr: eof-of-file
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sreot: slv4; -- sr: eof-of-tape
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sreot: slv4; -- sr: eof-of-tape
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sronl: slv4; -- sr: online
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sronl: slv4; -- sr: online
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srbot: slv4; -- sr: begin-of-tape
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srbot: slv4; -- sr: begin-of-tape
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srwrl: slv4; -- sr: write-locked
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srwrl: slv4; -- sr: write-locked
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srrew: slv4; -- sr: rewinding
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srrew: slv4; -- sr: rewinding
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crden: slv2; -- cr: density
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crden: slv2; -- cr: density
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crpevn: slbit; -- cr: even oarity
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crpevn: slbit; -- cr: even oarity
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crunit2: slbit; -- cr: unit[2]
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crunit2: slbit; -- cr: unit[2]
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crunit: slv2; -- cr: unit[1:0]
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crunit: slv2; -- cr: unit[1:0]
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crrdy: slbit; -- cr: controller ready
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crrdy: slbit; -- cr: controller ready
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crie: slbit; -- cr: interrupt enable
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crie: slbit; -- cr: interrupt enable
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crea: slv2; -- cr: address extension
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crea: slv2; -- cr: address extension
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crfunc: slv3; -- cr: func code
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crfunc: slv3; -- cr: func code
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bc : slv16; -- bc: byte count
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bc : slv16; -- bc: byte count
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ba : slv16_1; -- ba: bus address
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ba : slv16_1; -- ba: bus address
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runit : slv2; -- rem access unit
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runit : slv2; -- rem access unit
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resreq : slbit; -- reset requested
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resreq : slbit; -- reset requested
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ireq : slbit; -- interrupt request flag
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ireq : slbit; -- interrupt request flag
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end record regs_type;
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end record regs_type;
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constant regs_init : regs_type := (
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constant regs_init : regs_type := (
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'0', -- ibsel
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'0', -- ibsel
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'0','0','0','0','0', -- sricmd,srpae,srrle,srbte,srnxm
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'0','0','0','0','0', -- sricmd,srpae,srrle,srbte,srnxm
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(others=>'0'), -- sreof
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(others=>'0'), -- sreof
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(others=>'0'), -- sreot
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(others=>'0'), -- sreot
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(others=>'0'), -- sronl
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(others=>'0'), -- sronl
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(others=>'0'), -- srbot
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(others=>'0'), -- srbot
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(others=>'0'), -- srwrl
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(others=>'0'), -- srwrl
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(others=>'0'), -- srrew
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(others=>'0'), -- srrew
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(others=>'0'), -- crden
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(others=>'0'), -- crden
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'0','0', -- crpevn,crunit2
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'0','0', -- crpevn,crunit2
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(others=>'0'), -- crunit
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(others=>'0'), -- crunit
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'1','0', -- crrdy, crie
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'1','0', -- crrdy, crie
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(others=>'0'), -- crea
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(others=>'0'), -- crea
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(others=>'0'), -- crfunc
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(others=>'0'), -- crfunc
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(others=>'0'), -- bc
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(others=>'0'), -- bc
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(others=>'0'), -- ba
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(others=>'0'), -- ba
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(others=>'0'), -- runit
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(others=>'0'), -- runit
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'0', -- resreq
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'0', -- resreq
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'0' -- ireq
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'0' -- ireq
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);
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);
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signal R_REGS : regs_type := regs_init;
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signal R_REGS : regs_type := regs_init;
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signal N_REGS : regs_type := regs_init;
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signal N_REGS : regs_type := regs_init;
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begin
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begin
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proc_regs: process (CLK)
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proc_regs: process (CLK)
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begin
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begin
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if rising_edge(CLK) then
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if rising_edge(CLK) then
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R_REGS <= N_REGS;
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R_REGS <= N_REGS;
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end if;
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end if;
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end process proc_regs;
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end process proc_regs;
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proc_next : process (R_REGS, IB_MREQ, EI_ACK)
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proc_next : process (R_REGS, IB_MREQ, EI_ACK)
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variable r : regs_type := regs_init;
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variable r : regs_type := regs_init;
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variable n : regs_type := regs_init;
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variable n : regs_type := regs_init;
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variable ibhold : slbit := '0';
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variable ibhold : slbit := '0';
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variable idout : slv16 := (others=>'0');
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variable idout : slv16 := (others=>'0');
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variable ibrem : slbit := '0';
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variable ibrem : slbit := '0';
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variable ibreq : slbit := '0';
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variable ibreq : slbit := '0';
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variable ibrd : slbit := '0';
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variable ibrd : slbit := '0';
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variable ibw0 : slbit := '0';
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variable ibw0 : slbit := '0';
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variable ibw1 : slbit := '0';
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variable ibw1 : slbit := '0';
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variable ibwrem : slbit := '0';
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variable ibwrem : slbit := '0';
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variable ilam : slbit := '0';
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variable ilam : slbit := '0';
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begin
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begin
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r := R_REGS;
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r := R_REGS;
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n := R_REGS;
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n := R_REGS;
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ibhold := '0';
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ibhold := '0';
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idout := (others=>'0');
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idout := (others=>'0');
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ibrem := IB_MREQ.racc;
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ibrem := IB_MREQ.racc;
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ibreq := IB_MREQ.re or IB_MREQ.we;
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ibreq := IB_MREQ.re or IB_MREQ.we;
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ibrd := IB_MREQ.re;
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ibrd := IB_MREQ.re;
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ibw0 := IB_MREQ.we and IB_MREQ.be0;
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ibw0 := IB_MREQ.we and IB_MREQ.be0;
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ibw1 := IB_MREQ.we and IB_MREQ.be1;
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ibw1 := IB_MREQ.we and IB_MREQ.be1;
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ibwrem := IB_MREQ.we and ibrem;
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ibwrem := IB_MREQ.we and ibrem;
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ilam := '0';
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ilam := '0';
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-- ibus address decoder
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-- ibus address decoder
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n.ibsel := '0';
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n.ibsel := '0';
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if IB_MREQ.aval = '1' and
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if IB_MREQ.aval = '1' and
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IB_MREQ.addr(12 downto 4)=ibaddr_tm11(12 downto 4) and
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IB_MREQ.addr(12 downto 4)=ibaddr_tm11(12 downto 4) and
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unsigned(IB_MREQ.addr(3 downto 1)) <= unsigned(ibaddr_rl) then
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unsigned(IB_MREQ.addr(3 downto 1)) <= unsigned(ibaddr_rl) then
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n.ibsel := '1';
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n.ibsel := '1';
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end if;
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end if;
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-- ibus transactions
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-- ibus transactions
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if r.ibsel='1' then -- selected
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if r.ibsel='1' then -- selected
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case IB_MREQ.addr(3 downto 1) is
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case IB_MREQ.addr(3 downto 1) is
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when ibaddr_sr => -- SR -- status register ----------
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when ibaddr_sr => -- SR -- status register ----------
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idout(sr_ibf_icmd) := r.sricmd;
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idout(sr_ibf_icmd) := r.sricmd;
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idout(sr_ibf_pae) := r.srpae;
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idout(sr_ibf_pae) := r.srpae;
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idout(sr_ibf_rle) := r.srrle;
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idout(sr_ibf_rle) := r.srrle;
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idout(sr_ibf_bte) := r.srbte;
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idout(sr_ibf_bte) := r.srbte;
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idout(sr_ibf_nxm) := r.srnxm;
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idout(sr_ibf_nxm) := r.srnxm;
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idout(sr_ibf_tur) := r.crrdy; -- FIXME: is this correct ??
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idout(sr_ibf_tur) := r.crrdy; -- FIXME: is this correct ??
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-- only units 0,..3 supported, for unit 4,..,7 return 0 --> ONL=0
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-- only units 0,..3 supported, for unit 4,..,7 return 0 --> ONL=0
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if r.crunit2 = '0' then
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if r.crunit2 = '0' then
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idout(sr_ibf_eof) := r.sreof(to_integer(unsigned(r.crunit)));
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idout(sr_ibf_eof) := r.sreof(to_integer(unsigned(r.crunit)));
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idout(sr_ibf_eot) := r.sreot(to_integer(unsigned(r.crunit)));
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idout(sr_ibf_eot) := r.sreot(to_integer(unsigned(r.crunit)));
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idout(sr_ibf_onl) := r.sronl(to_integer(unsigned(r.crunit)));
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idout(sr_ibf_onl) := r.sronl(to_integer(unsigned(r.crunit)));
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idout(sr_ibf_bot) := r.srbot(to_integer(unsigned(r.crunit)));
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idout(sr_ibf_bot) := r.srbot(to_integer(unsigned(r.crunit)));
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idout(sr_ibf_wrl) := r.srwrl(to_integer(unsigned(r.crunit)));
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idout(sr_ibf_wrl) := r.srwrl(to_integer(unsigned(r.crunit)));
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idout(sr_ibf_rew) := r.srrew(to_integer(unsigned(r.crunit)));
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idout(sr_ibf_rew) := r.srrew(to_integer(unsigned(r.crunit)));
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end if;
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end if;
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when ibaddr_cr => -- CR -- control register ---------
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when ibaddr_cr => -- CR -- control register ---------
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idout(cr_ibf_err) := r.sricmd or
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idout(cr_ibf_err) := r.sricmd or
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r.sreof(to_integer(unsigned(r.crunit))) or
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r.sreof(to_integer(unsigned(r.crunit))) or
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r.srpae or
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r.srpae or
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r.sreot(to_integer(unsigned(r.crunit))) or
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r.sreot(to_integer(unsigned(r.crunit))) or
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r.srrle or
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r.srrle or
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r.srnxm;
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r.srnxm;
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idout(cr_ibf_den) := r.crden;
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idout(cr_ibf_den) := r.crden;
|
idout(cr_ibf_pevn) := r.crpevn;
|
idout(cr_ibf_pevn) := r.crpevn;
|
idout(cr_ibf_unit2) := r.crunit2;
|
idout(cr_ibf_unit2) := r.crunit2;
|
idout(cr_ibf_unit) := r.crunit;
|
idout(cr_ibf_unit) := r.crunit;
|
idout(cr_ibf_rdy) := r.crrdy;
|
idout(cr_ibf_rdy) := r.crrdy;
|
idout(cr_ibf_ie) := r.crie;
|
idout(cr_ibf_ie) := r.crie;
|
idout(cr_ibf_ea) := r.crea;
|
idout(cr_ibf_ea) := r.crea;
|
idout(cr_ibf_func) := r.crfunc;
|
idout(cr_ibf_func) := r.crfunc;
|
|
|
if IB_MREQ.we = '1' then
|
if IB_MREQ.we = '1' then
|
if ibrem = '0' then
|
if ibrem = '0' then
|
|
|
if r.crrdy = '1' then
|
if r.crrdy = '1' then
|
if IB_MREQ.be1 = '1' then
|
if IB_MREQ.be1 = '1' then
|
n.crden := IB_MREQ.din(cr_ibf_den);
|
n.crden := IB_MREQ.din(cr_ibf_den);
|
if IB_MREQ.din(cr_ibf_ini) = '1' then
|
if IB_MREQ.din(cr_ibf_ini) = '1' then
|
n.resreq := '1';
|
n.resreq := '1';
|
end if;
|
end if;
|
n.crpevn := IB_MREQ.din(cr_ibf_pevn);
|
n.crpevn := IB_MREQ.din(cr_ibf_pevn);
|
n.crunit2 := IB_MREQ.din(cr_ibf_unit2);
|
n.crunit2 := IB_MREQ.din(cr_ibf_unit2);
|
n.crunit := IB_MREQ.din(cr_ibf_unit);
|
n.crunit := IB_MREQ.din(cr_ibf_unit);
|
end if;
|
end if;
|
if IB_MREQ.be0 = '1' then
|
if IB_MREQ.be0 = '1' then
|
n.crie := IB_MREQ.din(cr_ibf_ie);
|
n.crie := IB_MREQ.din(cr_ibf_ie);
|
if n.crie = '0' then -- if IE set to 0
|
if n.crie = '0' then -- if IE set to 0
|
n.ireq := '0'; -- cancel pending interrupt
|
n.ireq := '0'; -- cancel pending interrupt
|
end if;
|
end if;
|
n.crea := IB_MREQ.din(cr_ibf_ea);
|
n.crea := IB_MREQ.din(cr_ibf_ea);
|
n.crfunc := IB_MREQ.din(cr_ibf_func);
|
n.crfunc := IB_MREQ.din(cr_ibf_func);
|
|
|
if IB_MREQ.din(cr_ibf_go) = '1' then
|
if IB_MREQ.din(cr_ibf_go) = '1' then
|
n.sricmd := '0'; -- clear errors
|
n.sricmd := '0'; -- clear errors
|
n.srpae := '0';
|
n.srpae := '0';
|
n.srrle := '0';
|
n.srrle := '0';
|
n.srbte := '0';
|
n.srbte := '0';
|
n.srnxm := '0';
|
n.srnxm := '0';
|
n.sreof := (others=>'0'); -- clear position status flags
|
n.sreof := (others=>'0'); -- clear position status flags
|
n.sreot := (others=>'0');
|
n.sreot := (others=>'0');
|
n.srbot := (others=>'0');
|
n.srbot := (others=>'0');
|
n.srrew := (others=>'0');
|
n.srrew := (others=>'0');
|
n.crrdy := '0'; -- mark busy
|
n.crrdy := '0'; -- mark busy
|
ilam := '1'; -- rri lam
|
ilam := '1'; -- rri lam
|
else
|
else
|
if r.crie='0' and n.crie='1' then -- if IDE 0->1 transition
|
if r.crie='0' and n.crie='1' then -- if IDE 0->1 transition
|
n.ireq := '1'; -- issue software interrupt
|
n.ireq := '1'; -- issue software interrupt
|
end if;
|
end if;
|
end if;
|
end if;
|
end if;
|
end if;
|
else
|
else
|
n.sricmd := '1';
|
n.sricmd := '1';
|
end if;
|
end if;
|
|
|
else -- rem write access. GO not checked
|
else -- rem write access. GO not checked
|
-- always treated as remote function
|
-- always treated as remote function
|
case IB_MREQ.din(cr_ibf_func) is
|
case IB_MREQ.din(cr_ibf_func) is
|
when rfunc_wunit => -- rfunc: wunit -----------------
|
when rfunc_wunit => -- rfunc: wunit -----------------
|
n.runit := IB_MREQ.din(cr_ibf_runit);
|
n.runit := IB_MREQ.din(cr_ibf_runit);
|
|
|
when rfunc_done => -- rfunc: done ------------------
|
when rfunc_done => -- rfunc: done ------------------
|
n.sricmd := IB_MREQ.din(cr_ibf_ricmd);
|
n.sricmd := IB_MREQ.din(cr_ibf_ricmd);
|
n.srpae := IB_MREQ.din(cr_ibf_rpae);
|
n.srpae := IB_MREQ.din(cr_ibf_rpae);
|
n.srrle := IB_MREQ.din(cr_ibf_rrle);
|
n.srrle := IB_MREQ.din(cr_ibf_rrle);
|
n.srbte := IB_MREQ.din(cr_ibf_rbte);
|
n.srbte := IB_MREQ.din(cr_ibf_rbte);
|
n.srnxm := IB_MREQ.din(cr_ibf_rnxm);
|
n.srnxm := IB_MREQ.din(cr_ibf_rnxm);
|
if IB_MREQ.din(cr_ibf_reaena) = '1' then
|
if IB_MREQ.din(cr_ibf_reaena) = '1' then
|
n.crea := IB_MREQ.din(cr_ibf_rea);
|
n.crea := IB_MREQ.din(cr_ibf_rea);
|
end if;
|
end if;
|
n.crrdy := '1';
|
n.crrdy := '1';
|
if r.crie = '1' then
|
if r.crie = '1' then
|
n.ireq := '1';
|
n.ireq := '1';
|
end if;
|
end if;
|
|
|
when others => null; -- <>
|
when others => null; -- <>
|
end case;
|
end case;
|
|
|
end if; -- if ibrem
|
end if; -- if ibrem
|
|
|
end if; -- if IB_MREQ.we='1'
|
end if; -- if IB_MREQ.we='1'
|
|
|
when ibaddr_bc => -- BC -- byte count register -------
|
when ibaddr_bc => -- BC -- byte count register -------
|
idout := r.bc;
|
idout := r.bc;
|
if ibw1 = '1' then
|
if ibw1 = '1' then
|
n.bc(15 downto 8) := IB_MREQ.din(15 downto 8);
|
n.bc(15 downto 8) := IB_MREQ.din(15 downto 8);
|
end if;
|
end if;
|
if ibw0 = '1' then
|
if ibw0 = '1' then
|
n.bc( 7 downto 0) := IB_MREQ.din( 7 downto 0);
|
n.bc( 7 downto 0) := IB_MREQ.din( 7 downto 0);
|
end if;
|
end if;
|
|
|
when ibaddr_ba => -- BA -- bus address register ------
|
when ibaddr_ba => -- BA -- bus address register ------
|
idout(ba_ibf_ba) := r.ba;
|
idout(ba_ibf_ba) := r.ba;
|
if ibw1 = '1' then
|
if ibw1 = '1' then
|
n.ba(15 downto 8) := IB_MREQ.din(15 downto 8);
|
n.ba(15 downto 8) := IB_MREQ.din(15 downto 8);
|
end if;
|
end if;
|
if ibw0 = '1' then
|
if ibw0 = '1' then
|
n.ba( 7 downto 1) := IB_MREQ.din( 7 downto 1);
|
n.ba( 7 downto 1) := IB_MREQ.din( 7 downto 1);
|
end if;
|
end if;
|
|
|
when ibaddr_db => -- DB -- data buffer ---------------
|
when ibaddr_db => -- DB -- data buffer ---------------
|
null;
|
null;
|
|
|
when ibaddr_rl => -- RL -- read lines ----------------
|
when ibaddr_rl => -- RL -- read lines ----------------
|
if ibrem = '0' then
|
if ibrem = '0' then
|
null;
|
null;
|
else
|
else
|
idout(rl_ibf_reof) := r.sreof(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_reof) := r.sreof(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_reot) := r.sreot(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_reot) := r.sreot(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_ronl) := r.sronl(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_ronl) := r.sronl(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_rbot) := r.srbot(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_rbot) := r.srbot(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_rwrl) := r.srwrl(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_rwrl) := r.srwrl(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_rrew) := r.srrew(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_rrew) := r.srrew(to_integer(unsigned(r.runit)));
|
idout(rl_ibf_runit) := r.runit;
|
idout(rl_ibf_runit) := r.runit;
|
if IB_MREQ.we = '1' then
|
if IB_MREQ.we = '1' then
|
n.sreof(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_reof);
|
n.sreof(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_reof);
|
n.sreot(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_reot);
|
n.sreot(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_reot);
|
n.sronl(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_ronl);
|
n.sronl(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_ronl);
|
n.srbot(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_rbot);
|
n.srbot(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_rbot);
|
n.srwrl(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_rwrl);
|
n.srwrl(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_rwrl);
|
n.srrew(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_rrew);
|
n.srrew(to_integer(unsigned(r.runit))) := IB_MREQ.din(rl_ibf_rrew);
|
end if;
|
end if;
|
end if;
|
end if;
|
|
|
when others => -- doesn't happen, ibsel only for
|
when others => -- doesn't happen, ibsel only for
|
-- subrange up to rl, and all regs are
|
-- subrange up to rl, and all regs are
|
-- decoded above
|
-- decoded above
|
null;
|
null;
|
|
|
end case;
|
end case;
|
end if;
|
end if;
|
|
|
if BRESET = '1' then
|
if BRESET = '1' then
|
n.resreq := '1';
|
n.resreq := '1';
|
end if;
|
end if;
|
|
|
if r.resreq = '1' then
|
if r.resreq = '1' then
|
n.sricmd := '0';
|
n.sricmd := '0';
|
n.srpae := '0';
|
n.srpae := '0';
|
n.srrle := '0';
|
n.srrle := '0';
|
n.srbte := '0';
|
n.srbte := '0';
|
n.srnxm := '0';
|
n.srnxm := '0';
|
n.sreof := (others=>'0');
|
n.sreof := (others=>'0');
|
n.sreot := (others=>'0');
|
n.sreot := (others=>'0');
|
n.crden := (others=>'0');
|
n.crden := (others=>'0');
|
n.crpevn := '0';
|
n.crpevn := '0';
|
n.crunit2 := '0';
|
n.crunit2 := '0';
|
n.crunit := (others=>'0');
|
n.crunit := (others=>'0');
|
n.crrdy := '1';
|
n.crrdy := '1';
|
n.crie := '0';
|
n.crie := '0';
|
n.crea := (others=>'0');
|
n.crea := (others=>'0');
|
n.crfunc := (others=>'0');
|
n.crfunc := (others=>'0');
|
n.bc := (others=>'0');
|
n.bc := (others=>'0');
|
n.ba := (others=>'0');
|
n.ba := (others=>'0');
|
n.resreq := '0';
|
n.resreq := '0';
|
n.ireq := '0';
|
n.ireq := '0';
|
end if;
|
end if;
|
|
|
if EI_ACK = '1' or n.crie = '0' then -- interrupt executed or ie disabled
|
if EI_ACK = '1' or n.crie = '0' then -- interrupt executed or ie disabled
|
n.ireq := '0'; -- cancel request
|
n.ireq := '0'; -- cancel request
|
end if;
|
end if;
|
|
|
N_REGS <= n;
|
N_REGS <= n;
|
|
|
IB_SRES.dout <= idout;
|
IB_SRES.dout <= idout;
|
IB_SRES.ack <= r.ibsel and ibreq;
|
IB_SRES.ack <= r.ibsel and ibreq;
|
IB_SRES.busy <= ibhold and ibreq;
|
IB_SRES.busy <= ibhold and ibreq;
|
|
|
RB_LAM <= ilam;
|
RB_LAM <= ilam;
|
EI_REQ <= r.ireq;
|
EI_REQ <= r.ireq;
|
|
|
end process proc_next;
|
end process proc_next;
|
|
|
|
|
end syn;
|
end syn;
|
|
|