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https://opencores.org/ocsvn/wb2axip/wb2axip/trunk
[/] [wb2axip/] [trunk/] [bench/] [formal/] [axim2wbsp.ys] - Diff between revs 10 and 16
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| Rev 10 |
Rev 16 |
read_verilog -D AXIM2WBSP -formal ../../rtl/axim2wbsp.v
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read_verilog -D AXIM2WBSP -formal ../../rtl/axim2wbsp.v
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read_verilog -D AXIM2WBSP -formal ../../rtl/aximwr2wbsp.v
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read_verilog -D AXIM2WBSP -formal ../../rtl/aximwr2wbsp.v
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read_verilog -D AXIM2WBSP -formal ../../rtl/aximrd2wbsp.v
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read_verilog -D AXIM2WBSP -formal ../../rtl/aximrd2wbsp.v
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read_verilog -D AXIM2WBSP -formal ../../rtl/wbarbiter.v
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read_verilog -D AXIM2WBSP -formal ../../rtl/wbarbiter.v
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read_verilog -D AXIM2WBSP -formal fwb_master.v
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read_verilog -D AXIM2WBSP -formal fwb_master.v
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read_verilog -D AXIM2WBSP -formal fwb_slave.v
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read_verilog -D AXIM2WBSP -formal fwb_slave.v
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read_verilog -D AXIM2WBSP -formal faxi_slave.v
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read_verilog -D AXIM2WBSP -formal faxi_slave.v
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read_verilog -D AXIM2WBSP -formal f_order.v
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prep -top axim2wbsp -nordff
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prep -top axim2wbsp -nordff
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clk2fflogic
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opt -share_all
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write_smt2 -wires axim2wbsp.smt2
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write_smt2 -wires axim2wbsp.smt2
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