/*
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/*
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This file is part of the AXI4 Transactor and Bus Functional Model
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This file is part of the AXI4 Transactor and Bus Functional Model
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(axi4_tlm_bfm) project:
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(axi4_tlm_bfm) project:
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http://www.opencores.org/project,axi4_tlm_bfm
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http://www.opencores.org/project,axi4_tlm_bfm
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Description
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Description
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This implements a generic interface for transactors, and has a set
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This implements a generic interface for transactors, and has a set
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of reusable procedures to read and write from / to a bus. This
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of reusable procedures to read and write from / to a bus. This
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interface can be used in many different bus protocols, by means of
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interface can be used in many different bus protocols, by means of
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instantiating this package. An example implementation for the AXI4
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instantiating this package. An example implementation for the AXI4
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protocol can be found at
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protocol can be found at
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pkg-axi-tlm.vhdl
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pkg-axi-tlm.vhdl
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under the axi4_tlm_bfm project.
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under the axi4_tlm_bfm project.
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To Do:
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To Do:
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Author(s):
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Author(s):
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- Daniel C.K. Kho, daniel.kho@opencores.org | daniel.kho@tauhop.com
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- Daniel C.K. Kho, daniel.kho@opencores.org | daniel.kho@tauhop.com
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Copyright (C) 2012-2013 Authors and OPENCORES.ORG
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Copyright (C) 2012-2013 Authors and OPENCORES.ORG
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This source file may be used and distributed without
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This source file may be used and distributed without
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restriction provided that this copyright statement is not
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restriction provided that this copyright statement is not
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removed from the file and that any derivative work contains
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removed from the file and that any derivative work contains
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the original copyright notice and the associated disclaimer.
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the original copyright notice and the associated disclaimer.
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This source file is free software; you can redistribute it
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This source file is free software; you can redistribute it
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and/or modify it under the terms of the GNU Lesser General
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and/or modify it under the terms of the GNU Lesser General
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Public License as published by the Free Software Foundation;
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Public License as published by the Free Software Foundation;
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either version 2.1 of the License, or (at your option) any
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either version 2.1 of the License, or (at your option) any
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later version.
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later version.
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This source is distributed in the hope that it will be
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This source is distributed in the hope that it will be
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useful, but WITHOUT ANY WARRANTY; without even the implied
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useful, but WITHOUT ANY WARRANTY; without even the implied
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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PURPOSE. See the GNU Lesser General Public License for more
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PURPOSE. See the GNU Lesser General Public License for more
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details.
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details.
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You should have received a copy of the GNU Lesser General
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You should have received a copy of the GNU Lesser General
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Public License along with this source; if not, download it
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Public License along with this source; if not, download it
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from http://www.opencores.org/lgpl.shtml.
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from http://www.opencores.org/lgpl.shtml.
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*/
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*/
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/* FIXME VHDL-2008 instantiated package. Unsupported by VCS-MX, Quartus, and Vivado. QuestaSim/ModelSim supports well. */
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/* FIXME VHDL-2008 instantiated package. Unsupported by VCS-MX, Quartus, and Vivado. QuestaSim/ModelSim supports well. */
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library ieee; use ieee.std_logic_1164.all, ieee.numeric_std.all;
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library ieee; use ieee.std_logic_1164.all, ieee.numeric_std.all;
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--use std.textio.all;
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--use std.textio.all;
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package tlm is
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package tlm is
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generic(type t_addr; type t_msg; type t_cnt);
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generic(type t_addr; type t_msg; type t_cnt);
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-- /* TODO remove once generic packages are supported. */
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-- /* TODO remove once generic packages are supported. */
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-- subtype t_addr is unsigned(31 downto 0);
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-- subtype t_addr is unsigned(31 downto 0);
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-- subtype t_msg is signed(63 downto 0);
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-- subtype t_msg is signed(63 downto 0);
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/* BFM control interface. */
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/* BFM control interface. */
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type t_bfm is record
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type t_bfm is record
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address:t_addr;
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address:t_addr;
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message:t_msg;
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message:t_msg;
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trigger:boolean;
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trigger:boolean;
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end record t_bfm;
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end record t_bfm;
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procedure write(
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procedure write(
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signal request:out t_bfm; --FIXME use inout because Quartus doesn't yet allow reading of "out" within a procedure. VHDL-2008 allows this, and QuestaSim works fine.
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signal request:out t_bfm; --FIXME use inout if tool doesn't support reading from out ports.
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address:in t_addr; -- used only for non-stream interfaces.
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address:in t_addr; -- used only for non-stream interfaces.
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data:in t_msg
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data:in t_msg
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);
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);
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procedure read(
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procedure read(
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signal request:out t_bfm; --FIXME use inout because Quartus doesn't yet allow reading of "out" within a procedure. VHDL-2008 allows this, and QuestaSim works fine.
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signal request:out t_bfm; --FIXME use inout if tool doesn't support reading from out ports.
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address:in t_addr -- used only for non-stream interfaces.
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address:in t_addr -- used only for non-stream interfaces.
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);
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);
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end package tlm;
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end package tlm;
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package body tlm is
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package body tlm is
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procedure write(
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procedure write(
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signal request:out t_bfm; --FIXME use inout because Quartus doesn't yet allow reading of "out" within a procedure. VHDL-2008 allows this, and QuestaSim works fine.
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signal request:out t_bfm; --FIXME use inout if tool doesn't support reading from out ports.
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address:in t_addr; -- used only for non-stream interfaces.
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address:in t_addr; -- used only for non-stream interfaces.
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data:in t_msg
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data:in t_msg
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) is begin
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) is begin
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request.address<=address;
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request.address<=address;
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request.message<=data;
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request.message<=data;
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request.trigger<=not request.trigger;
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request.trigger<=not request.trigger;
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end procedure write;
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end procedure write;
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procedure read(
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procedure read(
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signal request:out t_bfm; --FIXME use inout because Quartus doesn't yet allow reading of "out" within a procedure. VHDL-2008 allows this, and QuestaSim works fine.
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signal request:out t_bfm; --FIXME use inout if tool doesn't support reading from out ports.
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address:in t_addr -- used only for non-stream interfaces.
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address:in t_addr -- used only for non-stream interfaces.
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) is begin
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) is begin
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request.address<=address;
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request.address<=address;
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request.trigger<=not request.trigger;
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request.trigger<=not request.trigger;
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--report "request.address: " & to_hstring(request.address);
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--report "request.address: " & to_hstring(request.address);
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end procedure read;
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end procedure read;
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end package body tlm;
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end package body tlm;
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