OpenCores
URL https://opencores.org/ocsvn/wb_fifo/wb_fifo/trunk

Subversion Repositories wb_fifo

[/] [wb_fifo/] [trunk/] [workspaces/] [simulate.sh] - Diff between revs 9 and 10

Only display areas with differences | Details | Blame | View Log

Rev 9 Rev 10
#!/bin/bash
#!/bin/bash
#
#
#       Example bash script for Mentor Graphics QuestaSim/ModelSim simulation.
#       Example bash script for Mentor Graphics QuestaSim/ModelSim simulation.
#
#
#       Author(s):
#       Author(s):
#       - Daniel C.K. Kho, daniel.kho@opencores.org | daniel.kho@tauhop.com
#       - Daniel C.K. Kho, daniel.kho@opencores.org | daniel.kho@tauhop.com
#
#
#       Copyright (C) 2012-2013 Authors and OPENCORES.ORG
#       Copyright (C) 2012-2013 Authors and OPENCORES.ORG
#
#
# This program is free software: you can redistribute it and/or modify
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
# (at your option) any later version.
#
#
# This program is distributed in the hope that it will be useful,
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
# GNU General Public License for more details.
#
#
# You should have received a copy of the GNU General Public License
# You should have received a copy of the GNU General Public License
# along with this program.  If not, see <http://www.gnu.org/licenses/>.
# along with this program.  If not, see <http://www.gnu.org/licenses/>.
#
#
# This notice and disclaimer must be retained as part of this text at all times.
# This notice and disclaimer must be retained as part of this text at all times.
#
#
#       @dependencies:
#       @dependencies:
#       @designer: Daniel C.K. Kho [daniel.kho@gmail.com] | [daniel.kho@tauhop.com]
#       @designer: Daniel C.K. Kho [daniel.kho@gmail.com] | [daniel.kho@tauhop.com]
#       @history: @see Mercurial log for full list of changes.
#       @history: @see Mercurial log for full list of changes.
#
#
#       @Description:
#       @Description:
#
#
 
 
ROOT_PATH=$PWD
ROOT_PATH=$PWD
MODEL_SRC_PATH=$ROOT_PATH/../model
MODEL_SRC_PATH=$ROOT_PATH/../model
VHDL_SRC_PATH=$ROOT_PATH/../hw/vhdl
VHDL_SRC_PATH=$ROOT_PATH/../hw/vhdl
TB_SRC_PATH=$ROOT_PATH/../hw/tester
TB_SRC_PATH=$ROOT_PATH/../hw/tester
#set COMMONFILES_PATH = $SRC_PATH/common
#set COMMONFILES_PATH = $SRC_PATH/common
 
 
# model files
# model files
#set MODEL_FILES = $SRC_PATH/*.sagews $SRC_PATH/*.m $SRC_PATH/*.c
#set MODEL_FILES = $SRC_PATH/*.sagews $SRC_PATH/*.m $SRC_PATH/*.c
 
 
# vhdl files
# vhdl files
#VHDL_FILES = $(SRC_PATH)/*.vhdl
#VHDL_FILES = $(SRC_PATH)/*.vhdl
#COMMON_VHDL_FILES = $(COMMONFILES_PATH)/*.vhdl
#COMMON_VHDL_FILES = $(COMMONFILES_PATH)/*.vhdl
 
 
# build options
# build options
GHDL_BUILD_OPTS=--std=02
GHDL_BUILD_OPTS=--std=02 --assert-level=error
QUESTA_BUILD_OPTS=-2008
QUESTA_BUILD_OPTS=-2008
DC_BUILD_OPTS=
DC_BUILD_OPTS=
VCS_BUILD_OPTS=-vhdl08
VCS_BUILD_OPTS=-vhdl08
 
 
# Simulation break condition
 
GHDL_SIM_OPTS=--assert-level=error
 
#GHDL_SIM_OPTS    = --stop-time=5us             #500ns
 
 
 
# Workspaces
# Workspaces
#SIM_PATH = $(ROOT_PATH)/simulation/ghdl
GHDL_SIM_PATH=$ROOT_PATH/simulation/ghdl
#SYNTH_PATH = $(ROOT_PATH)/synthesis/vivado
 
VCS_SIM_PATH=$ROOT_PATH/simulation/vcs-mx
 
QUESTA_SIM_PATH=$ROOT_PATH/simulation/questa
QUESTA_SIM_PATH=$ROOT_PATH/simulation/questa
 
VCS_SIM_PATH=$ROOT_PATH/simulation/vcs-mx
 
VIVADO_SYNTH_PATH=$ROOT_PATH/synthesis/vivado
DC_SYNTH_PATH=$ROOT_PATH/synthesis/dc
DC_SYNTH_PATH=$ROOT_PATH/synthesis/dc
 
 
##read -p "press Enter to run full simulation now, or Ctrl-C to exit: ";
 
#echo $(date "+[%Y-%m-%d %H:%M:%S]: Removing previously-generated files and folders...");
 
#rm -rf *./simulate.log ./work ./altera ./osvvm ./tauhop;
 
#
 
#echo $(date "+[%Y-%m-%d %H:%M:%S]: Remove successful.");
 
#echo $(date "+[%Y-%m-%d %H:%M:%S]: Compiling project...");
 
#vlib work; vmap work work;
 
#vlib tauhop; vmap tauhop tauhop;
 
#vlib osvvm; vmap osvvm osvvm;
 
 
 
isNotExists_vhdlan=`hash vhdlan 2>&1 | grep >&1 "not found"` ;
isNotExists_vhdlan=`hash vhdlan 2>&1 | grep >&1 "not found"` ;
if [ `echo ${#isNotExists_vhdlan}` -gt 0 ]
if [ `echo ${#isNotExists_vhdlan}` -gt 0 ]
then echo "Warning: vhdlan not installed. Skipping compilation for VCS.";
then echo "Warning: vhdlan not installed. Skipping compilation for VCS.";
else
else
        echo "Starting VCS compile..."
        echo "Starting VCS compile..."
 
 
        cd $VCS_SIM_PATH;
        cd $VCS_SIM_PATH;
 
 
        eval 2>&1 "vhdlan $VCS_BUILD_OPTS -work osvvm \
        eval 2>&1 "vhdlan $VCS_BUILD_OPTS -work osvvm \
                $(cat ../osvvm.f)" \
                $(cat ../osvvm.f)" \
                | tee -ai ./simulate.log;
                | tee -ai ./simulate.log;
 
 
        #vcom -2008 -work tauhop $VHDL_SRC_PATH/packages/pkg-types.vhdl \
        #vcom -2008 -work tauhop $VHDL_SRC_PATH/packages/pkg-types.vhdl \
        eval 2>&1 "vhdlan $VCS_BUILD_OPTS -work tauhop \
        eval 2>&1 "vhdlan $VCS_BUILD_OPTS -work tauhop \
                $(cat ../tauhop.f)" \
                $(cat ../tauhop.f)" \
                | tee -ai ./simulate.log;
                | tee -ai ./simulate.log;
                #../../model/vhdl/packages/pkg-resolved.vhdl \
                #../../model/vhdl/packages/pkg-resolved.vhdl \
 
 
        eval 2>&1 "vhdlan $VCS_BUILD_OPTS -work work \
        eval 2>&1 "vhdlan $VCS_BUILD_OPTS -work work \
                $(cat ../work.f)" \
                $(cat ../work.f)" \
                | tee -ai ./simulate.log;
                | tee -ai ./simulate.log;
 
 
        errorStr=`grep "Error-\[" ./simulate.log`;
        errorStr=`grep "Error-\[" ./simulate.log`;
        if [ `echo ${#errorStr}` -gt 0 ]
        if [ `echo ${#errorStr}` -gt 0 ]
        then echo "Errors exist. Refer simulate.log for more details. Exiting."; exit;
        then echo "Errors exist. Refer simulate.log for more details. Exiting."; exit;
        else
        else
                echo $(date "+[%Y-%m-%d %H:%M:%S]: Running simulation...");
                echo $(date "+[%Y-%m-%d %H:%M:%S]: Running simulation...");
 
 
                #vcs -R -debug_all work.system 2>&1 \
                #vcs -R -debug_all work.system 2>&1 \
                vcs -debug_all work.system 2>&1 \
                vcs -debug_all work.system 2>&1 \
                        | tee -ai ./simulate.log;
                        | tee -ai ./simulate.log;
 
 
                ./simv -gui -dve_opt -session=./view-session.tcl -dve_opt -cmd=run 2>&1 \
                ./simv -gui -dve_opt -session=./view-session.tcl -dve_opt -cmd=run 2>&1 \
                        | tee -ai ./simulate.log;
                        | tee -ai ./simulate.log;
 
 
                echo $(date "+[%Y-%m-%d %H:%M:%S]: simulation loaded.");
                echo $(date "+[%Y-%m-%d %H:%M:%S]: simulation loaded.");
        fi
        fi
fi
fi
 
 
isNotExists_vcom=`hash vcom 2>&1 | grep >&1 "not found"` ;
isNotExists_vcom=`hash vcom 2>&1 | grep >&1 "not found"` ;
#isNotExists_vcom=`hash vhdlan 2>/dev/null || { echo >&2 "Warning: vcom not installed. Skipping compilation for Questa/ModelSim."; }`;
 
if [ `echo ${#isNotExists_vcom}` -gt 0 ]
if [ `echo ${#isNotExists_vcom}` -gt 0 ]
then echo "Warning: vcom not installed. Skipping compilation for Questa/ModelSim.";
then echo "Warning: vcom not installed. Skipping compilation for Questa/ModelSim.";
else
else
        echo "Starting Questa/ModelSim compile..."
        echo "Starting Questa/ModelSim compile..."
 
 
        cd $QUESTA_SIM_PATH;
        cd $QUESTA_SIM_PATH;
 
 
        #read -p "press Enter to run full simulation now, or Ctrl-C to exit: ";
        #read -p "press Enter to run full simulation now, or Ctrl-C to exit: ";
        echo $(date "+[%Y-%m-%d %H:%M:%S]: Removing previously-generated files and folders...");
        echo $(date "+[%Y-%m-%d %H:%M:%S]: Removing previously-generated files and folders...");
        rm -rf ./transcript ./simulate.log ./work ./altera ./osvvm ./tauhop;
        rm -rf ./transcript ./simulate.log ./work ./altera ./osvvm ./tauhop;
        echo $(date "+[%Y-%m-%d %H:%M:%S]: Remove successful.");
        echo $(date "+[%Y-%m-%d %H:%M:%S]: Remove successful.");
 
 
        echo $(date "+[%Y-%m-%d %H:%M:%S]: Compiling project...");
        echo $(date "+[%Y-%m-%d %H:%M:%S]: Compiling project...");
        vlib work; vmap work work;
        vlib work; vmap work work;
        vlib tauhop; vmap tauhop tauhop;
        vlib tauhop; vmap tauhop tauhop;
        vlib osvvm; vmap osvvm osvvm;
        vlib osvvm; vmap osvvm osvvm;
 
 
        #vcom $QUESTA_BUILD_OPTS -work osvvm 2>&1 \
        #vcom $QUESTA_BUILD_OPTS -work osvvm 2>&1 \
        #       $VHDL_SRC_PATH/packages/os-vvm/SortListPkg_int.vhd \
        #       $VHDL_SRC_PATH/packages/os-vvm/SortListPkg_int.vhd \
        #       $VHDL_SRC_PATH/packages/os-vvm/RandomBasePkg.vhd \
        #       $VHDL_SRC_PATH/packages/os-vvm/RandomBasePkg.vhd \
        #       $VHDL_SRC_PATH/packages/os-vvm/RandomPkg.vhd \
        #       $VHDL_SRC_PATH/packages/os-vvm/RandomPkg.vhd \
        #       $VHDL_SRC_PATH/packages/os-vvm/CoveragePkg.vhd \
        #       $VHDL_SRC_PATH/packages/os-vvm/CoveragePkg.vhd \
        #       | tee -ai ./simulate.log;
        #       | tee -ai ./simulate.log;
        # Pass the simulation path into script.
        # Pass the simulation path into script.
        eval 2>&1 "vcom $QUESTA_BUILD_OPTS -work osvvm \
        eval 2>&1 "vcom $QUESTA_BUILD_OPTS -work osvvm \
                $(cat ../osvvm.f)" \
                $(cat ../osvvm.f)" \
                | tee -ai ./simulate.log;
                | tee -ai ./simulate.log;
 
 
        #vcom -2008 -work tauhop $VHDL_SRC_PATH/packages/pkg-types.vhdl \
        #vcom -2008 -work tauhop $VHDL_SRC_PATH/packages/pkg-types.vhdl \
        eval 2>&1 "vcom $QUESTA_BUILD_OPTS -work tauhop \
        eval 2>&1 "vcom $QUESTA_BUILD_OPTS -work tauhop \
                $(cat ../tauhop.f)" \
                $(cat ../tauhop.f)" \
                | tee -ai ./simulate.log;
                | tee -ai ./simulate.log;
                #../../model/vhdl/packages/pkg-resolved.vhdl \
                #../../model/vhdl/packages/pkg-resolved.vhdl \
 
 
        eval 2>&1 "vcom $QUESTA_BUILD_OPTS -work work \
        eval 2>&1 "vcom $QUESTA_BUILD_OPTS -work work \
                $(cat ../work.f)" \
                $(cat ../work.f)" \
                | tee -ai ./simulate.log;
                | tee -ai ./simulate.log;
 
 
        errorStr=`grep "\*\* Error: " ./simulate.log`
        errorStr=`grep "\*\* Error: " ./simulate.log`
        if [ `echo ${#errorStr}` -gt 0 ]
        if [ `echo ${#errorStr}` -gt 0 ]
        then echo "Errors exist. Refer simulate.log for more details. Exiting."; exit;
        then echo "Errors exist. Refer simulate.log for more details. Exiting."; exit;
        else
        else
                echo $(date "+[%Y-%m-%d %H:%M:%S]: Running simulation...");
                echo $(date "+[%Y-%m-%d %H:%M:%S]: Running simulation...");
                vsim -i -t fs -do ./waves.do -voptargs="+acc" "work.testbench(simulation)" 2>&1 \
                vsim -i -t fs -do ./waves.do -voptargs="+acc" "work.testbench(simulation)" 2>&1 \
                        | tee -ai ./simulate.log &
                        | tee -ai ./simulate.log &
                #vsim -t ps -voptargs="+acc" "tauhop.fifo(rtl)";
                #vsim -t ps -voptargs="+acc" "tauhop.fifo(rtl)";
                #vsim -t ps -voptargs="+acc" "work.testbench(simulation)";
                #vsim -t ps -voptargs="+acc" "work.testbench(simulation)";
                echo $(date "+[%Y-%m-%d %H:%M:%S]: simulation loaded.");
                echo $(date "+[%Y-%m-%d %H:%M:%S]: simulation loaded.");
        fi
        fi
fi
fi
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.