//=======================================================================
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//=======================================================================
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// Project Monophony
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// Project Monophony
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// Wire-Frame 3D Graphics Accelerator IP Core
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// Wire-Frame 3D Graphics Accelerator IP Core
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//
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//
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// File:
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// File:
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// fm_3d_norm.v
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// fm_3d_norm.v
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//
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//
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// Abstract:
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// Abstract:
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// 22-bit floating point normalize function
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// 22-bit floating point normalize function
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//
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//
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// Author:
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// Author:
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// Kenji Ishimaru (info.wf3d@gmail.com)
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// Kenji Ishimaru (info.info.wf3d@gmail.com)
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//
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//
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//======================================================================
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//======================================================================
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//
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//
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// Copyright (c) 2015, Kenji Ishimaru
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// Copyright (c) 2015, Kenji Ishimaru
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// All rights reserved.
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// All rights reserved.
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//
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//
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// Redistribution and use in source and binary forms, with or without
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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// modification, are permitted provided that the following conditions are met:
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//
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//
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// -Redistributions of source code must retain the above copyright notice,
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// -Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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// this list of conditions and the following disclaimer.
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// -Redistributions in binary form must reproduce the above copyright notice,
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// -Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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// and/or other materials provided with the distribution.
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//
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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// THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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// THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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// OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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// OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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// WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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// WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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// OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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// OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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//
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// Revision History
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// Revision History
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module fm_3d_norm (
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module fm_3d_norm (
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i_s,
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i_s,
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i_e,
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i_e,
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i_f,
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i_f,
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o_b
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o_b
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);
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);
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///////////////////////////////////////////
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///////////////////////////////////////////
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// port definition
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// port definition
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///////////////////////////////////////////
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///////////////////////////////////////////
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input i_s; // input s1, e5, f2.15
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input i_s; // input s1, e5, f2.15
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input [4:0] i_e; // input s1, e5, f2.15
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input [4:0] i_e; // input s1, e5, f2.15
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input [16:0] i_f; // input s1, e5, f2.15
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input [16:0] i_f; // input s1, e5, f2.15
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output [21:0] o_b; // normalized out
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output [21:0] o_b; // normalized out
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///////////////////////////////////////////
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///////////////////////////////////////////
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// wire definition
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// wire definition
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///////////////////////////////////////////
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///////////////////////////////////////////
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// intermidiate wire
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// intermidiate wire
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wire w_carry; // fraction carry bit
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wire w_carry; // fraction carry bit
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wire [3:0] w_penc; // result of priority encode
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wire [3:0] w_penc; // result of priority encode
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wire w_c_zero; // fraction zero flag
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wire w_c_zero; // fraction zero flag
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wire w_ce_zero; // exp zero flag
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wire w_ce_zero; // exp zero flag
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wire [15:0] w_lshifted; // left shifted fraction value
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wire [15:0] w_lshifted; // left shifted fraction value
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wire [4:0] w_lshift_val; // left shift value
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wire [4:0] w_lshift_val; // left shift value
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wire [15:0] w_c_fraction;
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wire [15:0] w_c_fraction;
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wire [15:0] w_c_frac;
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wire [15:0] w_c_frac;
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wire [4:0] w_c_exp; // normalized final exp
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wire [4:0] w_c_exp; // normalized final exp
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wire w_c_sign; // final exp
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wire w_c_sign; // final exp
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wire [5:0] w_incdec_out; // result of exp incdec
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wire [5:0] w_incdec_out; // result of exp incdec
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///////////////////////////////////////////
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///////////////////////////////////////////
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// assign statement
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// assign statement
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///////////////////////////////////////////
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///////////////////////////////////////////
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assign w_carry = i_f[16];
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assign w_carry = i_f[16];
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// normalize
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// normalize
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// fraction zero flag
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// fraction zero flag
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assign w_c_zero = (i_f == 17'h0);
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assign w_c_zero = (i_f == 17'h0);
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// fraction priority encode
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// fraction priority encode
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assign w_penc = f_prenc(i_f[15:0]);
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assign w_penc = f_prenc(i_f[15:0]);
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// if w_incdec_out[5] == 1, under flow
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// if w_incdec_out[5] == 1, under flow
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assign w_incdec_out = f_incdec(i_e, w_penc, w_carry);
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assign w_incdec_out = f_incdec(i_e, w_penc, w_carry);
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// left shift value for normalize
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// left shift value for normalize
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assign w_lshift_val = w_penc;
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assign w_lshift_val = w_penc;
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// left shift for nornamize
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// left shift for nornamize
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assign w_lshifted = i_f[15:0] << w_lshift_val;
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assign w_lshifted = i_f[15:0] << w_lshift_val;
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// decide final fraction
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// decide final fraction
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assign w_c_frac = (w_carry) ? i_f[16:1] : w_lshifted;
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assign w_c_frac = (w_carry) ? i_f[16:1] : w_lshifted;
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// decide final exp
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// decide final exp
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assign w_c_exp = (w_c_zero|w_incdec_out[5]) ? 5'h0 : w_incdec_out[4:0];
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assign w_c_exp = (w_c_zero|w_incdec_out[5]) ? 5'h0 : w_incdec_out[4:0];
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// exp zero flag
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// exp zero flag
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assign w_ce_zero = (w_c_exp == 5'h0);
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assign w_ce_zero = (w_c_exp == 5'h0);
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// decide final sign
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// decide final sign
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assign w_c_sign = i_s & !w_ce_zero;
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assign w_c_sign = i_s & !w_ce_zero;
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// decide final fraction
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// decide final fraction
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assign w_c_fraction = (w_ce_zero) ? 16'h0 : w_c_frac;
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assign w_c_fraction = (w_ce_zero) ? 16'h0 : w_c_frac;
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// output port connection
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// output port connection
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assign o_b = {w_c_sign, w_c_exp, w_c_fraction};
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assign o_b = {w_c_sign, w_c_exp, w_c_fraction};
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///////////////////////////////////////////
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///////////////////////////////////////////
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// function statement
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// function statement
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///////////////////////////////////////////
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///////////////////////////////////////////
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function [3:0] f_prenc;
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function [3:0] f_prenc;
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input [15:0] mat;
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input [15:0] mat;
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begin
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begin
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if (mat[15] == 1'b1) begin
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if (mat[15] == 1'b1) begin
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f_prenc = 4'h0;
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f_prenc = 4'h0;
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end else if (mat[14] == 1'b1) begin
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end else if (mat[14] == 1'b1) begin
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f_prenc = 4'h1;
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f_prenc = 4'h1;
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end else if (mat[13] == 1'b1) begin
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end else if (mat[13] == 1'b1) begin
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f_prenc = 4'h2;
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f_prenc = 4'h2;
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end else if (mat[12] == 1'b1) begin
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end else if (mat[12] == 1'b1) begin
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f_prenc = 4'h3;
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f_prenc = 4'h3;
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end else if (mat[11] == 1'b1) begin
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end else if (mat[11] == 1'b1) begin
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f_prenc = 4'h4;
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f_prenc = 4'h4;
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end else if (mat[10] == 1'b1) begin
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end else if (mat[10] == 1'b1) begin
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f_prenc = 4'h5;
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f_prenc = 4'h5;
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end else if (mat[9] == 1'b1) begin
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end else if (mat[9] == 1'b1) begin
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f_prenc = 4'h6;
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f_prenc = 4'h6;
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end else if (mat[8] == 1'b1) begin
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end else if (mat[8] == 1'b1) begin
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f_prenc = 4'h7;
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f_prenc = 4'h7;
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end else if (mat[7] == 1'b1) begin
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end else if (mat[7] == 1'b1) begin
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f_prenc = 4'h8;
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f_prenc = 4'h8;
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end else if (mat[6] == 1'b1) begin
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end else if (mat[6] == 1'b1) begin
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f_prenc = 4'h9;
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f_prenc = 4'h9;
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end else if (mat[5] == 1'b1) begin
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end else if (mat[5] == 1'b1) begin
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f_prenc = 4'ha;
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f_prenc = 4'ha;
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end else if (mat[4] == 1'b1) begin
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end else if (mat[4] == 1'b1) begin
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f_prenc = 4'hb;
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f_prenc = 4'hb;
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end else if (mat[3] == 1'b1) begin
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end else if (mat[3] == 1'b1) begin
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f_prenc = 4'hc;
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f_prenc = 4'hc;
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end else if (mat[2] == 1'b1) begin
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end else if (mat[2] == 1'b1) begin
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f_prenc = 4'hd;
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f_prenc = 4'hd;
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end else if (mat[1] == 1'b1) begin
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end else if (mat[1] == 1'b1) begin
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f_prenc = 4'he;
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f_prenc = 4'he;
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end else begin
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end else begin
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f_prenc = 4'hf;
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f_prenc = 4'hf;
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end
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end
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end
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end
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endfunction
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endfunction
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function [5:0] f_incdec;
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function [5:0] f_incdec;
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input [4:0] a;
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input [4:0] a;
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input [3:0] b;
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input [3:0] b;
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input inc;
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input inc;
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reg [5:0] r_inc;
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reg [5:0] r_inc;
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reg [5:0] r_dec;
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reg [5:0] r_dec;
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reg r_1f_flag;
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reg r_1f_flag;
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begin
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begin
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r_1f_flag = (a == 5'h1f);
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r_1f_flag = (a == 5'h1f);
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r_inc = a + !r_1f_flag;
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r_inc = a + !r_1f_flag;
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r_dec = a - b;
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r_dec = a - b;
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f_incdec = (inc) ? r_inc : r_dec;
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f_incdec = (inc) ? r_inc : r_dec;
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/*
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/*
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if (inc) begin
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if (inc) begin
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if (a == 5'h1f) f_incdec = a;
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if (a == 5'h1f) f_incdec = a;
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else f_incdec = a + 1'b1;
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else f_incdec = a + 1'b1;
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end else begin
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end else begin
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f_incdec = a - b;
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f_incdec = a - b;
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end
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end
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*/
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*/
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end
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end
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endfunction
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endfunction
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endmodule
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endmodule
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