`timescale 1ns / 1ps
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`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////////
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// Company:
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// Company:
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// Engineer:
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// Engineer:
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//
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//
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// Create Date: 17:53:05 10/15/2013
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// Create Date: 17:53:05 10/15/2013
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// Design Name:
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// Design Name:
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// Module Name: Multiply_Accumulate
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// Module Name: Multiply_Accumulate
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// Project Name:
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// Project Name:
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// Target Devices:
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// Target Devices:
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// Tool versions:
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// Tool versions:
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// Description: C ± A*B
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// Description: C ± A*B
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//
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//
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// Dependencies:
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// Dependencies:
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//
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//
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// Revision:
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// Revision:
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// Revision 0.01 - File Created
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// Revision 0.01 - File Created
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// Additional Comments:
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// Additional Comments:
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//
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//
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//////////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////////
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module Multiply_Accumulate #( parameter size_mantissa = 24, //mantissa bits(1.M)
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module Multiply_Accumulate #( parameter size_mantissa = 24, //mantissa bits(1.M)
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parameter size_exponent = 8, //exponent bits
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parameter size_exponent = 8, //exponent bits
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parameter size_counter = 5, //log2(size_mantissa) + 1 = 5
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parameter size_counter = 5, //log2(size_mantissa) + 1 = 5
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parameter size_exception_field = 2, // zero/normal numbers/infinity/NaN
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parameter size_exception_field = 2, // zero/normal numbers/infinity/NaN
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parameter zero = 00, //00
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parameter zero = 00, //00
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parameter normal_number = 01, //01
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parameter normal_number = 01, //01
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parameter infinity = 10, //10
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parameter infinity = 10, //10
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parameter NaN = 11, //11
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parameter NaN = 11, //11
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parameter pipeline = 0,
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parameter pipeline = 0,
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parameter pipeline_pos = 0, //8 bits
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parameter pipeline_pos = 0, //8 bits
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parameter size = size_exponent + size_mantissa + size_exception_field,
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parameter size = size_exponent + size_mantissa + size_exception_field,
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parameter size_mul_mantissa = size_mantissa + size_mantissa,
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parameter size_mul_mantissa = size_mantissa + size_mantissa,
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parameter size_mul_counter = size_counter + 1)
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parameter size_mul_counter = size_counter + 1)
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( input clk,
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( input [size - 1:0] a_number_i,
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input rst,
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input [size - 1:0] a_number_i,
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input [size - 1:0] b_number_i,
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input [size - 1:0] b_number_i,
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input [size - 1:0] c_number_i,
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input [size - 1:0] c_number_i,
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input sub,
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input sub,
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output[size - 1:0] resulting_number_o);
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output[size - 1:0] resulting_number_o);
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parameter bias_0_bits = size_exponent - 1;
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parameter bias_0_bits = size_exponent - 1;
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parameter shift_mantissa_0_bits = size_mantissa-1'b1;
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parameter shift_mantissa_0_bits = size_mantissa-1'b1;
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wire [size_exception_field - 1 : 0] sp_case_a_number, sp_case_b_number, sp_case_c_number;
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wire [size_exception_field - 1 : 0] sp_case_a_number, sp_case_b_number, sp_case_c_number;
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wire [size_mantissa - 1 : 0] m_a_number, m_b_number, m_c_number;
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wire [size_mantissa - 1 : 0] m_a_number, m_b_number, m_c_number;
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wire [size_exponent - 1 : 0] e_a_number, e_b_number, e_c_number;
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wire [size_exponent - 1 : 0] e_a_number, e_b_number, e_c_number;
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wire s_a_number, s_b_number, s_c_number;
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wire s_a_number, s_b_number, s_c_number;
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wire [size_exponent : 0] ab_greater_exponent, c_greater_exponent;
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wire [size_exponent : 0] ab_greater_exponent, c_greater_exponent;
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wire [size_exponent - 1 : 0] exp_difference;
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wire [size_exponent - 1 : 0] exp_difference;
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wire [size_exponent - 1 : 0] unadjusted_exponent;
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wire [size_exponent - 1 : 0] unadjusted_exponent;
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wire [size_exponent : 0] exp_inter;
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wire [size_exponent : 0] exp_inter;
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wire [size_mantissa - 2 : 0] mul_mantissa;
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wire [size_mul_mantissa - 1 : 0] m_ab_mantissa, c_mantissa;
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wire [size_mul_mantissa - 1 : 0] m_ab_mantissa, c_mantissa;
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wire [size_exponent : 0] e_ab_number_inter, e_ab_number;
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wire [size_exponent : 0] e_ab_number_inter, e_ab_number;
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wire [size_mul_counter - 1 : 0] lz_mul;
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wire [size_mul_counter - 1 : 0] lz_mul;
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wire zero_flag;
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wire zero_flag;
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wire sign_res;
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wire sign_res;
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wire eff_op;
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wire eff_op;
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wire [size_mantissa - 1 : 0] initial_rounding_bits, inter_rounding_bits, final_rounding_bits;
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wire [size_mantissa - 1 : 0] initial_rounding_bits, inter_rounding_bits, final_rounding_bits;
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wire [size_mul_mantissa + 1 : 0] normalized_mantissa, adder_mantissa;
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wire [size_mul_mantissa + 1 : 0] normalized_mantissa, adder_mantissa;
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wire [size_mul_mantissa : 0] unnormalized_mantissa;
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wire [size_mul_mantissa : 0] unnormalized_mantissa;
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wire [size_mul_mantissa - 1 : 0] shifted_m_ab;
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wire [size_mul_mantissa - 1 : 0] shifted_m_ab;
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wire [size_mul_mantissa - 1 : 0] m_c, m_ab;
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wire [size_mul_mantissa - 1 : 0] m_c, m_ab;
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wire [size_exception_field - 1 : 0] sp_case_o, sp_case_result_o;
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wire [size_exception_field - 1 : 0] sp_case_mul_result_o;
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wire [size_exception_field - 1 : 0] sp_case_result_o;
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wire [size_mantissa - 2 : 0] final_mantissa;
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wire [size_mantissa - 2 : 0] final_mantissa;
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wire [size_exponent - 1 : 0] final_exponent;
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wire [size_exponent - 1 : 0] final_exponent;
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wire [size_mantissa : 0] rounded_mantissa;
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wire [size_mantissa : 0] rounded_mantissa;
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assign m_a_number = {1'b1, a_number_i[size_mantissa - 2 :0]};
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assign m_a_number = {1'b1, a_number_i[size_mantissa - 2 :0]};
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assign m_b_number = {1'b1, b_number_i[size_mantissa - 2 :0]};
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assign m_b_number = {1'b1, b_number_i[size_mantissa - 2 :0]};
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assign m_c_number = {1'b1, c_number_i[size_mantissa - 2 :0]};
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assign m_c_number = {1'b1, c_number_i[size_mantissa - 2 :0]};
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assign e_a_number = a_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign e_a_number = a_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign e_b_number = b_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign e_b_number = b_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign e_c_number = c_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign e_c_number = c_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign s_a_number = a_number_i[size - size_exception_field - 1];
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assign s_a_number = a_number_i[size - size_exception_field - 1];
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assign s_b_number = b_number_i[size - size_exception_field - 1];
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assign s_b_number = b_number_i[size - size_exception_field - 1];
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assign s_c_number = c_number_i[size - size_exception_field - 1];
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assign s_c_number = c_number_i[size - size_exception_field - 1];
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assign sp_case_a_number = a_number_i[size - 1 : size - size_exception_field];
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assign sp_case_a_number = a_number_i[size - 1 : size - size_exception_field];
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assign sp_case_b_number = b_number_i[size - 1 : size - size_exception_field];
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assign sp_case_b_number = b_number_i[size - 1 : size - size_exception_field];
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assign sp_case_c_number = c_number_i[size - 1 : size - size_exception_field];
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assign sp_case_c_number = c_number_i[size - 1 : size - size_exception_field];
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//instantiate multiply component
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//instantiate multiply component
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multiply #( .size_mantissa(size_mantissa),
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multiply #( .size_mantissa(size_mantissa),
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.size_counter(size_counter),
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.size_counter(size_counter),
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.size_mul_mantissa(size_mul_mantissa))
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.size_mul_mantissa(size_mul_mantissa))
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multiply_instance ( .a_mantissa_i(m_a_number),
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multiply_instance ( .a_mantissa_i(m_a_number),
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.b_mantissa_i(m_b_number),
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.b_mantissa_i(m_b_number),
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.mul_mantissa(m_ab_mantissa));
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.mul_mantissa(m_ab_mantissa));
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assign mul_mantissa = m_ab_mantissa[size_mul_mantissa-1]? m_ab_mantissa[size_mul_mantissa-2 : size_mul_mantissa - size_mantissa] :
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m_ab_mantissa[size_mul_mantissa-3 : size_mul_mantissa - size_mantissa - 1];
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assign c_mantissa = {1'b0,m_c_number, {(shift_mantissa_0_bits){1'b0}}};
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assign c_mantissa = {1'b0,m_c_number, {(shift_mantissa_0_bits){1'b0}}};
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assign e_ab_number_inter = e_a_number + e_b_number;
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assign e_ab_number_inter = e_a_number + e_b_number;
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assign e_ab_number = e_ab_number_inter - {(bias_0_bits){1'b1}};
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assign e_ab_number = e_ab_number_inter - {(bias_0_bits){1'b1}};
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//find the greater exponent
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//find the greater exponent
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assign ab_greater_exponent = e_ab_number - e_c_number;
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assign ab_greater_exponent = e_ab_number - e_c_number;
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assign c_greater_exponent = e_c_number - e_ab_number;
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assign c_greater_exponent = e_c_number - e_ab_number;
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//find the difference between exponents
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//find the difference between exponents
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assign exp_difference = (ab_greater_exponent[size_exponent])? c_greater_exponent[size_exponent - 1 : 0] : ab_greater_exponent[size_exponent - 1 : 0];
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assign exp_difference = (ab_greater_exponent[size_exponent])? c_greater_exponent[size_exponent - 1 : 0] : ab_greater_exponent[size_exponent - 1 : 0];
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assign exp_inter = (c_greater_exponent[size_exponent])? {1'b0, e_ab_number} : {1'b0, e_c_number};
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assign exp_inter = (c_greater_exponent[size_exponent])? {1'b0, e_ab_number} : {1'b0, e_c_number};
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//set shifter always on m_ab_number
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//set shifter always on m_ab_number
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assign {m_c, m_ab} = (ab_greater_exponent[size_exponent])? {c_mantissa, m_ab_mantissa} :
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assign {m_c, m_ab} = (ab_greater_exponent[size_exponent])? {c_mantissa, m_ab_mantissa} :
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{m_ab_mantissa, c_mantissa};
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{m_ab_mantissa, c_mantissa};
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//shift m_ab_number
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//shift m_ab_number
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shifter #( .INPUT_SIZE(size_mul_mantissa),
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shifter #( .INPUT_SIZE(size_mul_mantissa),
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.SHIFT_SIZE(size_exponent),
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.SHIFT_SIZE(size_exponent),
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.OUTPUT_SIZE(size_mul_mantissa + size_mantissa),
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.OUTPUT_SIZE(size_mul_mantissa + size_mantissa),
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.DIRECTION(1'b0), //0=right, 1=left
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.DIRECTION(1'b0), //0=right, 1=left
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.PIPELINE(pipeline),
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.PIPELINE(pipeline),
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.POSITION(pipeline_pos))
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.POSITION(pipeline_pos))
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m_b_shifter_instance( .a(m_ab),//mantissa
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m_b_shifter_instance( .a(m_ab),//mantissa
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.arith(1'b0),//logical shift
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.arith(1'b0),//logical shift
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.shft(exp_difference),
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.shft(exp_difference),
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.shifted_a({shifted_m_ab, initial_rounding_bits}));
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.shifted_a({shifted_m_ab, initial_rounding_bits}));
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//instantiate effective_op component
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//instantiate effective_op component
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effective_op effective_op_instance( .sign_a(s_a_number),
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effective_op effective_op_instance( .sign_a(s_a_number),
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.sign_b(s_b_number),
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.sign_b(s_b_number),
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.sign_c(s_c_number),
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.sign_c(s_c_number),
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.sub(sub),
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.sub(sub),
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.eff_sub(eff_op));
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.eff_sub(eff_op));
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//instantiate accumulate component
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//instantiate accumulate component
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accumulate #(.size_mul_mantissa(size_mul_mantissa))
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accumulate #(.size_mul_mantissa(size_mul_mantissa))
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accumulate_instance ( .m_a(m_c),
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accumulate_instance ( .m_a(m_c),
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.m_b(shifted_m_ab),
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.m_b(shifted_m_ab),
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.eff_op(eff_op),
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.eff_op(eff_op),
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.adder_mantissa(adder_mantissa));
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.adder_mantissa(adder_mantissa));
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//compute unnormalized_mantissa
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//compute unnormalized_mantissa
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assign {unnormalized_mantissa, inter_rounding_bits} =
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assign {unnormalized_mantissa, inter_rounding_bits} =
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(adder_mantissa[size_mul_mantissa + 1])? ({~adder_mantissa[size_mul_mantissa : 0], ~initial_rounding_bits}) :
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(adder_mantissa[size_mul_mantissa + 1])? ({~adder_mantissa[size_mul_mantissa : 0], ~initial_rounding_bits}) :
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({adder_mantissa[size_mul_mantissa : 0], initial_rounding_bits});
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({adder_mantissa[size_mul_mantissa : 0], initial_rounding_bits});
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//instantiate leading_zeros component
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//instantiate leading_zeros component
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leading_zeros #( .SIZE_INT(size_mul_mantissa + 1'b1),
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leading_zeros #( .SIZE_INT(size_mul_mantissa + 1'b1),
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.SIZE_COUNTER(size_mul_counter),
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.SIZE_COUNTER(size_mul_counter),
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.PIPELINE(pipeline))
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.PIPELINE(pipeline))
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leading_zeros_instance( .a(unnormalized_mantissa[size_mul_mantissa : 0]),
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leading_zeros_instance( .a(unnormalized_mantissa[size_mul_mantissa : 0]),
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.ovf(unnormalized_mantissa[size_mul_mantissa]),
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.ovf(unnormalized_mantissa[size_mul_mantissa]),
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.lz(lz_mul));
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.lz(lz_mul));
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//instantiate shifter component
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//instantiate shifter component
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shifter #( .INPUT_SIZE(size_mul_mantissa + size_mantissa + 1),
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shifter #( .INPUT_SIZE(size_mul_mantissa + size_mantissa + 1),
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.SHIFT_SIZE(size_mul_counter),
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.SHIFT_SIZE(size_mul_counter),
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.OUTPUT_SIZE(size_mul_mantissa + size_mantissa + 2),
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.OUTPUT_SIZE(size_mul_mantissa + size_mantissa + 2),
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.DIRECTION(1'b1),
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.DIRECTION(1'b1),
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.PIPELINE(pipeline),
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.PIPELINE(pipeline),
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.POSITION(pipeline_pos))
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.POSITION(pipeline_pos))
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shifter_instance( .a({unnormalized_mantissa, inter_rounding_bits}),
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shifter_instance( .a({unnormalized_mantissa, inter_rounding_bits}),
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.arith(1'b0),
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.arith(1'b0),
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.shft(lz_mul),
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.shft(lz_mul),
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.shifted_a({normalized_mantissa, final_rounding_bits}));
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.shifted_a({normalized_mantissa, final_rounding_bits}));
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//instantiate rounding_component
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//instantiate rounding_component
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rounding #( .SIZE_MOST_S_MANTISSA(size_mantissa+1),
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rounding #( .SIZE_MOST_S_MANTISSA(size_mantissa+1),
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.SIZE_LEAST_S_MANTISSA(size_mul_mantissa+2))
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.SIZE_LEAST_S_MANTISSA(size_mul_mantissa+2))
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rounding_instance( .unrounded_mantissa({1'b0, normalized_mantissa[size_mul_mantissa+1 : size_mantissa + 2]}),
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rounding_instance( .unrounded_mantissa({1'b0, normalized_mantissa[size_mul_mantissa+1 : size_mantissa + 2]}),
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.dummy_bits({normalized_mantissa[size_mantissa + 1 : 0],final_rounding_bits}),
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.dummy_bits({normalized_mantissa[size_mantissa + 1 : 0],final_rounding_bits}),
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.rounded_mantissa(rounded_mantissa));
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.rounded_mantissa(rounded_mantissa));
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//instantiate special_cases_mul_acc component
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//instantiate special_cases_mul and special_cases_mul_acc components
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special_cases_mul_acc #( .size_exception_field(size_exception_field),
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special_cases_mul_acc #( .size_exception_field(size_exception_field),
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.zero(zero),
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.zero(zero),
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.normal_number(normal_number),
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.normal_number(normal_number),
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.infinity(infinity),
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.infinity(infinity),
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.NaN(NaN))
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.NaN(NaN))
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special_cases_mul_acc_instance ( .sp_case_a_number(sp_case_a_number),
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special_cases_mul_acc_instance ( .sp_case_a_number(sp_case_a_number),
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.sp_case_b_number(sp_case_b_number),
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.sp_case_b_number(sp_case_b_number),
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.sp_case_c_number(sp_case_c_number),
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.sp_case_c_number(sp_case_c_number),
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.sp_case_result_o(sp_case_result_o));
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.sp_case_result_o(sp_case_result_o));
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special_cases_mul #( .size_exception_field(size_exception_field),
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.zero(zero),
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.normal_number(normal_number),
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.infinity(infinity),
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.NaN(NaN))
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special_cases_mul_instance( .sp_case_a_number(sp_case_a_number),
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.sp_case_b_number(sp_case_b_number),
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.sp_case_result_o(sp_case_mul_result_o));
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//set zero_flag in case of equal numbers
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//set zero_flag in case of equal numbers
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assign zero_flag = ~((|{rounded_mantissa, sp_case_result_o[1]}) & (|sp_case_result_o));
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assign zero_flag = ~(|(rounded_mantissa));
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//compute resulted_sign
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//compute resulted_sign
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assign sign_res = (eff_op)? (!c_greater_exponent[size_exponent]?
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assign sign_res = (eff_op)? (!c_greater_exponent[size_exponent]?
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(!ab_greater_exponent[size_exponent]? ~adder_mantissa[size_mul_mantissa+1] : s_c_number) : ~(s_b_number^s_a_number)) : s_c_number;
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(!ab_greater_exponent[size_exponent]? ~adder_mantissa[size_mul_mantissa+1] : s_c_number) : ~(s_b_number^s_a_number)) : s_c_number;
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assign final_mantissa = (rounded_mantissa[size_mantissa])?
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assign final_mantissa = (rounded_mantissa[size_mantissa])?
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(rounded_mantissa[size_mantissa : 1]) :
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(rounded_mantissa[size_mantissa : 1]) :
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(rounded_mantissa[size_mantissa-1: 0]);
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(rounded_mantissa[size_mantissa-1: 0]);
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assign unadjusted_exponent = exp_inter - lz_mul;
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assign unadjusted_exponent = exp_inter - lz_mul;
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assign final_exponent = unadjusted_exponent + 2'd2;
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assign final_exponent = unadjusted_exponent + 2'd2;
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assign resulting_number_o = (zero_flag)? {size{1'b0}} :{sp_case_result_o, sign_res, final_exponent, final_mantissa};
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assign resulting_number_o = (zero_flag)? {size{1'b0}} :
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(!sp_case_a_number || !sp_case_b_number)? {c_number_i[size-1 : size-size_exception_field], s_c_number, c_number_i[size-1-size_exception_field-1 : 0]} :
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(!sp_case_c_number)?
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(eff_op?
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{sp_case_mul_result_o, ~(s_a_number^s_b_number), e_ab_number[size_exponent-1 : 0], mul_mantissa} :
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{sp_case_mul_result_o, s_a_number^s_b_number, e_ab_number[size_exponent-1 : 0], mul_mantissa}) :
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{sp_case_result_o, sign_res, final_exponent, final_mantissa};
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endmodule
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endmodule
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