////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Filename: cpuscope.cpp
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// Filename: cpuscope.cpp
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//
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//
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// Project: XuLA2-LX25 SoC based upon the ZipCPU
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// Project: XuLA2-LX25 SoC based upon the ZipCPU
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//
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//
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// Purpose: To read out, and decompose, the results of the wishbone scope
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// Purpose: To read out, and decompose, the results of the wishbone scope
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// as applied to the ICAPE2 interaction.
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// as applied to the ICAPE2 interaction.
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//
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//
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// Creator: Dan Gisselquist, Ph.D.
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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// Gisselquist Technology, LLC
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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//
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// This program is free software (firmware): you can redistribute it and/or
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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// your option) any later version.
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//
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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// for more details.
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//
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//
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// You should have received a copy of the GNU General Public License along
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.) If not, see
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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// <http://www.gnu.org/licenses/> for a copy.
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//
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <unistd.h>
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#include <strings.h>
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#include <strings.h>
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#include <ctype.h>
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#include <ctype.h>
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#include <string.h>
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#include <string.h>
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#include <signal.h>
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#include <signal.h>
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#include <assert.h>
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#include <assert.h>
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#include "usbi.h"
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#include "usbi.h"
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#include "port.h"
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#include "port.h"
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#include "llcomms.h"
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#include "llcomms.h"
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#include "regdefs.h"
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#include "regdefs.h"
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#include "scopecls.h"
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#define WBSCOPE R_CPUSCOPE
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#define WBSCOPE R_CPUSCOPE
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#define WBSCOPEDATA R_CPUSCOPED
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#define WBSCOPEDATA R_CPUSCOPED
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#include "zopcodes.h"
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#include "zopcodes.h"
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FPGA *m_fpga;
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FPGA *m_fpga;
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void closeup(int v) {
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void closeup(int v) {
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m_fpga->kill();
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m_fpga->kill();
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exit(0);
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exit(0);
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}
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}
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unsigned brev(const unsigned v) {
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unsigned brev(const unsigned v) {
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unsigned int r, a;
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unsigned int r, a;
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a = v;
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a = v;
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r = 0;
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r = 0;
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for(int i=0; i<8; i++) {
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for(int i=0; i<8; i++) {
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r <<= 1;
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r <<= 1;
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r |= (a&1);
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r |= (a&1);
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a >>= 1;
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a >>= 1;
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} return r;
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} return r;
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}
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}
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unsigned wrev(const unsigned v) {
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unsigned wrev(const unsigned v) {
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unsigned r = brev(v&0x0ff);
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unsigned r = brev(v&0x0ff);
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r |= brev((v>>8)&0x0ff)<<8;
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r |= brev((v>>8)&0x0ff)<<8;
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return r;
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return r;
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}
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}
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void decode(DEVBUS::BUSW val) {
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const char *opcodestr[] = {
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"SUB","AND","ADD","OR","XOR","LSR","LSL","ASR",
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"MPY","LDILO","MPYUHI","MPYSHI","BREV","POPC","ROL","MOV",
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"CMP","TEST","LOD","STO","DIVU","DIVS","LDI","LDI",
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"NOOP","BREAK","LOCK","(rsrvd)","(rsrvd)","(rsrvd)","(rsrvd)","(rsrvd)"
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};
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const char *regstr[] = {
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"R0","R1","R2","R3","R4","R5","R6","R7","R8","R9","RA","RB","RC",
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"SP","CC","PC"
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};
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class CPUSCOPE : public SCOPE {
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public:
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CPUSCOPE(FPGA *fpga, unsigned addr, bool vecread)
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: SCOPE(fpga, addr, false, false) {};
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~CPUSCOPE(void) {}
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virtual void decode(DEVBUS::BUSW val) const {
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int i_wb_err, gie, alu_illegal, newpc, mem_busy, stb, we,
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maddr, ins, pfval, alu_pc;
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int pfcyc, pfstb, pfaddr;
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i_wb_err = (val>>31)&1;
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gie = (val>>30)&1;
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alu_illegal = (val>>29)&1;
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newpc = (val>>28)&1;
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mem_busy = (val>>27)&1;
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stb = (val>>26)&1;
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we = (val>>25)&1;
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maddr = (val>>16)&0x01ff;
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ins = (val>>16)&0x07ff;
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pfval = (val>>15)&1;
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pfcyc = (val>>14)&1;
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pfstb = (val>>13)&1;
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pfaddr = (val & 0x1fff);
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alu_pc = (val & 0x7fff);
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printf("%s%s%s%s%s ",
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(i_wb_err)?"E ":" ",
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(gie)?"GIE":" ",
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(alu_illegal)?"ILL":" ",
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(newpc)?"NPC":" ",
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(mem_busy)?"MBSY":" ");
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if (mem_busy)
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printf("M:%s%s@..%4x", (stb)?"STB":" ",(we)?"W":"R",
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maddr);
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else {
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int inreg = (ins>>6)&0x0f;
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int opcode = ((ins>>1)&0x1f);
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const char *incode = opcodestr[opcode];
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printf("I:%03x %5s,%s", (ins<<1), incode, regstr[inreg]);
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}
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if (pfval)
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printf(" V: %04x%4s", alu_pc, "");
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else
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printf(" %s%s@%04x",
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(pfcyc)?"CYC":" ",
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(pfstb)?"STB":" ",
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pfaddr);
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}
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}
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};
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int main(int argc, char **argv) {
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int main(int argc, char **argv) {
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int skp=0, port = FPGAPORT;
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int skp=0, port = FPGAPORT;
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bool use_usb = true;
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bool use_usb = true;
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skp=1;
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skp=1;
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for(int argn=0; argn<argc-skp; argn++) {
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for(int argn=0; argn<argc-skp; argn++) {
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if (argv[argn+skp][0] == '-') {
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if (argv[argn+skp][0] == '-') {
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if (argv[argn+skp][1] == 'u')
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if (argv[argn+skp][1] == 'u')
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use_usb = true;
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use_usb = true;
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else if (argv[argn+skp][1] == 'p') {
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else if (argv[argn+skp][1] == 'p') {
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use_usb = false;
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use_usb = false;
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if (isdigit(argv[argn+skp][2]))
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if (isdigit(argv[argn+skp][2]))
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port = atoi(&argv[argn+skp][2]);
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port = atoi(&argv[argn+skp][2]);
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}
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}
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skp++; argn--;
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skp++; argn--;
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} else
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} else
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argv[argn] = argv[argn+skp];
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argv[argn] = argv[argn+skp];
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} argc -= skp;
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} argc -= skp;
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if (use_usb)
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if (use_usb)
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m_fpga = new FPGA(new USBI());
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m_fpga = new FPGA(new USBI());
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else
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else
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m_fpga = new FPGA(new NETCOMMS(FPGAHOST, port));
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m_fpga = new FPGA(new NETCOMMS(FPGAHOST, port));
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signal(SIGSTOP, closeup);
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signal(SIGSTOP, closeup);
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signal(SIGHUP, closeup);
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signal(SIGHUP, closeup);
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unsigned v, lgln, scoplen;
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CPUSCOPE *scope = new CPUSCOPE(m_fpga, WBSCOPE, false);
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v = m_fpga->readio(WBSCOPE);
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if (!scope->ready()) {
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if (0x60000000 != (v & 0x60000000)) {
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printf("Scope is not yet ready:\n");
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printf("Scope is not yet ready:\n");
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printf("\tRESET:\t\t%s\n", (v&0x80000000)?"Ongoing":"Complete");
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scope->decode_control();
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printf("\tSTOPPED:\t%s\n", (v&0x40000000)?"Yes":"No");
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} else
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printf("\tTRIGGERED:\t%s\n", (v&0x20000000)?"Yes":"No");
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scope->read();
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printf("\tPRIMED:\t\t%s\n", (v&0x10000000)?"Yes":"No");
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printf("\tMANUAL:\t\t%s\n", (v&0x08000000)?"Yes":"No");
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printf("\tDISABLED:\t%s\n", (v&0x04000000)?"Yes":"No");
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printf("\tZERO:\t\t%s\n", (v&0x02000000)?"Yes":"No");
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exit(0);
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} else printf("SCOPD = %08x\n", v);
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lgln = (v>>20) & 0x1f;
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scoplen = (1<<lgln);
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DEVBUS::BUSW *buf;
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buf = new DEVBUS::BUSW[scoplen];
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bool compressed = false, vector_read = true;
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DEVBUS::BUSW addrv = 0;
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if (vector_read) {
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m_fpga->readz(WBSCOPEDATA, scoplen, buf);
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} else {
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for(unsigned int i=0; i<scoplen; i++)
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buf[i] = m_fpga->readio(WBSCOPEDATA);
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}
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if(compressed) {
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for(int i=0; i<(int)scoplen; i++) {
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if ((buf[i]>>31)&1) {
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addrv += (buf[i]&0x7fffffff);
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printf(" ** \n");
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continue;
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}
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printf("%10d %08x: ", addrv++, buf[i]);
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decode(buf[i]);
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printf("\n");
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}
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} else {
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for(int i=0; i<(int)scoplen; i++) {
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if ((i>0)&&(buf[i] == buf[i-1])&&(i<(int)(scoplen-1))) {
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if ((i>2)&&(buf[i] != buf[i-2]))
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printf(" **** ****\n");
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continue;
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} printf("%9d %08x: ", i, buf[i]);
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decode(buf[i]);
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printf("\n");
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}
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}
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if (m_fpga->poll()) {
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printf("FPGA was interrupted\n");
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m_fpga->clear();
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m_fpga->writeio(R_ICONTROL, SCOPEN);
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}
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delete[] buf;
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delete m_fpga;
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delete m_fpga;
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}
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}
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