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https://opencores.org/ocsvn/yacc/yacc/trunk
[/] [yacc/] [trunk/] [syn/] [xilinx/] [s3_vsmpl.drc] - Diff between revs 2 and 4
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| Rev 2 |
Rev 4 |
WARNING:PhysDesignRules:367 - The signal _IBUF> is incomplete. The
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WARNING:PhysDesignRules:367 - The signal _IBUF> is incomplete. The
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signal does not drive any load pins in the design.
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signal does not drive any load pins in the design.
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WARNING:PhysDesignRules:367 - The signal _IBUF> is incomplete. The
|
WARNING:PhysDesignRules:367 - The signal _IBUF> is incomplete. The
|
signal does not drive any load pins in the design.
|
signal does not drive any load pins in the design.
|
WARNING:PhysDesignRules:367 - The signal _IBUF> is incomplete. The
|
WARNING:PhysDesignRules:367 - The signal _IBUF> is incomplete. The
|
signal does not drive any load pins in the design.
|
signal does not drive any load pins in the design.
|
WARNING:PhysDesignRules:367 - The signal is incomplete. The
|
WARNING:PhysDesignRules:367 - The signal is incomplete. The
|
signal does not drive any load pins in the design.
|
signal does not drive any load pins in the design.
|
WARNING:PhysDesignRules:367 - The signal is incomplete. The
|
WARNING:PhysDesignRules:367 - The signal is incomplete. The
|
signal does not drive any load pins in the design.
|
signal does not drive any load pins in the design.
|
DRC detected 0 errors and 5 warnings.
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DRC detected 0 errors and 5 warnings.
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