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[/] [zet86/] [trunk/] [soc/] [but_int.v] - Diff between revs 42 and 49
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| Rev 42 |
Rev 49 |
module but_int (
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module but_int (
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input clk,
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input clk,
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input rst,
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input rst,
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input but_,
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input but_,
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output reg intr,
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output reg intr,
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input inta
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input inta
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);
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);
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// Register declaration
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// Register declaration
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reg old_but;
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reg old_but;
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// Behaviour
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// Behaviour
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always @(posedge clk)
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always @(posedge clk)
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if (rst) intr <= 1'b0;
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if (rst) intr <= 1'b0;
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else intr <= intr ? !inta : (but_ && !old_but);
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else intr <= intr ? !inta : (but_ && !old_but);
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always @(posedge clk) old_but <= but_;
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always @(posedge clk) old_but <= but_;
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endmodule
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endmodule
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