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;
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;
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; Filename: helloworld.S
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; Filename: helloworld.S
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;
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;
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; Project: Zip CPU -- a small, lightweight, RISC CPU soft core
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; Project: Zip CPU -- a small, lightweight, RISC CPU soft core
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;
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;
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; Purpose: A test of whether or not we can scroll a message on a
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; Purpose: A test of whether or not we can scroll a message on a
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; seven segment display. This depends upon the seven segment
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; seven segment display. This depends upon the seven segment
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; display driver (not included) being installed at position
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; display driver (not included) being installed at position
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; 0x15 in memory. If so, this scrolls the message:
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; 0x15 in memory. If so, this scrolls the message:
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; "HELLO UJorld." across the 4 seven segment display digits.
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; "HELLO UJorld." across the 4 seven segment display digits.
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;
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;
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; This test discovered that right shifting by 31 or more did
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; This test discovered that right shifting by 31 or more did
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; not result in zero as desired. It also discovered that the
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; not result in zero as desired. It also discovered that the
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; .DAT assembly instruction did not function as desired. Both
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; .DAT assembly instruction did not function as desired. Both
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; bugs were fixed to get this to work.
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; bugs were fixed to get this to work.
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;
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;
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; Creator: Dan Gisselquist, Ph.D.
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; Creator: Dan Gisselquist, Ph.D.
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; Gisselquist Tecnology, LLC
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; Gisselquist Technology, LLC
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;
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;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;
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;
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; Copyright (C) 2015, Gisselquist Technology, LLC
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; Copyright (C) 2015, Gisselquist Technology, LLC
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;
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;
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; This program is free software (firmware): you can redistribute it and/or
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; This program is free software (firmware): you can redistribute it and/or
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; modify it under the terms of the GNU General Public License as published
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; modify it under the terms of the GNU General Public License as published
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; by the Free Software Foundation, either version 3 of the License, or (at
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; by the Free Software Foundation, either version 3 of the License, or (at
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; your option) any later version.
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; your option) any later version.
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;
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;
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; This program is distributed in the hope that it will be useful, but WITHOUT
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; This program is distributed in the hope that it will be useful, but WITHOUT
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; ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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; ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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; for more details.
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; for more details.
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;
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;
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; License: GPL, v3, as defined and found on www.gnu.org,
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; License: GPL, v3, as defined and found on www.gnu.org,
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; http://www.gnu.org/licenses/gpl.html
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; http://www.gnu.org/licenses/gpl.html
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;
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;
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;
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;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;
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;
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; Register map
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; Register map
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; R12 peripherals
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; R12 peripherals
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; R11 timer length
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; R11 timer length
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; R10 value to clear/reset the PIC
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; R10 value to clear/reset the PIC
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; uR12 = memory
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; uR12 = memory
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; uR11 = rawsseg
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; uR11 = rawsseg
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; uR9 = state
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; uR9 = state
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; R8 = new value for SSEG
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; R8 = new value for SSEG
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build_supervisor_state:
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build_supervisor_state:
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CLR R12 ; Load a pointer to our peripherals
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CLR R12 ; Load a pointer to our peripherals
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LDIHI $c000h,R12
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LDIHI $c000h,R12
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LDI $5f5e1h,R11 ; An amount to reset the timer to: 1/4 sec
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LDI $5f5e1h,R11 ; An amount to reset the timer to: 1/4 sec
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LSL $6,R11
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LSL $6,R11
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LDIHI $8010h,R10 ; A value to clear/reset the PIC for timerA ints
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LDIHI $8010h,R10 ; A value to clear/reset the PIC for timerA ints
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LDILO $ffffh,R10
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LDILO $ffffh,R10
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MOV $1+PC,uR12 ; User memory (so this isn't supervisor state..)
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MOV $1+PC,uR12 ; User memory (so this isn't supervisor state..)
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BRA $4
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BRA $4
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.DAT $0x6e9e1c1c ; Raw SSEG for 'HELL'
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.DAT $0x6e9e1c1c ; Raw SSEG for 'HELL'
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.DAT $0xfc007c70 ; Raw SSEG for 'O UJ'
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.DAT $0xfc007c70 ; Raw SSEG for 'O UJ'
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.DAT $0x3a0a607b ; Raw SSEG for 'orld.'
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.DAT $0x3a0a607b ; Raw SSEG for 'orld.'
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.DAT $0x00000000 ; Raw SSEG for ' '
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.DAT $0x00000000 ; Raw SSEG for ' '
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build_user_state:
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build_user_state:
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LDI $15h,R0
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LDI $15h,R0
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MOV R0,uR11
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MOV R0,uR11
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MOV $6+PC,uPC
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MOV $6+PC,uPC
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CLR R0
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CLR R0
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MOV R0,uR9
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MOV R0,uR9
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repeat:
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repeat:
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STO R11,$4(R12) ; Reset the timer
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STO R11,$4(R12) ; Reset the timer
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STO R10,(R12) ; Reset the PIC
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STO R10,(R12) ; Reset the PIC
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RTU
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RTU
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BRA $-4
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BRA $-4
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user_task:
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user_task:
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MOV R9,R0
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MOV R9,R0
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LSR $2,R0
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LSR $2,R0
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ADD R12,R0
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ADD R12,R0
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LOD (R0),R8 ; Read the left word
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LOD (R0),R8 ; Read the left word
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MOV R9,R1 ; Rotate it into place
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MOV R9,R1 ; Rotate it into place
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AND $3,R1
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AND $3,R1
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LSL $3,R1 ; Multiply by eight
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LSL $3,R1 ; Multiply by eight
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LSL R1,R8 ; Shift words to left by 0,8,16,24 bits
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LSL R1,R8 ; Shift words to left by 0,8,16,24 bits
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|
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ADD $1,R0 ; Calculate address of next word
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ADD $1,R0 ; Calculate address of next word
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CMP $4+R12,R0
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CMP $4+R12,R0
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SUB.GE $4,R0
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SUB.GE $4,R0
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LOD (R0),R2 ; Load the next word into a building location
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LOD (R0),R2 ; Load the next word into a building location
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LDI $32,R3
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LDI $32,R3
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SUB R1,R3
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SUB R1,R3
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LSR R3,R2
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LSR R3,R2
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OR R2,R8 ; Put the two together
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OR R2,R8 ; Put the two together
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|
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STO R8,(R11) ; Store the result
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STO R8,(R11) ; Store the result
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|
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ADD $1,R9 ; Increment our state
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ADD $1,R9 ; Increment our state
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AND $15,R9
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AND $15,R9
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|
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WAIT ; Wait for the next interrupt
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WAIT ; Wait for the next interrupt
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BRA $-21 ; Back up to the top to start over
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BRA $-21 ; Back up to the top to start over
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BREAK
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BREAK
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BREAK
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BREAK
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BREAK
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BREAK
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