URL
https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk
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SCHEMATIC START ;
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SCHEMATIC START ;
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# map: version Diamond (64-bit) 2.2.0.101 -- WARNING: Map write only section -- Thu Feb 6 15:35:20 2014
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# map: version Diamond (64-bit) 3.1.0.96 -- WARNING: Map write only section -- Sun Jul 06 07:46:54 2014
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SYSCONFIG SDM_PORT=DISABLE SLAVE_SPI_PORT=DISABLE I2C_PORT=DISABLE MASTER_SPI_PORT=DISABLE COMPRESS_CONFIG=ON CONFIGURATION=CFG MY_ASSP=OFF ONE_TIME_PROGRAM=OFF CONFIG_SECURE=OFF MCCLK_FREQ=2.08 JTAG_PORT=ENABLE ENABLE_TRANSFR=DISABLE SHAREDEBRINIT=DISABLE MUX_CONFIGURATION_PORTS=DISABLE ;
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SYSCONFIG SDM_PORT=DISABLE SLAVE_SPI_PORT=DISABLE I2C_PORT=DISABLE MASTER_SPI_PORT=DISABLE COMPRESS_CONFIG=ON CONFIGURATION=CFG MY_ASSP=OFF ONE_TIME_PROGRAM=OFF CONFIG_SECURE=OFF MCCLK_FREQ=2.08 JTAG_PORT=ENABLE ENABLE_TRANSFR=DISABLE SHAREDEBRINIT=DISABLE MUX_CONFIGURATION_PORTS=DISABLE ;
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LOCATE COMP "data_io[0]" SITE "132" ;
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LOCATE COMP "data_io[0]" SITE "132" ;
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LOCATE COMP "clk40_i" SITE "27" ;
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LOCATE COMP "clk40_i" SITE "27" ;
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LOCATE COMP "ldata_io[7]" SITE "10" ;
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LOCATE COMP "ldata_io[7]" SITE "10" ;
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Line 68... |
LOCATE COMP "addr_o[3]" SITE "55" ;
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LOCATE COMP "addr_o[3]" SITE "55" ;
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LOCATE COMP "addr_o[2]" SITE "50" ;
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LOCATE COMP "addr_o[2]" SITE "50" ;
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LOCATE COMP "addr_o[1]" SITE "49" ;
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LOCATE COMP "addr_o[1]" SITE "49" ;
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LOCATE COMP "addr_o[0]" SITE "45" ;
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LOCATE COMP "addr_o[0]" SITE "45" ;
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LOCATE COMP "reset_o" SITE "22" ;
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LOCATE COMP "reset_o" SITE "22" ;
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FREQUENCY NET "cpu_clkgen" 40.000000 MHz ;
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SCHEMATIC END ;
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SCHEMATIC END ;
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BLOCK RESETPATHS ;
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BLOCK RESETPATHS ;
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BLOCK ASYNCPATHS ;
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BLOCK ASYNCPATHS ;
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COMMERCIAL ;
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COMMERCIAL ;
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// No timing preferences found. TRCE invokes auto-generation of timing preferences
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// Section Autogen
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FREQUENCY NET "clk40_i_c" 111.645 MHz ;
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// End Section Autogen
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