| Line 1... |
Line 1... |
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell CC3_top
|
Report for cell CC3_top
|
Instance path: CC3_top
|
Instance path: CC3_top
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 1218.00 100.0
|
SLIC 1208.00 100.0
|
IOLGC 10.00 100.0
|
IOLGC 10.00 100.0
|
LUT4 2043.00 100.0
|
LUT4 2034.00 100.0
|
IOREG 10 100.0
|
IOREG 10 100.0
|
IOBUF 49 100.0
|
IOBUF 69 100.0
|
PFUREG 429 100.0
|
PFUREG 570 100.0
|
RIPPLE 196 100.0
|
RIPPLE 186 100.0
|
EBR 10 100.0
|
EBR 10 100.0
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
vgatext 1 7.1
|
vgatext 1 6.9
|
bios2k 1 0.0
|
bios2k 1 0.0
|
MC6809_cpu 1 92.7
|
MC6809_cpu 1 92.8
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell vgatext
|
Report for cell vgatext
|
Instance path: CC3_top/textctrl
|
Instance path: CC3_top/textctrl
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 87.00 7.1
|
SLIC 83.17 6.9
|
LUT4 100.00 4.9
|
LUT4 92.00 4.5
|
PFUREG 80 18.6
|
PFUREG 80 14.0
|
RIPPLE 36 18.4
|
RIPPLE 36 19.4
|
EBR 8 80.0
|
EBR 8 80.0
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
textmem4k 1 0.1
|
textmem4k 1 0.0
|
fontrom 1 0.0
|
fontrom 1 0.0
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell textmem4k
|
Report for cell textmem4k
|
Instance path: CC3_top/textctrl/chars
|
Instance path: CC3_top/textctrl/chars
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 1.75 0.1
|
|
LUT4 7.00 0.3
|
|
EBR 4 40.0
|
EBR 4 40.0
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell fontrom
|
Report for cell fontrom
|
Instance path: CC3_top/textctrl/font
|
Instance path: CC3_top/textctrl/font
|
Cell usage:
|
Cell usage:
|
| Line 53... |
Line 51... |
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell MC6809_cpu
|
Report for cell MC6809_cpu
|
Instance path: CC3_top/cpu0
|
Instance path: CC3_top/cpu0
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 1129.33 92.7
|
SLIC 1121.00 92.8
|
LUT4 1942.00 95.1
|
LUT4 1939.00 95.3
|
PFUREG 344 80.2
|
PFUREG 484 84.9
|
RIPPLE 160 81.6
|
RIPPLE 150 80.6
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
test_condition 1 0.8
|
test_condition 1 3.7
|
regblock 1 39.4
|
regblock 1 37.7
|
decode_op 1 6.8
|
decode_alu 1 2.2
|
decode_regs 1 10.9
|
decode_op 1 2.5
|
decode_alu 1 2.6
|
decode_regs 1 10.1
|
decode_ea 1 0.4
|
decode_ea 1 2.1
|
alu 1 27.0
|
alu 1 25.7
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell test_condition
|
Report for cell test_condition
|
Instance path: CC3_top/cpu0/test_cond
|
Instance path: CC3_top/cpu0/test_cond
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 10.08 0.8
|
SLIC 44.33 3.7
|
LUT4 21.00 1.0
|
LUT4 97.17 4.8
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell decode_alu
|
Report for cell decode_alu
|
Instance path: CC3_top/cpu0/dec_alu
|
Instance path: CC3_top/cpu0/dec_alu
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 31.83 2.6
|
SLIC 27.00 2.2
|
LUT4 66.50 3.3
|
LUT4 57.50 2.8
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell decode_ea
|
Report for cell decode_ea
|
Instance path: CC3_top/cpu0/dec_ea
|
Instance path: CC3_top/cpu0/dec_ea
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 4.67 0.4
|
SLIC 25.42 2.1
|
LUT4 9.50 0.5
|
LUT4 56.00 2.8
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell decode_op
|
Report for cell decode_op
|
Instance path: CC3_top/cpu0/dec_op
|
Instance path: CC3_top/cpu0/dec_op
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 82.83 6.8
|
SLIC 30.58 2.5
|
LUT4 175.00 8.6
|
LUT4 62.00 3.0
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell decode_regs
|
Report for cell decode_regs
|
Instance path: CC3_top/cpu0/dec_regs
|
Instance path: CC3_top/cpu0/dec_regs
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 132.88 10.9
|
SLIC 121.57 10.1
|
LUT4 275.50 13.5
|
LUT4 249.50 12.3
|
PFUREG 12 2.8
|
PFUREG 12 2.1
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell regblock
|
Report for cell regblock
|
Instance path: CC3_top/cpu0/regs
|
Instance path: CC3_top/cpu0/regs
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 480.22 39.4
|
SLIC 455.25 37.7
|
LUT4 897.50 43.9
|
LUT4 847.33 41.7
|
PFUREG 112 26.1
|
PFUREG 255 44.7
|
RIPPLE 54 27.6
|
RIPPLE 45 24.2
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
calc_ea 1 9.8
|
calc_ea 1 10.4
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell calc_ea
|
Report for cell calc_ea
|
Instance path: CC3_top/cpu0/regs/ea
|
Instance path: CC3_top/cpu0/regs/ea
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 118.98 9.8
|
SLIC 125.75 10.4
|
LUT4 193.50 9.5
|
LUT4 239.33 11.8
|
RIPPLE 27 13.8
|
PFUREG 8 1.4
|
|
RIPPLE 18 9.7
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell alu
|
Report for cell alu
|
Instance path: CC3_top/cpu0/alu
|
Instance path: CC3_top/cpu0/alu
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 329.00 27.0
|
SLIC 310.80 25.7
|
LUT4 463.00 22.7
|
LUT4 452.50 22.2
|
PFUREG 81 18.9
|
PFUREG 73 12.8
|
RIPPLE 97 49.5
|
RIPPLE 87 46.8
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
alu16 1 14.3
|
alu16 1 15.2
|
alu8 1 9.6
|
alu8 1 8.0
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell alu16
|
Report for cell alu16
|
Instance path: CC3_top/cpu0/alu/alu16
|
Instance path: CC3_top/cpu0/alu/alu16
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 173.95 14.3
|
SLIC 183.35 15.2
|
LUT4 208.83 10.2
|
LUT4 227.83 11.2
|
PFUREG 44 10.3
|
PFUREG 32 5.6
|
RIPPLE 72 36.7
|
RIPPLE 72 38.7
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
mul8x8 1 6.0
|
mul8x8 1 5.3
|
arith16 1 4.7
|
arith16 1 5.1
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell arith16
|
Report for cell arith16
|
Instance path: CC3_top/cpu0/alu/alu16/a16
|
Instance path: CC3_top/cpu0/alu/alu16/a16
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 56.70 4.7
|
SLIC 62.08 5.1
|
LUT4 44.50 2.2
|
LUT4 53.00 2.6
|
RIPPLE 36 18.4
|
RIPPLE 36 19.4
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell mul8x8
|
Report for cell mul8x8
|
Instance path: CC3_top/cpu0/alu/alu16/mulu
|
Instance path: CC3_top/cpu0/alu/alu16/mulu
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 73.58 6.0
|
SLIC 64.07 5.3
|
LUT4 75.00 3.7
|
LUT4 58.50 2.9
|
PFUREG 42 9.8
|
PFUREG 30 5.3
|
RIPPLE 36 18.4
|
RIPPLE 36 19.4
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell alu8
|
Report for cell alu8
|
Instance path: CC3_top/cpu0/alu/alu8
|
Instance path: CC3_top/cpu0/alu/alu8
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 117.28 9.6
|
SLIC 96.53 8.0
|
LUT4 192.33 9.4
|
LUT4 172.67 8.5
|
RIPPLE 25 12.8
|
PFUREG 4 0.7
|
|
RIPPLE 15 8.1
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
shift8 1 0.4
|
shift8 1 0.4
|
logic8 1 0.4
|
logic8 1 0.3
|
arith8 1 3.3
|
arith8 1 1.3
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell shift8
|
Report for cell shift8
|
Instance path: CC3_top/cpu0/alu/alu8/s8
|
Instance path: CC3_top/cpu0/alu/alu8/s8
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 4.67 0.4
|
SLIC 4.83 0.4
|
LUT4 10.00 0.5
|
LUT4 10.00 0.5
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell arith8
|
Report for cell arith8
|
Instance path: CC3_top/cpu0/alu/alu8/a8
|
Instance path: CC3_top/cpu0/alu/alu8/a8
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 39.75 3.3
|
SLIC 15.87 1.3
|
LUT4 41.00 2.0
|
LUT4 12.00 0.6
|
RIPPLE 20 10.2
|
PFUREG 2 0.4
|
|
RIPPLE 10 5.4
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell logic8
|
Report for cell logic8
|
Instance path: CC3_top/cpu0/alu/alu8/l8
|
Instance path: CC3_top/cpu0/alu/alu8/l8
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 4.67 0.4
|
SLIC 3.50 0.3
|
LUT4 9.33 0.5
|
LUT4 7.00 0.3
|
LUT4 7.00 0.3
|
LUT4 7.00 0.3
|
