| Line 1... |
Line 1... |
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|
---------------------------------------------------
|
Report for cell CC3_top
|
Report for cell CC3_top
|
Instance path: CC3_top
|
Instance path: CC3_top
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 1208.00 100.0
|
SLIC 1234.00 100.0
|
IOLGC 10.00 100.0
|
IOLGC 10.00 100.0
|
LUT4 2034.00 100.0
|
LUT4 2091.00 100.0
|
IOREG 10 100.0
|
IOREG 10 100.0
|
IOBUF 69 100.0
|
IOBUF 69 100.0
|
PFUREG 570 100.0
|
PFUREG 479 100.0
|
RIPPLE 186 100.0
|
RIPPLE 183 100.0
|
EBR 10 100.0
|
EBR 10 100.0
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
vgatext 1 6.9
|
vgatext 1 6.8
|
bios2k 1 0.0
|
bios2k 1 0.0
|
MC6809_cpu 1 92.8
|
MC6809_cpu 1 93.0
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell vgatext
|
Report for cell vgatext
|
Instance path: CC3_top/textctrl
|
Instance path: CC3_top/textctrl
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 83.17 6.9
|
SLIC 84.50 6.8
|
LUT4 92.00 4.5
|
LUT4 94.00 4.5
|
PFUREG 80 14.0
|
PFUREG 80 16.7
|
RIPPLE 36 19.4
|
RIPPLE 36 19.7
|
EBR 8 80.0
|
EBR 8 80.0
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
textmem4k 1 0.0
|
textmem4k 1 0.0
|
fontrom 1 0.0
|
fontrom 1 0.0
|
| Line 51... |
Line 51... |
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|
---------------------------------------------------
|
Report for cell MC6809_cpu
|
Report for cell MC6809_cpu
|
Instance path: CC3_top/cpu0
|
Instance path: CC3_top/cpu0
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 1121.00 92.8
|
SLIC 1147.25 93.0
|
LUT4 1939.00 95.3
|
LUT4 1995.00 95.4
|
PFUREG 484 84.9
|
PFUREG 393 82.0
|
RIPPLE 150 80.6
|
RIPPLE 147 80.3
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
test_condition 1 3.7
|
test_condition 1 1.1
|
regblock 1 37.7
|
regblock 1 36.0
|
|
decode_ea 1 0.1
|
|
decode_op 1 3.3
|
|
decode_regs 1 10.3
|
decode_alu 1 2.2
|
decode_alu 1 2.2
|
decode_op 1 2.5
|
alu 1 31.4
|
decode_regs 1 10.1
|
|
decode_ea 1 2.1
|
|
alu 1 25.7
|
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell test_condition
|
Report for cell test_condition
|
Instance path: CC3_top/cpu0/test_cond
|
Instance path: CC3_top/cpu0/test_cond
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 44.33 3.7
|
SLIC 13.50 1.1
|
LUT4 97.17 4.8
|
LUT4 27.00 1.3
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell decode_alu
|
Report for cell decode_alu
|
Instance path: CC3_top/cpu0/dec_alu
|
Instance path: CC3_top/cpu0/dec_alu
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 27.00 2.2
|
SLIC 27.25 2.2
|
LUT4 57.50 2.8
|
LUT4 57.50 2.7
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell decode_ea
|
Report for cell decode_ea
|
Instance path: CC3_top/cpu0/dec_ea
|
Instance path: CC3_top/cpu0/dec_ea
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 25.42 2.1
|
SLIC 1.00 0.1
|
LUT4 56.00 2.8
|
LUT4 2.00 0.1
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell decode_op
|
Report for cell decode_op
|
Instance path: CC3_top/cpu0/dec_op
|
Instance path: CC3_top/cpu0/dec_op
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 30.58 2.5
|
SLIC 41.33 3.3
|
LUT4 62.00 3.0
|
LUT4 86.00 4.1
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell decode_regs
|
Report for cell decode_regs
|
Instance path: CC3_top/cpu0/dec_regs
|
Instance path: CC3_top/cpu0/dec_regs
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 121.57 10.1
|
SLIC 126.98 10.3
|
LUT4 249.50 12.3
|
LUT4 265.00 12.7
|
PFUREG 12 2.1
|
PFUREG 12 2.5
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell regblock
|
Report for cell regblock
|
Instance path: CC3_top/cpu0/regs
|
Instance path: CC3_top/cpu0/regs
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 455.25 37.7
|
SLIC 443.63 36.0
|
LUT4 847.33 41.7
|
LUT4 835.50 40.0
|
PFUREG 255 44.7
|
PFUREG 120 25.1
|
RIPPLE 45 24.2
|
RIPPLE 45 24.6
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
calc_ea 1 10.4
|
calc_ea 1 11.2
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell calc_ea
|
Report for cell calc_ea
|
Instance path: CC3_top/cpu0/regs/ea
|
Instance path: CC3_top/cpu0/regs/ea
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 125.75 10.4
|
SLIC 138.27 11.2
|
LUT4 239.33 11.8
|
LUT4 250.50 12.0
|
PFUREG 8 1.4
|
PFUREG 8 1.7
|
RIPPLE 18 9.7
|
RIPPLE 18 9.8
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell alu
|
Report for cell alu
|
Instance path: CC3_top/cpu0/alu
|
Instance path: CC3_top/cpu0/alu
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 310.80 25.7
|
SLIC 387.58 31.4
|
LUT4 452.50 22.2
|
LUT4 599.00 28.6
|
PFUREG 73 12.8
|
PFUREG 116 24.2
|
RIPPLE 87 46.8
|
RIPPLE 93 50.8
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
alu16 1 15.2
|
mul8x8 1 11.3
|
alu8 1 8.0
|
alu16 1 9.9
|
|
alu8 1 7.0
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell alu16
|
Report for cell alu16
|
Instance path: CC3_top/cpu0/alu/alu16
|
Instance path: CC3_top/cpu0/alu/alu16
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 183.35 15.2
|
SLIC 122.08 9.9
|
LUT4 227.83 11.2
|
LUT4 159.67 7.6
|
PFUREG 32 5.6
|
PFUREG 8 1.7
|
RIPPLE 72 38.7
|
RIPPLE 45 24.6
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
mul8x8 1 5.3
|
arith16 1 4.8
|
arith16 1 5.1
|
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell arith16
|
Report for cell arith16
|
Instance path: CC3_top/cpu0/alu/alu16/a16
|
Instance path: CC3_top/cpu0/alu/alu16/a16
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 62.08 5.1
|
SLIC 59.00 4.8
|
LUT4 53.00 2.6
|
LUT4 47.00 2.2
|
RIPPLE 36 19.4
|
RIPPLE 36 19.7
|
---------------------------------------------------
|
|
Report for cell mul8x8
|
|
Instance path: CC3_top/cpu0/alu/alu16/mulu
|
|
Cell usage:
|
|
cell count Res Usage(%)
|
|
SLIC 64.07 5.3
|
|
LUT4 58.50 2.9
|
|
PFUREG 30 5.3
|
|
RIPPLE 36 19.4
|
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell alu8
|
Report for cell alu8
|
Instance path: CC3_top/cpu0/alu/alu8
|
Instance path: CC3_top/cpu0/alu/alu8
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 96.53 8.0
|
SLIC 86.67 7.0
|
LUT4 172.67 8.5
|
LUT4 139.33 6.7
|
PFUREG 4 0.7
|
RIPPLE 19 10.4
|
RIPPLE 15 8.1
|
|
SUB MODULES
|
SUB MODULES
|
cell count SLC Usage(%)
|
cell count SLC Usage(%)
|
shift8 1 0.4
|
shift8 1 0.7
|
logic8 1 0.3
|
logic8 1 0.1
|
arith8 1 1.3
|
arith8 1 1.8
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell shift8
|
Report for cell shift8
|
Instance path: CC3_top/cpu0/alu/alu8/s8
|
Instance path: CC3_top/cpu0/alu/alu8/s8
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 4.83 0.4
|
SLIC 8.08 0.7
|
LUT4 10.00 0.5
|
LUT4 18.50 0.9
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell arith8
|
Report for cell arith8
|
Instance path: CC3_top/cpu0/alu/alu8/a8
|
Instance path: CC3_top/cpu0/alu/alu8/a8
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 15.87 1.3
|
SLIC 22.25 1.8
|
LUT4 12.00 0.6
|
LUT4 28.00 1.3
|
PFUREG 2 0.4
|
RIPPLE 10 5.5
|
RIPPLE 10 5.4
|
|
---------------------------------------------------
|
---------------------------------------------------
|
Report for cell logic8
|
Report for cell logic8
|
Instance path: CC3_top/cpu0/alu/alu8/l8
|
Instance path: CC3_top/cpu0/alu/alu8/l8
|
Cell usage:
|
Cell usage:
|
cell count Res Usage(%)
|
cell count Res Usage(%)
|
SLIC 3.50 0.3
|
SLIC 1.00 0.1
|
LUT4 7.00 0.3
|
LUT4 2.00 0.1
|
|
---------------------------------------------------
|
|
Report for cell mul8x8
|
|
Instance path: CC3_top/cpu0/alu/mulu
|
|
Cell usage:
|
|
cell count Res Usage(%)
|
|
SLIC 139.75 11.3
|
|
LUT4 236.67 11.3
|
|
PFUREG 76 15.9
|
|
RIPPLE 29 15.8
|
