URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [rtl/] [verilog/] [oc8051_dptr.v] - Diff between revs 82 and 118

Rev 82	Rev 118
Line 42...	Line 42...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.3 2003/01/13 14:14:40 simont`
	`// replace some modules`
	`//`
`// Revision 1.2 2002/09/30 17:33:59 simont`	`// Revision 1.2 2002/09/30 17:33:59 simont`
`// prepared header`	`// prepared header`
`//`	`//`
`//`	`//`

Line 70...	Line 73...
`// data_lo (out) output (low bits) [oc8051_ext_addr_sel.dptr_lo]`	`// data_lo (out) output (low bits) [oc8051_ext_addr_sel.dptr_lo]`
`//`	`//`


`input clk, rst, wr, wr_bit;`	`input clk, rst, wr, wr_bit;`
`input [2:0] wr_sfr;`	`input [1:0] wr_sfr;`
`input [7:0] addr, data_in, data2_in;`	`input [7:0] addr, data_in, data2_in;`

`output [7:0] data_hi, data_lo;`	`output [7:0] data_hi, data_lo;`

`reg [7:0] data_hi, data_lo;`	`reg [7:0] data_hi, data_lo;`