URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [rtl/] [verilog/] [oc8051_int.v] - Diff between revs 82 and 90

Rev 82	Rev 90
Line 44...	Line 44...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.6 2003/01/13 14:14:41 simont`
	`// replace some modules`
	`//`
`// Revision 1.5 2002/09/30 17:33:59 simont`	`// Revision 1.5 2002/09/30 17:33:59 simont`
`// prepared header`	`// prepared header`
`//`	`//`
`//`	`//`

Line 58...	Line 61...
`include "oc8051_timescale.v"	`include "oc8051_timescale.v"
`//synopsys translate_on`	`//synopsys translate_on`



`module oc0851_int (clk, rst, wr_addr, rd_addr, data_in, bit_in, data_out, bit_out, wr, wr_bit,`	`module oc8051_int (clk, rst, wr_addr, rd_addr, data_in, bit_in, data_out, bit_out, wr, wr_bit,`
`//timer interrupts`	`//timer interrupts`
`tf0, tf1, t2_int,`	`tf0, tf1, t2_int,`
`tr0, tr1,`	`tr0, tr1,`
`//external interrupts`	`//external interrupts`
`ie0, ie1,`	`ie0, ie1,`