| Line 121... |
Line 121... |
// int_uart interrupt from uart
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// int_uart interrupt from uart
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// tf0 interrupt from t/c 0
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// tf0 interrupt from t/c 0
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// tf1 interrupt from t/c 1
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// tf1 interrupt from t/c 1
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// tr0 timer 0 run
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// tr0 timer 0 run
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// tr1 timer 1 run
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// tr1 timer 1 run
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wire int_uart, tf0, tf1, tr0, tr1, reti, intr, ack;
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wire int_uart, tf0, tf1, tr0, tr1, reti, intr, ack, syn;
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wire [7:0] int_src;
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wire [7:0] int_src;
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//
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//
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//alu_op alu operation (from decoder)
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//alu_op alu operation (from decoder)
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//alu_op_r alu operation (registerd)
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//alu_op_r alu operation (registerd)
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| Line 327... |
Line 327... |
.dptr_hi(dptr_hi), .dptr_lo(dptr_lo), .ri(ri), .addr_out(ext_addr));
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.dptr_hi(dptr_hi), .dptr_lo(dptr_lo), .ri(ri), .addr_out(ext_addr));
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//
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//
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//
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//
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oc8051_ram_sel oc8051_ram_sel1(.addr(rd_addr_r), .bit_in(bit_data), .in_ram(ram_data),
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oc8051_ram_sel oc8051_ram_sel1(.addr(rd_addr_r), .bit_in(bit_data), .in_ram(ram_data),
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.psw(psw), .acc(acc), .dptr_hi(dptr_hi), .ports_in(ports_in), .sp(sp_r),
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.psw(psw_r), .acc(acc), .dptr_hi(dptr_hi), .ports_in(ports_in), .sp(sp_r),
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.b_reg(b_reg), .uart(uart), .int(int_out), .tc(tc_out), .b_bit(b_bit),
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.b_reg(b_reg), .uart(uart), .int(int_out), .tc(tc_out), .b_bit(b_bit),
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.acc_bit(acc_bit), .psw_bit(psw_bit), .int_bit(int_bit), .port_bit(port_bit),
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.acc_bit(acc_bit), .psw_bit(psw_bit), .int_bit(int_bit), .port_bit(port_bit),
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.uart_bit(uart_bit), .bit_out(bit_out), .out_data(ram_out));
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.uart_bit(uart_bit), .bit_out(bit_out), .out_data(ram_out));
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//
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//
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| Line 350... |
Line 350... |
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//
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//
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// serial interface
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// serial interface
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oc8051_uart oc8051_uatr1 (.clk(clk), .rst(rst), .bit_in(desCy), .rd_addr(rd_addr),
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oc8051_uart oc8051_uatr1 (.clk(clk), .rst(rst), .bit_in(desCy), .rd_addr(rd_addr),
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.data_in(des1), .wr(wr_r), .wr_bit(bit_addr_r), .wr_addr(wr_addr),
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.data_in(des1), .wr(wr_r), .wr_bit(bit_addr_r), .wr_addr(wr_addr),
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.data_out(uart), .bit_out(uart_bit), .rxd(rxd), .txd(txd), .intr(int_uart), .t1_ow(tf1));
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.data_out(uart), .bit_out(uart_bit), .rxd(rxd), .txd(txd), .intr(int_uart), .t1_ow(tf1), .syn(syn));
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oc0851_int oc8051_int1(.clk(clk), .rst(rst), .wr_addr(wr_addr), .rd_addr(rd_addr), .bit_in(desCy), .ack(ack),
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oc0851_int oc8051_int1(.clk(clk), .rst(rst), .wr_addr(wr_addr), .rd_addr(rd_addr), .bit_in(desCy), .ack(ack),
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.intr(intr), .data_in(des1), .data_out(int_out), .bit_out(int_bit), .wr(wr_r), .wr_bit(bit_addr_r), .tf0(tf0), .tf1(tf1),
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.intr(intr), .data_in(des1), .data_out(int_out), .bit_out(int_bit), .wr(wr_r), .wr_bit(bit_addr_r), .tf0(tf0), .tf1(tf1),
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.ie0(int0), .ie1(int1), .reti(reti), .int_vec(int_src), .tr0(tr0), .tr1(tr1), .uart(int_uart));
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.ie0(int0), .ie1(int1), .reti(reti), .int_vec(int_src), .tr0(tr0), .tr1(tr1), .uart(int_uart));
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oc8051_tc oc8051_tc1(.clk(clk), .rst(rst), .wr_addr(wr_addr), .rd_addr(rd_addr),
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oc8051_tc oc8051_tc1(.clk(clk), .rst(rst), .wr_addr(wr_addr), .rd_addr(rd_addr),
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.data_in(des1), .wr(wr_r), .wr_bit(bit_addr_r), .ie0(int0), .ie1(int1), .tr0(tr0),
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.data_in(des1), .wr(wr_r), .wr_bit(bit_addr_r), .ie0(int0), .ie1(int1), .tr0(tr0),
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.tr1(tr1), .t0(t0), .t1(t1), .data_out(tc_out), .tf0(tf0), .tf1(tf1));
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.tr1(tr1), .t0(t0), .t1(t1), .data_out(tc_out), .tf0(tf0), .tf1(tf1), .syn(syn));
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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