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https://opencores.org/ocsvn/8051/8051/trunk
[/] [8051/] [tags/] [rel_12/] [rtl/] [verilog/] [oc8051_uart.v] - Diff between revs 10 and 17
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| Rev 10 |
Rev 17 |
| Line 81... |
Line 81... |
if (rst) begin
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if (rst) begin
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txd <= #1 1'b1;
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txd <= #1 1'b1;
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tr_count <= #1 4'd0;
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tr_count <= #1 4'd0;
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trans <= #1 1'b0;
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trans <= #1 1'b0;
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smod_cnt_t <= #1 1'b0;
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smod_cnt_t <= #1 1'b0;
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mode2_count <= #1 3'b000;
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//
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//
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// start transmiting
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// start transmiting
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//
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//
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end else if (tr_start) begin
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end else if (tr_start) begin
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case (scon[7:6])
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case (scon[7:6])
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