| Line 42... |
Line 42... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.14 2003/04/29 11:25:42 simont
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// prepared start of receiving if ren is not active.
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//
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// Revision 1.13 2003/04/10 08:57:16 simont
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// Revision 1.13 2003/04/10 08:57:16 simont
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// remove signal sbuf_txd [12:11]
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// remove signal sbuf_txd [12:11]
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//
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//
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// Revision 1.12 2003/04/07 14:58:02 simont
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// Revision 1.12 2003/04/07 14:58:02 simont
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// change sfr's interface.
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// change sfr's interface.
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| Line 184... |
Line 187... |
tx_done <= #1 1'b0;
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tx_done <= #1 1'b0;
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//
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//
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// start transmiting
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// start transmiting
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//
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//
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end else if (wr_sbuf) begin
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end else if (wr_sbuf) begin
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case (scon[7:6])
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case (scon[7:6]) /* synopsys parallel_case */
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2'b00: begin // mode 0
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2'b00: begin // mode 0
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sbuf_txd <= #1 {3'b001, data_in};
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sbuf_txd <= #1 {3'b001, data_in};
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end
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end
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2'b01: begin // mode 1
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2'b01: begin // mode 1
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sbuf_txd <= #1 {2'b01, data_in, 1'b0};
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sbuf_txd <= #1 {2'b01, data_in, 1'b0};
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| Line 281... |
Line 284... |
sbuf_rxd <= #1 sbuf_rxd_tmp[10:3];
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sbuf_rxd <= #1 sbuf_rxd_tmp[10:3];
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end else if (receive & (scon[7:6]==2'b00) & pres_ow) begin //mode 0
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end else if (receive & (scon[7:6]==2'b00) & pres_ow) begin //mode 0
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{sbuf_rxd_tmp, rx_done} <= #1 {rxd, sbuf_rxd_tmp};
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{sbuf_rxd_tmp, rx_done} <= #1 {rxd, sbuf_rxd_tmp};
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end else if (receive & (scon[7:6]!=2'b00) & shift_re) begin //mode 1, 2, 3
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end else if (receive & (scon[7:6]!=2'b00) & shift_re) begin //mode 1, 2, 3
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re_count <= #1 re_count + 4'd1;
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re_count <= #1 re_count + 4'd1;
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case (re_count)
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case (re_count) /* synopsys full_case parallel_case */
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4'h7: rx_sam[0] <= #1 rxd;
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4'h7: rx_sam[0] <= #1 rxd;
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4'h8: rx_sam[1] <= #1 rxd;
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4'h8: rx_sam[1] <= #1 rxd;
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4'h9: begin
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4'h9: begin
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{sbuf_rxd_tmp, rx_done} <= #1 {(rxd==rx_sam[0] ? rxd : rx_sam[1]), sbuf_rxd_tmp};
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{sbuf_rxd_tmp, rx_done} <= #1 {(rxd==rx_sam[0] ? rxd : rx_sam[1]), sbuf_rxd_tmp};
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end
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end
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