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https://opencores.org/ocsvn/8051/8051/trunk
[/] [8051/] [trunk/] [bench/] [verilog/] [oc8051_tb.v] - Diff between revs 2 and 4
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Rev 4 |
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Line 76... |
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oc8051_xram oc8051_xram1 (.clk(clk), .wr(write_xram), .addr(ext_addr), .data_in(data_out), .data_out(data_out_xram));
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oc8051_xram oc8051_xram1 (.clk(clk), .wr(write_xram), .addr(ext_addr), .data_in(data_out), .data_out(data_out_xram));
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oc8051_uart_test oc8051_uart_test1(.clk(clk), .rst(rst), .addr(ext_addr[7:0]), .wr(write_uart),
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oc8051_uart_test oc8051_uart_test1(.clk(clk), .rst(rst), .addr(ext_addr[7:0]), .wr(write_uart),
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.wr_bit(p3_out[0]), .data_in(data_out), .data_out(data_out_uart), .bit_out(bit_out), .rxd(txd),
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.wr_bit(p3_out[0]), .data_in(data_out), .data_out(data_out_uart), .bit_out(bit_out), .rxd(txd),
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.txd(rxd), .ow(p3_out[1]), .int(int_uart));
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.txd(rxd), .ow(p3_out[1]), .intr(int_uart));
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assign write_xram = p3_out[7] & write;
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assign write_xram = p3_out[7] & write;
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assign write_uart = !p3_out[7] & write;
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assign write_uart = !p3_out[7] & write;
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assign data_in = p3_out[7] ? data_out_xram : data_out_uart;
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assign data_in = p3_out[7] ? data_out_xram : data_out_uart;
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