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[/] [System09/] [trunk/] [rtl/] [System09_Xess_XSA-3S1000/] [XSA-3S1000.ucf] - Diff between revs 66 and 115

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Rev 66	Rev 115
Line 158...	Line 158...
`#net FPGA_TMS LOC=C13 \| IOSTANDARD = LVCMOS33 ;`	`#net FPGA_TMS LOC=C13 \| IOSTANDARD = LVCMOS33 ;`
`#net FPGA_TMS_BSY LOC=P9 \| IOSTANDARD = LVCMOS33 ;`	`#net FPGA_TMS_BSY LOC=P9 \| IOSTANDARD = LVCMOS33 ;`
`#`	`#`
`# Status LED`	`# Status LED`
`#`	`#`
`#net S<0> loc=M6 \| IOSTANDARD = LVCMOS33 ; # FPGA_D7, LED_D`	`net S<0> loc=M6 \| IOSTANDARD = LVCMOS33 ; # FPGA_D7, LED_D`
`#net S<1> loc=M11 \| IOSTANDARD = LVCMOS33 ; # FPGA_D0, LED_C`	`net S<1> loc=M11 \| IOSTANDARD = LVCMOS33 ; # FPGA_D0, LED_C`
`#net S<2> loc=N6 \| IOSTANDARD = LVCMOS33 ; # FPGA_D6, LED_E`	`net S<2> loc=N6 \| IOSTANDARD = LVCMOS33 ; # FPGA_D6, LED_E`
`#net S<3> loc=R7 \| IOSTANDARD = LVCMOS33 ; # FPGA_D5, LED_G`	`net S<3> loc=R7 \| IOSTANDARD = LVCMOS33 ; # FPGA_D5, LED_G`
`#net S<4> loc=P10 \| IOSTANDARD = LVCMOS33 ; # FPGA_D2, LED_B`	`net S<4> loc=P10 \| IOSTANDARD = LVCMOS33 ; # FPGA_D2, LED_B`
`#net S<5> loc=T7 \| IOSTANDARD = LVCMOS33 ; # FPGA_D4, LED_F`	`net S<5> loc=T7 \| IOSTANDARD = LVCMOS33 ; # FPGA_D4, LED_F`
`#net S<6> loc=R10 \| IOSTANDARD = LVCMOS33 ; # FPGA_D3, LED_A`	`net S<6> loc=R10 \| IOSTANDARD = LVCMOS33 ; # FPGA_D3, LED_A`
`#net S<7> loc=N11 \| IOSTANDARD = LVCMOS33 ; # FPGA_D1, LED_DP`	`net S<7> loc=N11 \| IOSTANDARD = LVCMOS33 ; # FPGA_D1, LED_DP`
`#`	`#`
`# Parallel Port`	`# Parallel Port`
`#`	`#`
`#net PPORT_load loc=N14 \| IOSTANDARD = LVCMOS33 ;`	`#net PPORT_load loc=N14 \| IOSTANDARD = LVCMOS33 ;`
`#net PPORT_clk loc=P15 \| IOSTANDARD = LVCMOS33 ;`	`#net PPORT_clk loc=P15 \| IOSTANDARD = LVCMOS33 ;`

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