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[/] [a-z80/] [trunk/] [cpu/] [control/] [test_interrupts.sv] - Diff between revs 3 and 8

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Rev 3 Rev 8
Line 25... Line 25...
logic clk_sig=0;
logic clk_sig=0;
logic ctl_no_ints_sig=0;
logic ctl_no_ints_sig=0;
 
 
// ----------------- STATES ----------------
// ----------------- STATES ----------------
wire iff1_sig;
wire iff1_sig;
 
assign iff1_sig = interrupts_inst.iff1;
wire iff2_sig;
wire iff2_sig;
wire im1_sig;
wire im1_sig;
wire im2_sig;
wire im2_sig;
wire in_nmi_sig;
wire in_nmi_sig;
wire in_intr_sig;
wire in_intr_sig;
Line 80... Line 81...
    .ctl_im_we(ctl_im_we_sig) ,         // input  ctl_im_we_sig
    .ctl_im_we(ctl_im_we_sig) ,         // input  ctl_im_we_sig
    .db(db_sig) ,                       // input [1:0] db_sig
    .db(db_sig) ,                       // input [1:0] db_sig
    .clk(clk) ,                         // input  clk
    .clk(clk) ,                         // input  clk
    .ctl_no_ints(ctl_no_ints_sig) ,     // input  ctl_no_ints_sig
    .ctl_no_ints(ctl_no_ints_sig) ,     // input  ctl_no_ints_sig
    .nreset(nreset) ,                   // input  nreset
    .nreset(nreset) ,                   // input  nreset
    .iff1(iff1_sig) ,                   // output  iff1_sig
 
    .iff2(iff2_sig) ,                   // output  iff2_sig
    .iff2(iff2_sig) ,                   // output  iff2_sig
    .im1(im1_sig) ,                     // output  im1_sig
    .im1(im1_sig) ,                     // output  im1_sig
    .im2(im2_sig) ,                     // output  im2_sig
    .im2(im2_sig) ,                     // output  im2_sig
    .in_nmi(in_nmi_sig) ,               // output  in_nmi_sig
    .in_nmi(in_nmi_sig) ,               // output  in_nmi_sig
    .in_intr(in_intr_sig)               // output  in_intr_sig
    .in_intr(in_intr_sig)               // output  in_intr_sig

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