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[/] [a-z80/] [trunk/] [cpu/] [toplevel/] [test_top.sv] - Diff between revs 3 and 8

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Rev 3 Rev 8
Line 11... Line 11...
    $display("Test: Start of test at %d", $time);
    $display("Test: Start of test at %d", $time);
    z.nWAIT <= `CLR;
    z.nWAIT <= `CLR;
    z.nINT <= `CLR;
    z.nINT <= `CLR;
    z.nNMI <= `CLR;
    z.nNMI <= `CLR;
    z.nBUSRQ <= `CLR;
    z.nBUSRQ <= `CLR;
    force dut.z80_top_ifc_n.fpga_reset=1;
 
    z.nRESET <= `SET;
    z.nRESET <= `SET;
#2  force dut.z80_top_ifc_n.fpga_reset=0;
#2  repeat (3) @(posedge clk);
    repeat (3) @(posedge clk);
 
    z.nRESET <= `CLR;
    z.nRESET <= `CLR;
end : init
end : init
 
 
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// Testbench for interrupt testing
// Testbench for interrupt testing

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