| Line 35... |
Line 35... |
//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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// CVS Log
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//
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//
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// $Id: tests.v,v 1.1 2002-02-13 08:22:32 rudi Exp $
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// $Id: tests.v,v 1.2 2002-03-05 04:44:04 rudi Exp $
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//
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//
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// $Date: 2002-02-13 08:22:32 $
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// $Date: 2002-03-05 04:44:04 $
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// $Revision: 1.1 $
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// $Revision: 1.2 $
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// $Author: rudi $
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// $Author: rudi $
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// $Locker: $
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// $Locker: $
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// $State: Exp $
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// $State: Exp $
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//
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//
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// Change History:
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// Change History:
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.1 2002/02/13 08:22:32 rudi
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//
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// Added test bench for public release
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//
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//
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//
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//
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//
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//
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//
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| Line 125... |
Line 129... |
repeat(2) @(posedge sync);
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repeat(2) @(posedge sync);
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for(n=0;n<75;n=n+1)
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for(n=0;n<75;n=n+1)
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begin
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begin
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@(negedge sync);
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@(negedge sync);
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repeat(230) @(posedge bit_clk);
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//repeat(230) @(posedge bit_clk);
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repeat(130) @(posedge bit_clk);
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repeat(n) @(posedge bit_clk);
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repeat(n) @(posedge bit_clk);
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while(wb_busy) @(posedge clk);
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while(wb_busy) @(posedge clk);
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wb_busy = 1;
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wb_busy = 1;
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| Line 408... |
Line 413... |
repeat(2) @(posedge sync);
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repeat(2) @(posedge sync);
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for(n=0;n<75;n=n+1)
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for(n=0;n<75;n=n+1)
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begin
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begin
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@(negedge sync);
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@(negedge sync);
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repeat(230) @(posedge bit_clk);
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//repeat(230) @(posedge bit_clk);
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repeat(130) @(posedge bit_clk);
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repeat(n) @(posedge bit_clk);
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repeat(n) @(posedge bit_clk);
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while(wb_busy) @(posedge clk);
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while(wb_busy) @(posedge clk);
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wb_busy = 1;
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wb_busy = 1;
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| Line 647... |
Line 653... |
$display("*****************************************************");
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$display("*****************************************************");
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$display("*** VSR AC97 I/O Test ... ***");
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$display("*** VSR AC97 I/O Test ... ***");
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$display("*****************************************************\n");
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$display("*****************************************************\n");
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wb_busy = 1;
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wb_busy = 1;
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m0.wb_wr1(`INTM,4'hf, 32'h0492_4924);
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m0.wb_wr1(`OCC0,4'hf, 32'h7373_7373);
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m0.wb_wr1(`OCC0,4'hf, 32'h7373_7373);
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m0.wb_wr1(`OCC1,4'hf, 32'h0000_7373);
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m0.wb_wr1(`OCC1,4'hf, 32'h0000_7373);
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m0.wb_wr1(`ICC,4'hf, 32'h0073_7373);
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m0.wb_wr1(`ICC,4'hf, 32'h0073_7373);
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wb_busy = 0;
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wb_busy = 0;
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oc0_dma_en = 1;
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oc0_dma_en = 1;
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oc1_dma_en = 1;
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oc1_dma_en = 1;
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oc2_dma_en = 1;
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oc2_dma_en = 1;
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oc3_dma_en = 1;
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oc3_dma_en = 1;
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oc4_dma_en = 1;
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oc4_dma_en = 1;
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| Line 872... |
Line 881... |
end
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end
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endtask
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endtask
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No newline at end of file
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No newline at end of file
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task vsr_int;
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reg [31:0] data;
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reg [31:0] data1;
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reg [31:0] data2;
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integer size, frames, m, th, smpl;
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begin
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$display("\n\n");
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$display("*****************************************************");
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$display("*** VSR AC97 I/O Test (INT ctrl) ... ***");
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$display("*****************************************************\n");
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for(smpl=0;smpl<4;smpl=smpl+1)
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begin
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$display("Sampling selection: %0d",smpl);
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for(th=0;th<4;th=th+1)
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begin
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do_rst;
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while(wb_busy) @(posedge clk);
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wb_busy = 1;
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m0.wb_wr1(`INTM,4'hf, 32'hffff_fffc);
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case(th)
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0:
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begin
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$display("Interrupt thrash hold: 100%");
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// Thrash holds
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oc0_th = 4; // 100% (4/4) Full Empty
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oc1_th = 4;
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oc2_th = 4;
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oc3_th = 4;
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oc4_th = 4;
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oc5_th = 4;
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ic0_th = 4;
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ic1_th = 4;
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ic2_th = 4;
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m0.wb_wr1(`OCC0,4'hf, 32'h3333_3333);
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m0.wb_wr1(`OCC1,4'hf, 32'h0000_3333);
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m0.wb_wr1(`ICC,4'hf, 32'h0033_3333);
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end
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1:
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begin
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$display("Interrupt thrash hold: 75%");
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// Thrash holds
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oc0_th = 3; // 75% (3/4) Full Empty
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oc1_th = 3;
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oc2_th = 3;
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oc3_th = 3;
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oc4_th = 3;
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oc5_th = 3;
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ic0_th = 3;
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ic1_th = 3;
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ic2_th = 3;
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m0.wb_wr1(`OCC0,4'hf, 32'h2323_2323);
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m0.wb_wr1(`OCC1,4'hf, 32'h0000_2323);
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m0.wb_wr1(`ICC,4'hf, 32'h0023_2323);
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end
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2:
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begin
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$display("Interrupt thrash hold: 50%");
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// Thrash holds
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oc0_th = 2; // 50% (1/2) Full/Empty
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oc1_th = 2;
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oc2_th = 2;
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oc3_th = 2;
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oc4_th = 2;
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oc5_th = 2;
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ic0_th = 2;
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ic1_th = 2;
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ic2_th = 2;
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m0.wb_wr1(`OCC0,4'hf, 32'h1313_1313);
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m0.wb_wr1(`OCC1,4'hf, 32'h0000_1313);
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m0.wb_wr1(`ICC,4'hf, 32'h0013_1313);
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end
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3:
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begin
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$display("Interrupt thrash hold: 25%");
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// Thrash holds
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oc0_th = 1; // 25% (1/4) Full/Empty
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oc1_th = 1;
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oc2_th = 1;
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oc3_th = 1;
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oc4_th = 1;
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oc5_th = 1;
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ic0_th = 1;
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ic1_th = 1;
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ic2_th = 1;
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m0.wb_wr1(`OCC0,4'hf, 32'h0303_0303);
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m0.wb_wr1(`OCC1,4'hf, 32'h0000_0303);
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m0.wb_wr1(`ICC,4'hf, 32'h0003_0303);
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end
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endcase
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wb_busy = 0;
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oc0_dma_en = 0;
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oc1_dma_en = 0;
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oc2_dma_en = 0;
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oc3_dma_en = 0;
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oc4_dma_en = 0;
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oc5_dma_en = 0;
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ic0_dma_en = 0;
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ic1_dma_en = 0;
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ic2_dma_en = 0;
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int_chk_en = 0;
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int_ctrl_en = 1;
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for(n=0;n<256;n=n+1)
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begin
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oc0_mem[n] = $random;
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oc1_mem[n] = $random;
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oc2_mem[n] = $random;
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oc3_mem[n] = $random;
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oc4_mem[n] = $random;
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oc5_mem[n] = $random;
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ic0_mem[n] = $random;
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ic1_mem[n] = $random;
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ic2_mem[n] = $random;
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end
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u1.init(0);
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frames = 132;
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frames = 132 + 132 + 132;
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case(smpl)
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0: // All FULL Speed (48 Khz per channel)
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u1.tx1( frames, // Number of frames to process
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0, // How many frames before codec is ready
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10'b1101_1110_00, // Output slots valid bits
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10'b1101_0000_00, // Input slots valid bits
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20'b00_00_00_00_00_00_00_00_00_00, // Output Slots intervals
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20'b00_00_00_00_00_00_00_00_00_00 // Input Slots intervals
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);
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1: // All 1/4 Speed (12 Khz per channel)
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u1.tx1( frames, // Number of frames to process
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0, // How many frames before codec is ready
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10'b1101_1110_00, // Output slots valid bits
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10'b1101_0000_00, // Input slots valid bits
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20'b11_11_00_11_11_11_11_00_00_00, // Output Slots intervals
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20'b11_11_00_11_00_00_00_00_00_00 // Input Slots intervals
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);
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2: // Mix 1
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u1.tx1( frames, // Number of frames to process
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0, // How many frames before codec is ready
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10'b1101_1110_00, // Output slots valid bits
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10'b1101_0000_00, // Input slots valid bits
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20'b00_01_00_10_11_01_10_00_00_00, // Output Slots intervals
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20'b11_10_00_01_00_00_00_00_00_00 // Input Slots intervals
|
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);
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3: // Mix 2
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u1.tx1( frames, // Number of frames to process
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0, // How many frames before codec is ready
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10'b1101_1110_00, // Output slots valid bits
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10'b1101_0000_00, // Input slots valid bits
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20'b00_00_00_01_01_10_10_00_00_00, // Output Slots intervals
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20'b00_00_00_10_00_00_00_00_00_00 // Input Slots intervals
|
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);
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endcase
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|
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|
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size = (frames - 4)/2;
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size = (frames - 4)/3;
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size = size - 36;
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repeat(100) @(posedge clk);
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for(n=0;n<size;n=n+1)
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begin
|
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data1 = u1.rs3_mem[n];
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data = oc0_mem[n[8:1]];
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if(~n[0]) data2 = {12'h0, data[15:0], 4'h0};
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else data2 = {12'h0, data[31:16], 4'h0};
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|
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if( (data1 !== data2) |
|
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(^data1 === 1'hx) |
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(^data2 === 1'hx)
|
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)
|
|
begin
|
|
$display("ERROR: Out. CH0 Sample %0d Mismatch Sent: %h Got: %h",
|
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n, data2, data1);
|
|
error_cnt = error_cnt + 1;
|
|
end
|
|
end
|
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for(n=0;n<size;n=n+1)
|
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begin
|
|
data1 = u1.rs4_mem[n];
|
|
data = oc1_mem[n[8:1]];
|
|
|
|
if(~n[0]) data2 = {12'h0, data[15:0], 4'h0};
|
|
else data2 = {12'h0, data[31:16], 4'h0};
|
|
|
|
if( (data1 !== data2) |
|
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(^data1 === 1'hx) |
|
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(^data2 === 1'hx)
|
|
)
|
|
begin
|
|
$display("ERROR: Out. CH1 Sample %0d Mismatch Sent: %h Got: %h",
|
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n, data2, data1);
|
|
error_cnt = error_cnt + 1;
|
|
end
|
|
end
|
|
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|
for(n=0;n<size;n=n+1)
|
|
begin
|
|
data1 = u1.rs6_mem[n];
|
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data = oc2_mem[n[8:1]];
|
|
|
|
if(~n[0]) data2 = {12'h0, data[15:0], 4'h0};
|
|
else data2 = {12'h0, data[31:16], 4'h0};
|
|
|
|
if( (data1 !== data2) |
|
|
(^data1 === 1'hx) |
|
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(^data2 === 1'hx)
|
|
)
|
|
begin
|
|
$display("ERROR: Out. CH2 Sample %0d Mismatch Sent: %h Got: %h",
|
|
n, data2, data1);
|
|
error_cnt = error_cnt + 1;
|
|
end
|
|
end
|
|
|
|
for(n=0;n<size;n=n+1)
|
|
begin
|
|
data1 = u1.rs7_mem[n];
|
|
data = oc3_mem[n[8:1]];
|
|
|
|
if(~n[0]) data2 = {12'h0, data[15:0], 4'h0};
|
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else data2 = {12'h0, data[31:16], 4'h0};
|
|
|
|
if( (data1 !== data2) |
|
|
(^data1 === 1'hx) |
|
|
(^data2 === 1'hx)
|
|
)
|
|
begin
|
|
$display("ERROR: Out. CH3 Sample %0d Mismatch Sent: %h Got: %h",
|
|
n, data2, data1);
|
|
error_cnt = error_cnt + 1;
|
|
end
|
|
end
|
|
|
|
for(n=0;n<size;n=n+1)
|
|
begin
|
|
data1 = u1.rs8_mem[n];
|
|
data = oc4_mem[n[8:1]];
|
|
|
|
if(~n[0]) data2 = {12'h0, data[15:0], 4'h0};
|
|
else data2 = {12'h0, data[31:16], 4'h0};
|
|
|
|
if( (data1 !== data2) |
|
|
(^data1 === 1'hx) |
|
|
(^data2 === 1'hx)
|
|
)
|
|
begin
|
|
$display("ERROR: Out. CH4 Sample %0d Mismatch Sent: %h Got: %h",
|
|
n, data2, data1);
|
|
error_cnt = error_cnt + 1;
|
|
end
|
|
end
|
|
|
|
for(n=0;n<size;n=n+1)
|
|
begin
|
|
data1 = u1.rs9_mem[n];
|
|
data = oc5_mem[n[8:1]];
|
|
|
|
if(~n[0]) data2 = {12'h0, data[15:0], 4'h0};
|
|
else data2 = {12'h0, data[31:16], 4'h0};
|
|
|
|
if( (data1 !== data2) |
|
|
(^data1 === 1'hx) |
|
|
(^data2 === 1'hx)
|
|
)
|
|
begin
|
|
$display("ERROR: Out. CH5 Sample %0d Mismatch Sent: %h Got: %h",
|
|
n, data2, data1);
|
|
error_cnt = error_cnt + 1;
|
|
end
|
|
end
|
|
|
|
for(n=0;n<size;n=n+1)
|
|
begin
|
|
data1 = u1.is3_mem[n];
|
|
data = ic0_mem[n[8:1]];
|
|
|
|
if(~n[0]) data2 = {12'h0, data[15:0], 4'h0};
|
|
else data2 = {12'h0, data[31:16], 4'h0};
|
|
|
|
if( (data1 !== data2) |
|
|
(^data1 === 1'hx) |
|
|
(^data2 === 1'hx)
|
|
)
|
|
begin
|
|
$display("ERROR: In. CH0 Sample %0d Mismatch Sent: %h Got: %h",
|
|
n, data2, data1);
|
|
error_cnt = error_cnt + 1;
|
|
end
|
|
end
|
|
|
|
for(n=0;n<size;n=n+1)
|
|
begin
|
|
data1 = u1.is4_mem[n];
|
|
data = ic1_mem[n[8:1]];
|
|
|
|
if(~n[0]) data2 = {12'h0, data[15:0], 4'h0};
|
|
else data2 = {12'h0, data[31:16], 4'h0};
|
|
|
|
if( (data1 !== data2) |
|
|
(^data1 === 1'hx) |
|
|
(^data2 === 1'hx)
|
|
)
|
|
begin
|
|
$display("ERROR: In. CH1 Sample %0d Mismatch Sent: %h Got: %h",
|
|
n, data2, data1);
|
|
error_cnt = error_cnt + 1;
|
|
end
|
|
end
|
|
|
|
for(n=0;n<size;n=n+1)
|
|
begin
|
|
data1 = u1.is6_mem[n];
|
|
data = ic2_mem[n[8:1]];
|
|
|
|
if(~n[0]) data2 = {12'h0, data[15:0], 4'h0};
|
|
else data2 = {12'h0, data[31:16], 4'h0};
|
|
|
|
if( (data1 !== data2) |
|
|
(^data1 === 1'hx) |
|
|
(^data2 === 1'hx)
|
|
)
|
|
begin
|
|
$display("ERROR: In. CH2 Sample %0d Mismatch Sent: %h Got: %h",
|
|
n, data2, data1);
|
|
error_cnt = error_cnt + 1;
|
|
end
|
|
end
|
|
|
|
repeat(10) @(posedge clk);
|
|
end
|
|
end
|
|
|
|
$display("Processed %0d samples per channel for each test",size);
|
|
|
|
show_errors;
|
|
$display("*****************************************************");
|
|
$display("*** Test DONE ... ***");
|
|
$display("*****************************************************\n\n");
|
|
|
|
end
|
|
endtask
|
|
|
|
|
|
|
|
|
No newline at end of file
|
No newline at end of file
|
