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//// ////
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//// ////
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//// Downloaded from: http://www.opencores.org/cores/ac97_ctrl/ ////
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//// Downloaded from: http://www.opencores.org/cores/ac97_ctrl/ ////
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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2001 Rudolf Usselmann ////
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//// Copyright (C) 2000-2002 Rudolf Usselmann ////
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//// www.asics.ws ////
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//// rudi@asics.ws ////
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//// rudi@asics.ws ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// removed from the file and that any derivative work contains ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
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//// POSSIBILITY OF SUCH DAMAGE. ////
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//// POSSIBILITY OF SUCH DAMAGE. ////
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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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// CVS Log
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//
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//
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// $Id: ac97_cra.v,v 1.2 2002-03-05 04:44:05 rudi Exp $
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// $Id: ac97_cra.v,v 1.3 2002-09-19 06:30:56 rudi Exp $
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//
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//
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// $Date: 2002-03-05 04:44:05 $
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// $Date: 2002-09-19 06:30:56 $
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// $Revision: 1.2 $
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// $Revision: 1.3 $
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// $Author: rudi $
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// $Author: rudi $
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// $Locker: $
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// $Locker: $
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// $State: Exp $
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// $State: Exp $
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//
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//
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// Change History:
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// Change History:
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.2 2002/03/05 04:44:05 rudi
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//
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// - Fixed the order of the thrash hold bits to match the spec.
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// - Many minor synthesis cleanup items ...
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//
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// Revision 1.1 2001/08/03 06:54:49 rudi
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// Revision 1.1 2001/08/03 06:54:49 rudi
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//
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//
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//
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//
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// - Changed to new directory structure
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// - Changed to new directory structure
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//
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//
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Line 101... |
//
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//
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reg crac_wr;
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reg crac_wr;
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reg crac_rd;
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reg crac_rd;
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reg crac_rd_done;
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reg crac_rd_done;
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reg [15:0] crac_din;
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reg crac_we_r;
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reg crac_we_r;
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reg valid_r;
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reg valid_r;
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reg crac_rd_r;
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wire valid_ne;
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wire valid_ne;
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wire valid_pe;
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wire valid_pe;
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reg rdd1, rdd2, rdd3;
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reg rdd1, rdd2, rdd3;
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////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////
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//
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//
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// Codec Register Data Path
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// Codec Register Data Path
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// Write Data
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// Write Data
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assign out_slt2[19:4] = crac_out[15:0];
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assign out_slt2[19:4] = crac_out[15:0];
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assign out_slt2[3:0] = 4'h0;
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assign out_slt2[3:0] = 4'h0;
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// Read Data
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// Read Data
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assign crac_din = in_slt2[19:4];
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always @(posedge clk or negedge rst)
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begin
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if(!rst) crac_din <= #1 16'h0;
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else
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if(crac_rd_done) crac_din <= #1 in_slt2[19:4];
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end
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////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////
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//
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//
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// Codec Register Access Tracking
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// Codec Register Access Tracking
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//
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//
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Line 187... |
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assign valid_ne = !valid & valid_r;
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assign valid_ne = !valid & valid_r;
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assign valid_pe = valid & !valid_r;
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assign valid_pe = valid & !valid_r;
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always @(posedge clk)
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crac_rd_r <= #1 crac_rd & valid;
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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