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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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// CVS Log
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//
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//
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// $Id: ac97_defines.v,v 1.3 2002-03-05 04:44:05 rudi Exp $
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// $Id: ac97_defines.v,v 1.4 2002-03-11 03:21:22 rudi Exp $
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//
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//
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// $Date: 2002-03-05 04:44:05 $
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// $Date: 2002-03-11 03:21:22 $
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// $Revision: 1.3 $
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// $Revision: 1.4 $
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// $Author: rudi $
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// $Author: rudi $
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// $Locker: $
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// $Locker: $
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// $State: Exp $
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// $State: Exp $
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//
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//
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// Change History:
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// Change History:
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.3 2002/03/05 04:44:05 rudi
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//
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// - Fixed the order of the thrash hold bits to match the spec.
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// - Many minor synthesis cleanup items ...
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//
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// Revision 1.2 2001/08/10 08:09:42 rudi
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// Revision 1.2 2001/08/10 08:09:42 rudi
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//
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//
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// - Removed RTY_O output.
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// - Removed RTY_O output.
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// - Added Clock and Reset Inputs to documentation.
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// - Added Clock and Reset Inputs to documentation.
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// - Changed IO names to be more clear.
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// - Changed IO names to be more clear.
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// This value defines how many WISHBONE cycles must pass without
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// This value defines how many WISHBONE cycles must pass without
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// any change on the bit clock input before we signal "suspended".
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// any change on the bit clock input before we signal "suspended".
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// For a 200 MHz WISHBONE clock this would be about (163/5) 33 cycles.
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// For a 200 MHz WISHBONE clock this would be about (163/5) 33 cycles.
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`define AC97_SUSP_DET 6'h21
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`define AC97_SUSP_DET 6'h21
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/////////////////////////////////////////////////////////////////////
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//
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// Select FIFO Depth. For most applications a FIFO depth of 4 should
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// be sufficient. For systems with slow interrupt processing or slow
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// DMA response or systems with low internal bus bandwidth you might
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// want to increase the FIFO sizes to reduce the interrupt/DMA service
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// request frequencies.
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// Service request frequency can be calculated as follows:
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// Channel bandwidth / FIFO size = Service Request Frequency
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// For Example: 48KHz / 4 = 12 kHz
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//
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// Select Input FIFO depth by uncommenting ONE of the following define
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// statements:
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`define AC97_IN_FIFO_DEPTH_4
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//`define AC97_IN_FIFO_DEPTH_8
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//`define AC97_IN_FIFO_DEPTH_16
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//
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// Select Output FIFO depth by uncommenting ONE of the following define
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// statements:
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`define AC97_OUT_FIFO_DEPTH_4
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//`define AC97_OUT_FIFO_DEPTH_8
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//`define AC97_OUT_FIFO_DEPTH_16
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